1//==- llvm/CodeGen/MachineMemOperand.h - MachineMemOperand class -*- C++ -*-==// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7//===----------------------------------------------------------------------===// 9// This file contains the declaration of the MachineMemOperand class, which is a 10// description of a memory reference. It is used to help track dependencies 13//===----------------------------------------------------------------------===// 15#ifndef LLVM_CODEGEN_MACHINEMEMOPERAND_H 16#define LLVM_CODEGEN_MACHINEMEMOPERAND_H 35classModuleSlotTracker;
38/// This class contains a discriminated union of information about pointers in 39/// memory operands, relating them back to LLVM IR or to virtual locations (such 40/// as frame indices) that are exposed during codegen. 42 /// This is the IR pointer value for the access, or it is null if unknown. 45 /// Offset - This is an offset from the base Value*. 55AddrSpace = v ? v->getType()->getPointerAddressSpace() : 0;
74if (
constauto *ValPtr = dyn_cast_if_present<const Value *>(
V))
75AddrSpace = ValPtr->getType()->getPointerAddressSpace();
77AddrSpace = cast<const PseudoSourceValue *>(
V)->getAddressSpace();
84if (isa<const Value *>(
V))
90 /// Return true if memory region [V, V+Offset+Size) is known to be 95 /// Return the LLVM IR address space number that this pointer points into. 98 /// Return a MachinePointerInfo record that refers to the constant pool. 101 /// Return a MachinePointerInfo record that refers to the specified 106 /// Return a MachinePointerInfo record that refers to a jump table entry. 109 /// Return a MachinePointerInfo record that refers to a GOT entry. 112 /// Stack pointer relative access. 116 /// Stack memory without other information. 121//===----------------------------------------------------------------------===// 122/// A description of a memory reference used in the backend. 123/// Instead of holding a StoreInst or LoadInst, this class holds the address 124/// Value of the reference along with a byte size and offset. This allows it 125/// to describe lowered loads and stores. Also, the special PseudoSourceValue 126/// objects can be used to represent loads and stores to memory locations 127/// that aren't explicit in the regular LLVM IR. 131 /// Flags values. These may be or'd together. 135 /// The memory access reads data. 137 /// The memory access writes data. 139 /// The memory access is volatile. 141 /// The memory access is non-temporal. 143 /// The memory access is dereferenceable (i.e., doesn't trap). 145 /// The memory access always returns the same value (or traps). 148// Reserved for use by target-specific passes. 149// Targets may override getSerializableMachineMemOperandTargetFlags() to 150// enable MIR serialization/parsing of these flags. If more of these flags 151// are added, the MIR printing/parsing code will need to be updated as well. 161 /// Atomic information for this memory operation. 162structMachineAtomicInfo {
163 /// Synchronization scope ID for this memory operation. 164unsigned SSID : 8;
// SyncScope::ID 165 /// Atomic ordering requirements for this memory operation. For cmpxchg 166 /// atomic operations, atomic ordering requirements when store occurs. 167unsigned Ordering : 4;
// enum AtomicOrdering 168 /// For cmpxchg atomic operations, atomic ordering requirements when store 170unsigned FailureOrdering : 4;
// enum AtomicOrdering 173 MachinePointerInfo PtrInfo;
175 /// Track the memory type of the access. An access size which is unknown or 176 /// too large to be represented by LLT should use the invalid LLT. 181 MachineAtomicInfo AtomicInfo;
186 /// Construct a MachineMemOperand object with the specified PtrInfo, flags, 187 /// size, and base alignment. For atomic operations the synchronization scope 188 /// and atomic ordering requirements must also be specified. For cmpxchg 189 /// atomic operations the atomic ordering requirements when store does not 190 /// occur must also be specified. 191 MachineMemOperand(MachinePointerInfo PtrInfo,
Flags flags, LocationSize TS,
192 Align a,
const AAMDNodes &AAInfo = AAMDNodes(),
193const MDNode *Ranges =
nullptr,
197 MachineMemOperand(MachinePointerInfo PtrInfo,
Flags flags, LLT type, Align a,
198const AAMDNodes &AAInfo = AAMDNodes(),
199const MDNode *Ranges =
nullptr,
206 /// Return the base address of the memory access. This may either be a normal 207 /// LLVM IR Value, or one of the special values used in CodeGen. 208 /// Special values are those obtained via 209 /// PseudoSourceValue::getFixedStack(int), PseudoSourceValue::getStack, and 210 /// other PseudoSourceValue member functions which return objects which stand 211 /// for frame/stack pointer relative references and other special references 212 /// which are not representable in the high-level IR. 214return dyn_cast_if_present<const Value *>(PtrInfo.V);
218return dyn_cast_if_present<const PseudoSourceValue *>(PtrInfo.V);
223 /// Return the raw flags of the source value, \see Flags. 226 /// Bitwise OR the current flags with the given flags. 229 /// For normal values, this is a byte offset added to the base address. 230 /// For PseudoSourceValue::FPRel values, this is the FrameIndex number. 235 /// Return the memory type of the memory reference. This should only be relied 236 /// on for GlobalISel G_* operation legalization. 239 /// Return the size in bytes of the memory reference. 241return MemoryType.isValid()
246 /// Return the size in bits of the memory reference. 248return MemoryType.isValid()
257 /// Return the minimum known alignment in bytes of the actual memory 261 /// Return the minimum known alignment in bytes of the base address, without 265 /// Return the AA tags for the memory reference. 268 /// Return the range tag for the memory reference. 271 /// Returns the synchronization scope ID for this memory operation. 276 /// Return the atomic ordering requirements for this memory operation. For 277 /// cmpxchg atomic operations, return the atomic ordering requirements when 283 /// For cmpxchg atomic operations, return the atomic ordering requirements 284 /// when store does not occur. 289 /// Return a single atomic ordering that is at least as strong as both the 290 /// success and failure orderings for an atomic operation. (For operations 291 /// other than cmpxchg, this is equivalent to getSuccessOrdering().) 303 /// Returns true if this operation has an atomic ordering requirement of 304 /// unordered or higher, false otherwise. 309 /// Returns true if this memory operation doesn't have any ordering 310 /// constraints other than normal aliasing. Volatile and (ordered) atomic 311 /// memory operations can't be reordered. 318 /// Update this MachineMemOperand to reflect the alignment of MMO, if it has a 319 /// greater alignment. This must only be used when the new alignment applies 320 /// to all users of this MachineMemOperand. 323 /// Change the SourceValue for this MachineMemOperand. This should only be 324 /// used when an object is being relocated and all references to it are being 328voidsetOffset(int64_t NewOffset) { PtrInfo.Offset = NewOffset; }
330 /// Reset the tracked memory type. 335 /// Unset the tracked range metadata. 338 /// Support for operator<<. 347returnLHS.getValue() ==
RHS.getValue() &&
348LHS.getPseudoValue() ==
RHS.getPseudoValue() &&
349LHS.getSize() ==
RHS.getSize() &&
350LHS.getOffset() ==
RHS.getOffset() &&
351LHS.getFlags() ==
RHS.getFlags() &&
352LHS.getAAInfo() ==
RHS.getAAInfo() &&
353LHS.getRanges() ==
RHS.getRanges() &&
354LHS.getAlign() ==
RHS.getAlign() &&
355LHS.getAddrSpace() ==
RHS.getAddrSpace();
364}
// End llvm namespace MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Atomic ordering constants.
const HexagonInstrInfo * TII
Implement a low-level type suitable for MachineInstr level instruction selection.
This file provides utility analysis objects describing memory locations.
This file contains the declarations for metadata subclasses.
This file defines the PointerUnion class, which is a discriminated union of pointer types.
A parsed version of the target data layout string in and methods for querying it.
This is an important class for using LLVM in a threaded context.
static LocationSize precise(uint64_t Value)
static constexpr LocationSize beforeOrAfterPointer()
Any location before or after the base pointer (but still within the underlying object).
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
A description of a memory reference used in the backend.
void setType(LLT NewTy)
Reset the tracked memory type.
LocationSize getSize() const
Return the size in bytes of the memory reference.
AtomicOrdering getFailureOrdering() const
For cmpxchg atomic operations, return the atomic ordering requirements when store does not occur.
const PseudoSourceValue * getPseudoValue() const
LLT getMemoryType() const
Return the memory type of the memory reference.
unsigned getAddrSpace() const
void clearRanges()
Unset the tracked range metadata.
void print(raw_ostream &OS, ModuleSlotTracker &MST, SmallVectorImpl< StringRef > &SSNs, const LLVMContext &Context, const MachineFrameInfo *MFI, const TargetInstrInfo *TII) const
Support for operator<<.
bool isNonTemporal() const
bool isUnordered() const
Returns true if this memory operation doesn't have any ordering constraints other than normal aliasin...
const MDNode * getRanges() const
Return the range tag for the memory reference.
void setValue(const Value *NewSV)
Change the SourceValue for this MachineMemOperand.
bool isAtomic() const
Returns true if this operation has an atomic ordering requirement of unordered or higher,...
void refineAlignment(const MachineMemOperand *MMO)
Update this MachineMemOperand to reflect the alignment of MMO, if it has a greater alignment.
SyncScope::ID getSyncScopeID() const
Returns the synchronization scope ID for this memory operation.
const void * getOpaqueValue() const
friend bool operator!=(const MachineMemOperand &LHS, const MachineMemOperand &RHS)
AtomicOrdering getMergedOrdering() const
Return a single atomic ordering that is at least as strong as both the success and failure orderings ...
void setOffset(int64_t NewOffset)
Flags
Flags values. These may be or'd together.
@ MOVolatile
The memory access is volatile.
@ MODereferenceable
The memory access is dereferenceable (i.e., doesn't trap).
@ MOLoad
The memory access reads data.
@ MONonTemporal
The memory access is non-temporal.
@ MOInvariant
The memory access always returns the same value (or traps).
@ MOStore
The memory access writes data.
AtomicOrdering getSuccessOrdering() const
Return the atomic ordering requirements for this memory operation.
void setFlags(Flags f)
Bitwise OR the current flags with the given flags.
const MachinePointerInfo & getPointerInfo() const
Flags getFlags() const
Return the raw flags of the source value,.
Align getAlign() const
Return the minimum known alignment in bytes of the actual memory reference.
LocationSize getSizeInBits() const
Return the size in bits of the memory reference.
bool isDereferenceable() const
friend bool operator==(const MachineMemOperand &LHS, const MachineMemOperand &RHS)
AAMDNodes getAAInfo() const
Return the AA tags for the memory reference.
void setValue(const PseudoSourceValue *NewSV)
const Value * getValue() const
Return the base address of the memory access.
Align getBaseAlign() const
Return the minimum known alignment in bytes of the base address, without the offset.
int64_t getOffset() const
For normal values, this is a byte offset added to the base address.
Manage lifetime of a slot tracker for printing IR.
A discriminated union of two or more pointer types, with the discriminator in the low bit of the poin...
bool isNull() const
Test if the pointer held in the union is null, regardless of which type it is.
Special value supplied for machine level alias analysis.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
TargetInstrInfo - Interface to description of machine instruction set.
LLVM Value Representation.
This class implements an extremely fast bulk output stream that can only output to a stream.
@ C
The default llvm calling convention, compatible with C.
@ System
Synchronized with respect to all concurrently executing threads.
This is an optimization pass for GlobalISel generic memory operations.
AtomicOrdering getMergedAtomicOrdering(AtomicOrdering AO, AtomicOrdering Other)
Return a single atomic ordering that is at least as strong as both the AO and Other orderings for an ...
AtomicOrdering
Atomic ordering for LLVM's memory model.
@ LLVM_MARK_AS_BITMASK_ENUM
A collection of metadata nodes that might be associated with a memory access used by the alias-analys...
This struct is a compact representation of a valid (non-zero power of two) alignment.
This class contains a discriminated union of information about pointers in memory operands,...
static MachinePointerInfo getJumpTable(MachineFunction &MF)
Return a MachinePointerInfo record that refers to a jump table entry.
bool isDereferenceable(unsigned Size, LLVMContext &C, const DataLayout &DL) const
Return true if memory region [V, V+Offset+Size) is known to be dereferenceable.
MachinePointerInfo(const PseudoSourceValue *v, int64_t offset=0, uint8_t ID=0)
unsigned getAddrSpace() const
Return the LLVM IR address space number that this pointer points into.
static MachinePointerInfo getStack(MachineFunction &MF, int64_t Offset, uint8_t ID=0)
Stack pointer relative access.
MachinePointerInfo(unsigned AddressSpace=0, int64_t offset=0)
int64_t Offset
Offset - This is an offset from the base Value*.
MachinePointerInfo(PointerUnion< const Value *, const PseudoSourceValue * > v, int64_t offset=0, uint8_t ID=0)
PointerUnion< const Value *, const PseudoSourceValue * > V
This is the IR pointer value for the access, or it is null if unknown.
static MachinePointerInfo getConstantPool(MachineFunction &MF)
Return a MachinePointerInfo record that refers to the constant pool.
MachinePointerInfo getWithOffset(int64_t O) const
static MachinePointerInfo getUnknownStack(MachineFunction &MF)
Stack memory without other information.
static MachinePointerInfo getGOT(MachineFunction &MF)
Return a MachinePointerInfo record that refers to a GOT entry.
MachinePointerInfo(const Value *v, int64_t offset=0, uint8_t ID=0)
static MachinePointerInfo getFixedStack(MachineFunction &MF, int FI, int64_t Offset=0)
Return a MachinePointerInfo record that refers to the specified FrameIndex.
