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1//===-- llvm/CodeGen/MachineBasicBlock.cpp ----------------------*- C++ -*-===//

2//

3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.

4// See https://llvm.org/LICENSE.txt for license information.

5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception

6//

7//===----------------------------------------------------------------------===//

8//

9// Collect the sequence of machine instructions for a basic block.

10//

11//===----------------------------------------------------------------------===//

13#include "llvm/CodeGen/MachineBasicBlock.h"

14#include "llvm/ADT/STLExtras.h"

15#include "llvm/ADT/StringExtras.h"

16#include "llvm/CodeGen/LiveIntervals.h"

17#include "llvm/CodeGen/LivePhysRegs.h"

18#include "llvm/CodeGen/LiveVariables.h"

19#include "llvm/CodeGen/MachineDomTreeUpdater.h"

20#include "llvm/CodeGen/MachineDominators.h"

21#include "llvm/CodeGen/MachineFunction.h"

22#include "llvm/CodeGen/MachineInstrBuilder.h"

23#include "llvm/CodeGen/MachineJumpTableInfo.h"

24#include "llvm/CodeGen/MachineLoopInfo.h"

25#include "llvm/CodeGen/MachinePostDominators.h"

26#include "llvm/CodeGen/MachineRegisterInfo.h"

27#include "llvm/CodeGen/SlotIndexes.h"

28#include "llvm/CodeGen/TargetInstrInfo.h"

29#include "llvm/CodeGen/TargetLowering.h"

30#include "llvm/CodeGen/TargetRegisterInfo.h"

31#include "llvm/CodeGen/TargetSubtargetInfo.h"

32#include "llvm/Config/llvm-config.h"

33#include "llvm/IR/BasicBlock.h"

34#include "llvm/IR/DebugInfoMetadata.h"

35#include "llvm/IR/ModuleSlotTracker.h"

36#include "llvm/MC/MCAsmInfo.h"

37#include "llvm/MC/MCContext.h"

38#include "llvm/Support/Debug.h"

39#include "llvm/Support/raw_ostream.h"

40#include "llvm/Target/TargetMachine.h"

41#include <algorithm>

42#include <cmath>

43using namespacellvm;

45#define DEBUG_TYPE "codegen"

47staticcl::opt<bool>PrintSlotIndexes(

48"print-slotindexes",

49cl::desc("When printing machine IR, annotate instructions and blocks with "

50"SlotIndexes when available"),

51cl::init(true),cl::Hidden);

53MachineBasicBlock::MachineBasicBlock(MachineFunction &MF,constBasicBlock *B)

54 : BB(B),Number(-1), xParent(&MF) {

55 Insts.Parent =this;

56if (B)

57 IrrLoopHeaderWeight =B->getIrrLoopHeaderWeight();

58}

60MachineBasicBlock::~MachineBasicBlock() =default;

62/// Return the MCSymbol for this basic block.

63MCSymbol *MachineBasicBlock::getSymbol() const{

64if (!CachedMCSymbol) {

65constMachineFunction *MF =getParent();

66MCContext &Ctx = MF->getContext();

68// We emit a non-temporary symbol -- with a descriptive name -- if it begins

69// a section (with basic block sections). Otherwise we fall back to use temp

70// label.

71if (MF->hasBBSections() &&isBeginSection()) {

72SmallString<5> Suffix;

73if (SectionID ==MBBSectionID::ColdSectionID) {

74 Suffix +=".cold";

75 }elseif (SectionID ==MBBSectionID::ExceptionSectionID) {

76 Suffix +=".eh";

77 }else {

78// For symbols that represent basic block sections, we add ".__part." to

79// allow tools like symbolizers to know that this represents a part of

80// the original function.

81 Suffix = (Suffix +Twine(".__part.") +Twine(SectionID.Number)).str();

82 }

83 CachedMCSymbol = Ctx.getOrCreateSymbol(MF->getName() + Suffix);

84 }else {

85// If the block occurs as label in inline assembly, parsing the assembly

86// needs an actual label name => set AlwaysEmit in these cases.

87 CachedMCSymbol = Ctx.createBlockSymbol(

88"BB" +Twine(MF->getFunctionNumber()) +"_" +Twine(getNumber()),

89/*AlwaysEmit=*/hasLabelMustBeEmitted());

90 }

91 }

92return CachedMCSymbol;

93}

95MCSymbol *MachineBasicBlock::getEHCatchretSymbol() const{

96if (!CachedEHCatchretMCSymbol) {

97constMachineFunction *MF =getParent();

98SmallString<128> SymbolName;

99raw_svector_ostream(SymbolName)

100 <<"$ehgcr_" << MF->getFunctionNumber() <<'_' <<getNumber();

101 CachedEHCatchretMCSymbol = MF->getContext().getOrCreateSymbol(SymbolName);

102 }

103return CachedEHCatchretMCSymbol;

104}

105

106MCSymbol *MachineBasicBlock::getEndSymbol() const{

107if (!CachedEndMCSymbol) {

108constMachineFunction *MF =getParent();

109MCContext &Ctx = MF->getContext();

110 CachedEndMCSymbol = Ctx.createBlockSymbol(

111"BB_END" +Twine(MF->getFunctionNumber()) +"_" +Twine(getNumber()),

112/*AlwaysEmit=*/false);

113 }

114return CachedEndMCSymbol;

115}

116

117raw_ostream &llvm::operator<<(raw_ostream &OS,constMachineBasicBlock &MBB) {

118MBB.print(OS);

119returnOS;

120}

121

122Printable llvm::printMBBReference(constMachineBasicBlock &MBB) {

123returnPrintable([&MBB](raw_ostream &OS) {returnMBB.printAsOperand(OS); });

124}

125

126/// When an MBB is added to an MF, we need to update the parent pointer of the

127/// MBB, the MBB numbering, and any instructions in the MBB to be on the right

128/// operand list for registers.

129///

130/// MBBs start out as #-1. When a MBB is added to a MachineFunction, it

131/// gets the next available unique MBB number. If it is removed from a

132/// MachineFunction, it goes back to being #-1.

133voidilist_callback_traits<MachineBasicBlock>::addNodeToList(

134MachineBasicBlock *N) {

135MachineFunction &MF = *N->getParent();

136N->Number = MF.addToMBBNumbering(N);

137

138// Make sure the instructions have their operands in the reginfo lists.

139MachineRegisterInfo &RegInfo = MF.getRegInfo();

140for (MachineInstr &MI :N->instrs())

141MI.addRegOperandsToUseLists(RegInfo);

142}

143

144voidilist_callback_traits<MachineBasicBlock>::removeNodeFromList(

145MachineBasicBlock *N) {

146N->getParent()->removeFromMBBNumbering(N->Number);

147N->Number = -1;

148}

149

150/// When we add an instruction to a basic block list, we update its parent

151/// pointer and add its operands from reg use/def lists if appropriate.

152voidilist_traits<MachineInstr>::addNodeToList(MachineInstr *N) {

153assert(!N->getParent() &&"machine instruction already in a basic block");

154N->setParent(Parent);

155

156// Add the instruction's register operands to their corresponding

157// use/def lists.

158MachineFunction *MF = Parent->getParent();

159N->addRegOperandsToUseLists(MF->getRegInfo());

160 MF->handleInsertion(*N);

161}

162

163/// When we remove an instruction from a basic block list, we update its parent

164/// pointer and remove its operands from reg use/def lists if appropriate.

165voidilist_traits<MachineInstr>::removeNodeFromList(MachineInstr *N) {

166assert(N->getParent() &&"machine instruction not in a basic block");

167

168// Remove from the use/def lists.

169if (MachineFunction *MF =N->getMF()) {

170 MF->handleRemoval(*N);

171N->removeRegOperandsFromUseLists(MF->getRegInfo());

172 }

173

174N->setParent(nullptr);

175}

176

177/// When moving a range of instructions from one MBB list to another, we need to

178/// update the parent pointers and the use/def lists.

179voidilist_traits<MachineInstr>::transferNodesFromList(ilist_traits &FromList,

180 instr_iteratorFirst,

181 instr_iteratorLast) {

182assert(Parent->getParent() == FromList.Parent->getParent() &&

183"cannot transfer MachineInstrs between MachineFunctions");

184

185// If it's within the same BB, there's nothing to do.

186if (this == &FromList)

187return;

188

189assert(Parent != FromList.Parent &&"Two lists have the same parent?");

190

191// If splicing between two blocks within the same function, just update the

192// parent pointers.

193for (;First !=Last; ++First)

194First->setParent(Parent);

195}

196

197voidilist_traits<MachineInstr>::deleteNode(MachineInstr *MI) {

198assert(!MI->getParent() &&"MI is still in a block!");

199 Parent->getParent()->deleteMachineInstr(MI);

200}

201

202MachineBasicBlock::iterator MachineBasicBlock::getFirstNonPHI() {

203instr_iterator I =instr_begin(), E =instr_end();

204while (I != E &&I->isPHI())

205 ++I;

206assert((I == E || !I->isInsideBundle()) &&

207"First non-phi MI cannot be inside a bundle!");

208returnI;

209}

210

211MachineBasicBlock::iterator

212MachineBasicBlock::SkipPHIsAndLabels(MachineBasicBlock::iterator I) {

213constTargetInstrInfo *TII =getParent()->getSubtarget().getInstrInfo();

214

215iterator E =end();

216while (I != E && (I->isPHI() ||I->isPosition() ||

217TII->isBasicBlockPrologue(*I)))

218 ++I;

219// FIXME: This needs to change if we wish to bundle labels

220// inside the bundle.

221assert((I == E || !I->isInsideBundle()) &&

222"First non-phi / non-label instruction is inside a bundle!");

223returnI;

224}

225

226MachineBasicBlock::iterator

227MachineBasicBlock::SkipPHIsLabelsAndDebug(MachineBasicBlock::iterator I,

228Register Reg,bool SkipPseudoOp) {

229constTargetInstrInfo *TII =getParent()->getSubtarget().getInstrInfo();

230

231iterator E =end();

232while (I != E && (I->isPHI() ||I->isPosition() ||I->isDebugInstr() ||

233 (SkipPseudoOp &&I->isPseudoProbe()) ||

234TII->isBasicBlockPrologue(*I, Reg)))

235 ++I;

236// FIXME: This needs to change if we wish to bundle labels / dbg_values

237// inside the bundle.

238assert((I == E || !I->isInsideBundle()) &&

239"First non-phi / non-label / non-debug "

240"instruction is inside a bundle!");

241returnI;

242}

243

244MachineBasicBlock::iterator MachineBasicBlock::getFirstTerminator() {

245iterator B =begin(), E =end(),I = E;

246while (I !=B && ((--I)->isTerminator() ||I->isDebugInstr()))

247 ;/*noop */

248while (I != E && !I->isTerminator())

249 ++I;

250returnI;

251}

252

253MachineBasicBlock::instr_iterator MachineBasicBlock::getFirstInstrTerminator() {

254instr_iterator B =instr_begin(), E =instr_end(),I = E;

255while (I !=B && ((--I)->isTerminator() ||I->isDebugInstr()))

256 ;/*noop */

257while (I != E && !I->isTerminator())

258 ++I;

259returnI;

260}

261

262MachineBasicBlock::iterator MachineBasicBlock::getFirstTerminatorForward() {

263returnfind_if(instrs(), [](auto &II) {returnII.isTerminator(); });

264}

265

266MachineBasicBlock::iterator

267MachineBasicBlock::getFirstNonDebugInstr(bool SkipPseudoOp) {

268// Skip over begin-of-block dbg_value instructions.

269returnskipDebugInstructionsForward(begin(),end(), SkipPseudoOp);

270}

271

272MachineBasicBlock::iterator

273MachineBasicBlock::getLastNonDebugInstr(bool SkipPseudoOp) {

274// Skip over end-of-block dbg_value instructions.

275instr_iterator B =instr_begin(),I =instr_end();

276while (I !=B) {

277 --I;

278// Return instruction that starts a bundle.

279if (I->isDebugInstr() ||I->isInsideBundle())

280continue;

281if (SkipPseudoOp &&I->isPseudoProbe())

282continue;

283returnI;

284 }

285// The block is all debug values.

286returnend();

287}

288

289boolMachineBasicBlock::hasEHPadSuccessor() const{

290for (constMachineBasicBlock *Succ :successors())

291if (Succ->isEHPad())

292returntrue;

293returnfalse;

294}

295

296boolMachineBasicBlock::isEntryBlock() const{

297returngetParent()->begin() ==getIterator();

298}

299

300#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)

301LLVM_DUMP_METHODvoidMachineBasicBlock::dump() const{

302print(dbgs());

303}

304#endif

305

306boolMachineBasicBlock::mayHaveInlineAsmBr() const{

307for (constMachineBasicBlock *Succ :successors()) {

308if (Succ->isInlineAsmBrIndirectTarget())

309returntrue;

310 }

311returnfalse;

312}

313

314boolMachineBasicBlock::isLegalToHoistInto() const{

315if (isReturnBlock() ||hasEHPadSuccessor() ||mayHaveInlineAsmBr())

316returnfalse;

317returntrue;

318}

319

320boolMachineBasicBlock::hasName() const{

321if (constBasicBlock *LBB =getBasicBlock())

322return LBB->hasName();

323returnfalse;

324}

325

326StringRef MachineBasicBlock::getName() const{

327if (constBasicBlock *LBB =getBasicBlock())

328return LBB->getName();

329else

330returnStringRef("", 0);

331}

332

333/// Return a hopefully unique identifier for this block.

334std::stringMachineBasicBlock::getFullName() const{

335 std::stringName;

336if (getParent())

337Name = (getParent()->getName() +":").str();

338if (getBasicBlock())

339Name +=getBasicBlock()->getName();

340else

341Name += ("BB" +Twine(getNumber())).str();

342returnName;

343}

344

345voidMachineBasicBlock::print(raw_ostream &OS,constSlotIndexes *Indexes,

346bool IsStandalone) const{

347constMachineFunction *MF =getParent();

348if (!MF) {

349OS <<"Can't print out MachineBasicBlock because parent MachineFunction"

350 <<" is null\n";

351return;

352 }

353constFunction &F = MF->getFunction();

354constModule *M =F.getParent();

355ModuleSlotTracker MST(M);

356 MST.incorporateFunction(F);

357print(OS, MST, Indexes, IsStandalone);

358}

359

360voidMachineBasicBlock::print(raw_ostream &OS,ModuleSlotTracker &MST,

361constSlotIndexes *Indexes,

362bool IsStandalone) const{

363constMachineFunction *MF =getParent();

364if (!MF) {

365OS <<"Can't print out MachineBasicBlock because parent MachineFunction"

366 <<" is null\n";

367return;

368 }

369

370if (Indexes &&PrintSlotIndexes)

371OS << Indexes->getMBBStartIdx(this) <<'\t';

372

373printName(OS,PrintNameIr |PrintNameAttributes, &MST);

374OS <<":\n";

375

376constTargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();

377constMachineRegisterInfo &MRI = MF->getRegInfo();

378constTargetInstrInfo &TII = *getParent()->getSubtarget().getInstrInfo();

379bool HasLineAttributes =false;

380

381// Print the preds of this block according to the CFG.

382if (!pred_empty() && IsStandalone) {

383if (Indexes)OS <<'\t';

384// Don't indent(2), align with previous line attributes.

385OS <<"; predecessors: ";

386 ListSeparator LS;

387for (auto *Pred :predecessors())

388OS << LS <<printMBBReference(*Pred);

389OS <<'\n';

390 HasLineAttributes =true;

391 }

392

393if (!succ_empty()) {

394if (Indexes)OS <<'\t';

395// Print the successors

396OS.indent(2) <<"successors: ";

397 ListSeparator LS;

398for (autoI =succ_begin(), E =succ_end();I != E; ++I) {

399OS << LS <<printMBBReference(**I);

400if (!Probs.empty())

401OS <<'('

402 <<format("0x%08" PRIx32,getSuccProbability(I).getNumerator())

403 <<')';

404 }

405if (!Probs.empty() && IsStandalone) {

406// Print human readable probabilities as comments.

407OS <<"; ";

408 ListSeparator LS;

409for (autoI =succ_begin(), E =succ_end();I != E; ++I) {

410constBranchProbability &BP =getSuccProbability(I);

411OS << LS <<printMBBReference(**I) <<'('

412 <<format("%.2f%%",

413 rint(((double)BP.getNumerator() / BP.getDenominator()) *

414 100.0 * 100.0) /

415 100.0)

416 <<')';

417 }

418 }

419

420OS <<'\n';

421 HasLineAttributes =true;

422 }

423

424if (!livein_empty() &&MRI.tracksLiveness()) {

425if (Indexes)OS <<'\t';

426OS.indent(2) <<"liveins: ";

427

428 ListSeparator LS;

429for (constauto &LI :liveins()) {

430OS << LS <<printReg(LI.PhysReg,TRI);

431if (!LI.LaneMask.all())

432OS <<":0x" <<PrintLaneMask(LI.LaneMask);

433 }

434 HasLineAttributes =true;

435 }

436

437if (HasLineAttributes)

438OS <<'\n';

439

440bool IsInBundle =false;

441for (constMachineInstr &MI :instrs()) {

442if (Indexes &&PrintSlotIndexes) {

443if (Indexes->hasIndex(MI))

444OS << Indexes->getInstructionIndex(MI);

445OS <<'\t';

446 }

447

448if (IsInBundle && !MI.isInsideBundle()) {

449OS.indent(2) <<"}\n";

450 IsInBundle =false;

451 }

452

453OS.indent(IsInBundle ? 4 : 2);

454MI.print(OS, MST, IsStandalone,/*SkipOpers=*/false,/*SkipDebugLoc=*/false,

455/*AddNewLine=*/false, &TII);

456

457if (!IsInBundle &&MI.getFlag(MachineInstr::BundledSucc)) {

458OS <<" {";

459 IsInBundle =true;

460 }

461OS <<'\n';

462 }

463

464if (IsInBundle)

465OS.indent(2) <<"}\n";

466

467if (IrrLoopHeaderWeight && IsStandalone) {

468if (Indexes)OS <<'\t';

469OS.indent(2) <<"; Irreducible loop header weight: " << *IrrLoopHeaderWeight

470 <<'\n';

471 }

472}

473

474/// Print the basic block's name as:

475///

476/// bb.{number}[.{ir-name}] [(attributes...)]

477///

478/// The {ir-name} is only printed when the \ref PrintNameIr flag is passed

479/// (which is the default). If the IR block has no name, it is identified

480/// numerically using the attribute syntax as "(%ir-block.{ir-slot})".

481///

482/// When the \ref PrintNameAttributes flag is passed, additional attributes

483/// of the block are printed when set.

484///

485/// \param printNameFlags Combination of \ref PrintNameFlag flags indicating

486/// the parts to print.

487/// \param moduleSlotTracker Optional ModuleSlotTracker. This method will

488/// incorporate its own tracker when necessary to

489/// determine the block's IR name.

490voidMachineBasicBlock::printName(raw_ostream &os,unsigned printNameFlags,

491ModuleSlotTracker *moduleSlotTracker) const{

492 os <<"bb." <<getNumber();

493bool hasAttributes =false;

494

495auto PrintBBRef = [&](constBasicBlock *bb) {

496 os <<"%ir-block.";

497if (bb->hasName()) {

498 os << bb->getName();

499 }else {

500int slot = -1;

501

502if (moduleSlotTracker) {

503 slot = moduleSlotTracker->getLocalSlot(bb);

504 }elseif (bb->getParent()) {

505ModuleSlotTracker tmpTracker(bb->getModule(),false);

506 tmpTracker.incorporateFunction(*bb->getParent());

507 slot = tmpTracker.getLocalSlot(bb);

508 }

509

510if (slot == -1)

511 os <<"<ir-block badref>";

512else

513 os << slot;

514 }

515 };

516

517if (printNameFlags &PrintNameIr) {

518if (constauto *bb =getBasicBlock()) {

519if (bb->hasName()) {

520 os <<'.' << bb->getName();

521 }else {

522 hasAttributes =true;

523 os <<" (";

524 PrintBBRef(bb);

525 }

526 }

527 }

528

529if (printNameFlags &PrintNameAttributes) {

530if (isMachineBlockAddressTaken()) {

531 os << (hasAttributes ?", " :" (");

532 os <<"machine-block-address-taken";

533 hasAttributes =true;

534 }

535if (isIRBlockAddressTaken()) {

536 os << (hasAttributes ?", " :" (");

537 os <<"ir-block-address-taken ";

538 PrintBBRef(getAddressTakenIRBlock());

539 hasAttributes =true;

540 }

541if (isEHPad()) {

542 os << (hasAttributes ?", " :" (");

543 os <<"landing-pad";

544 hasAttributes =true;

545 }

546if (isInlineAsmBrIndirectTarget()) {

547 os << (hasAttributes ?", " :" (");

548 os <<"inlineasm-br-indirect-target";

549 hasAttributes =true;

550 }

551if (isEHFuncletEntry()) {

552 os << (hasAttributes ?", " :" (");

553 os <<"ehfunclet-entry";

554 hasAttributes =true;

555 }

556if (getAlignment() !=Align(1)) {

557 os << (hasAttributes ?", " :" (");

558 os <<"align " <<getAlignment().value();

559 hasAttributes =true;

560 }

561if (getSectionID() !=MBBSectionID(0)) {

562 os << (hasAttributes ?", " :" (");

563 os <<"bbsections ";

564switch (getSectionID().Type) {

565caseMBBSectionID::SectionType::Exception:

566 os <<"Exception";

567break;

568caseMBBSectionID::SectionType::Cold:

569 os <<"Cold";

570break;

571default:

572 os <<getSectionID().Number;

573 }

574 hasAttributes =true;

575 }

576if (getBBID().has_value()) {

577 os << (hasAttributes ?", " :" (");

578 os <<"bb_id " <<getBBID()->BaseID;

579if (getBBID()->CloneID != 0)

580 os <<" " <<getBBID()->CloneID;

581 hasAttributes =true;

582 }

583if (CallFrameSize != 0) {

584 os << (hasAttributes ?", " :" (");

585 os <<"call-frame-size " << CallFrameSize;

586 hasAttributes =true;

587 }

588 }

589

590if (hasAttributes)

591 os <<')';

592}

593

594voidMachineBasicBlock::printAsOperand(raw_ostream &OS,

595bool/*PrintType*/) const{

596OS <<'%';

597printName(OS, 0);

598}

599

600voidMachineBasicBlock::removeLiveIn(MCRegister Reg,LaneBitmask LaneMask) {

601 LiveInVector::iteratorI =find_if(

602 LiveIns, [Reg](constRegisterMaskPair &LI) {return LI.PhysReg == Reg; });

603if (I == LiveIns.end())

604return;

605

606I->LaneMask &= ~LaneMask;

607if (I->LaneMask.none())

608 LiveIns.erase(I);

609}

610

611MachineBasicBlock::livein_iterator

612MachineBasicBlock::removeLiveIn(MachineBasicBlock::livein_iterator I) {

613// Get non-const version of iterator.

614 LiveInVector::iterator LI = LiveIns.begin() + (I - LiveIns.begin());

615return LiveIns.erase(LI);

616}

617

618boolMachineBasicBlock::isLiveIn(MCRegister Reg,LaneBitmask LaneMask) const{

619livein_iterator I =find_if(

620 LiveIns, [Reg](constRegisterMaskPair &LI) {return LI.PhysReg == Reg; });

621returnI !=livein_end() && (I->LaneMask & LaneMask).any();

622}

623

624voidMachineBasicBlock::sortUniqueLiveIns() {

625llvm::sort(LiveIns,

626 [](constRegisterMaskPair &LI0,constRegisterMaskPair &LI1) {

627return LI0.PhysReg < LI1.PhysReg;

628 });

629// Liveins are sorted by physreg now we can merge their lanemasks.

630 LiveInVector::const_iteratorI = LiveIns.begin();

631 LiveInVector::const_iterator J;

632 LiveInVector::iterator Out = LiveIns.begin();

633for (;I != LiveIns.end(); ++Out,I = J) {

634MCRegister PhysReg =I->PhysReg;

635LaneBitmask LaneMask =I->LaneMask;

636for (J = std::next(I); J != LiveIns.end() && J->PhysReg == PhysReg; ++J)

637 LaneMask |= J->LaneMask;

638 Out->PhysReg = PhysReg;

639 Out->LaneMask = LaneMask;

640 }

641 LiveIns.erase(Out, LiveIns.end());

642}

643

644Register

645MachineBasicBlock::addLiveIn(MCRegister PhysReg,constTargetRegisterClass *RC) {

646assert(getParent() &&"MBB must be inserted in function");

647assert(PhysReg.isPhysical() &&"Expected physreg");

648assert(RC &&"Register class is required");

649assert((isEHPad() ||this == &getParent()->front()) &&

650"Only the entry block and landing pads can have physreg live ins");

651

652bool LiveIn =isLiveIn(PhysReg);

653iterator I =SkipPHIsAndLabels(begin()), E =end();

654MachineRegisterInfo &MRI =getParent()->getRegInfo();

655constTargetInstrInfo &TII = *getParent()->getSubtarget().getInstrInfo();

656

657// Look for an existing copy.

658if (LiveIn)

659for (;I != E &&I->isCopy(); ++I)

660if (I->getOperand(1).getReg() == PhysReg) {

661Register VirtReg =I->getOperand(0).getReg();

662if (!MRI.constrainRegClass(VirtReg, RC))

663llvm_unreachable("Incompatible live-in register class.");

664return VirtReg;

665 }

666

667// No luck, create a virtual register.

668Register VirtReg =MRI.createVirtualRegister(RC);

669BuildMI(*this,I,DebugLoc(),TII.get(TargetOpcode::COPY), VirtReg)

670 .addReg(PhysReg,RegState::Kill);

671if (!LiveIn)

672addLiveIn(PhysReg);

673return VirtReg;

674}

675

676voidMachineBasicBlock::moveBefore(MachineBasicBlock *NewAfter) {

677getParent()->splice(NewAfter->getIterator(),getIterator());

678}

679

680voidMachineBasicBlock::moveAfter(MachineBasicBlock *NewBefore) {

681getParent()->splice(++NewBefore->getIterator(),getIterator());

682}

683

684staticintfindJumpTableIndex(constMachineBasicBlock &MBB) {

685MachineBasicBlock::const_iterator TerminatorI =MBB.getFirstTerminator();

686if (TerminatorI ==MBB.end())

687return -1;

688constMachineInstr &Terminator = *TerminatorI;

689constTargetInstrInfo *TII =MBB.getParent()->getSubtarget().getInstrInfo();

690returnTII->getJumpTableIndex(Terminator);

691}

692

693voidMachineBasicBlock::updateTerminator(

694MachineBasicBlock *PreviousLayoutSuccessor) {

695LLVM_DEBUG(dbgs() <<"Updating terminators on " <<printMBBReference(*this)

696 <<"\n");

697

698constTargetInstrInfo *TII =getParent()->getSubtarget().getInstrInfo();

699// A block with no successors has no concerns with fall-through edges.

700if (this->succ_empty())

701return;

702

703MachineBasicBlock *TBB =nullptr, *FBB =nullptr;

704SmallVector<MachineOperand, 4>Cond;

705DebugLoc DL =findBranchDebugLoc();

706boolB =TII->analyzeBranch(*this,TBB, FBB,Cond);

707 (void)B;

708assert(!B &&"UpdateTerminators requires analyzable predecessors!");

709if (Cond.empty()) {

710if (TBB) {

711// The block has an unconditional branch. If its successor is now its

712// layout successor, delete the branch.

713if (isLayoutSuccessor(TBB))

714TII->removeBranch(*this);

715 }else {

716// The block has an unconditional fallthrough, or the end of the block is

717// unreachable.

718

719// Unfortunately, whether the end of the block is unreachable is not

720// immediately obvious; we must fall back to checking the successor list,

721// and assuming that if the passed in block is in the succesor list and

722// not an EHPad, it must be the intended target.

723if (!PreviousLayoutSuccessor || !isSuccessor(PreviousLayoutSuccessor) ||

724 PreviousLayoutSuccessor->isEHPad())

725return;

726

727// If the unconditional successor block is not the current layout

728// successor, insert a branch to jump to it.

729if (!isLayoutSuccessor(PreviousLayoutSuccessor))

730TII->insertBranch(*this, PreviousLayoutSuccessor,nullptr,Cond,DL);

731 }

732return;

733 }

734

735if (FBB) {

736// The block has a non-fallthrough conditional branch. If one of its

737// successors is its layout successor, rewrite it to a fallthrough

738// conditional branch.

739if (isLayoutSuccessor(TBB)) {

740if (TII->reverseBranchCondition(Cond))

741return;

742TII->removeBranch(*this);

743TII->insertBranch(*this, FBB,nullptr,Cond,DL);

744 }elseif (isLayoutSuccessor(FBB)) {

745TII->removeBranch(*this);

746TII->insertBranch(*this,TBB,nullptr,Cond,DL);

747 }

748return;

749 }

750

751// We now know we're going to fallthrough to PreviousLayoutSuccessor.

752assert(PreviousLayoutSuccessor);

753assert(!PreviousLayoutSuccessor->isEHPad());

754assert(isSuccessor(PreviousLayoutSuccessor));

755

756if (PreviousLayoutSuccessor ==TBB) {

757// We had a fallthrough to the same basic block as the conditional jump

758// targets. Remove the conditional jump, leaving an unconditional

759// fallthrough or an unconditional jump.

760TII->removeBranch(*this);

761if (!isLayoutSuccessor(TBB)) {

762Cond.clear();

763TII->insertBranch(*this,TBB,nullptr,Cond,DL);

764 }

765return;

766 }

767

768// The block has a fallthrough conditional branch.

769if (isLayoutSuccessor(TBB)) {

770if (TII->reverseBranchCondition(Cond)) {

771// We can't reverse the condition, add an unconditional branch.

772Cond.clear();

773TII->insertBranch(*this, PreviousLayoutSuccessor,nullptr,Cond,DL);

774return;

775 }

776TII->removeBranch(*this);

777TII->insertBranch(*this, PreviousLayoutSuccessor,nullptr,Cond,DL);

778 }elseif (!isLayoutSuccessor(PreviousLayoutSuccessor)) {

779TII->removeBranch(*this);

780TII->insertBranch(*this,TBB, PreviousLayoutSuccessor,Cond,DL);

781 }

782}

783

784voidMachineBasicBlock::validateSuccProbs() const{

785#ifndef NDEBUG

786 int64_t Sum = 0;

787for (auto Prob : Probs)

788 Sum += Prob.getNumerator();

789// Due to precision issue, we assume that the sum of probabilities is one if

790// the difference between the sum of their numerators and the denominator is

791// no greater than the number of successors.

792assert((uint64_t)std::abs(Sum -BranchProbability::getDenominator()) <=

793 Probs.size() &&

794"The sum of successors's probabilities exceeds one.");

795#endif// NDEBUG

796}

797

798voidMachineBasicBlock::addSuccessor(MachineBasicBlock *Succ,

799BranchProbability Prob) {

800// Probability list is either empty (if successor list isn't empty, this means

801// disabled optimization) or has the same size as successor list.

802if (!(Probs.empty() && !Successors.empty()))

803 Probs.push_back(Prob);

804 Successors.push_back(Succ);

805 Succ->addPredecessor(this);

806}

807

808voidMachineBasicBlock::addSuccessorWithoutProb(MachineBasicBlock *Succ) {

809// We need to make sure probability list is either empty or has the same size

810// of successor list. When this function is called, we can safely delete all

811// probability in the list.

812 Probs.clear();

813 Successors.push_back(Succ);

814 Succ->addPredecessor(this);

815}

816

817voidMachineBasicBlock::splitSuccessor(MachineBasicBlock *Old,

818MachineBasicBlock *New,

819bool NormalizeSuccProbs) {

820succ_iterator OldI =llvm::find(successors(), Old);

821assert(OldI !=succ_end() &&"Old is not a successor of this block!");

822assert(!llvm::is_contained(successors(), New) &&

823"New is already a successor of this block!");

824

825// Add a new successor with equal probability as the original one. Note

826// that we directly copy the probability using the iterator rather than

827// getting a potentially synthetic probability computed when unknown. This

828// preserves the probabilities as-is and then we can renormalize them and

829// query them effectively afterward.

830addSuccessor(New, Probs.empty() ?BranchProbability::getUnknown()

831 : *getProbabilityIterator(OldI));

832if (NormalizeSuccProbs)

833normalizeSuccProbs();

834}

835

836voidMachineBasicBlock::removeSuccessor(MachineBasicBlock *Succ,

837bool NormalizeSuccProbs) {

838succ_iterator I =find(Successors, Succ);

839removeSuccessor(I, NormalizeSuccProbs);

840}

841

842MachineBasicBlock::succ_iterator

843MachineBasicBlock::removeSuccessor(succ_iterator I,bool NormalizeSuccProbs) {

844assert(I != Successors.end() &&"Not a current successor!");

845

846// If probability list is empty it means we don't use it (disabled

847// optimization).

848if (!Probs.empty()) {

849 probability_iterator WI = getProbabilityIterator(I);

850 Probs.erase(WI);

851if (NormalizeSuccProbs)

852normalizeSuccProbs();

853 }

854

855 (*I)->removePredecessor(this);

856return Successors.erase(I);

857}

858

859voidMachineBasicBlock::replaceSuccessor(MachineBasicBlock *Old,

860MachineBasicBlock *New) {

861if (Old == New)

862return;

863

864succ_iterator E =succ_end();

865succ_iterator NewI = E;

866succ_iterator OldI = E;

867for (succ_iterator I =succ_begin();I != E; ++I) {

868if (*I == Old) {

869 OldI =I;

870if (NewI != E)

871break;

872 }

873if (*I == New) {

874 NewI =I;

875if (OldI != E)

876break;

877 }

878 }

879assert(OldI != E &&"Old is not a successor of this block");

880

881// If New isn't already a successor, let it take Old's place.

882if (NewI == E) {

883 Old->removePredecessor(this);

884 New->addPredecessor(this);

885 *OldI = New;

886return;

887 }

888

889// New is already a successor.

890// Update its probability instead of adding a duplicate edge.

891if (!Probs.empty()) {

892auto ProbIter = getProbabilityIterator(NewI);

893if (!ProbIter->isUnknown())

894 *ProbIter += *getProbabilityIterator(OldI);

895 }

896removeSuccessor(OldI);

897}

898

899voidMachineBasicBlock::copySuccessor(constMachineBasicBlock *Orig,

900succ_iterator I) {

901if (!Orig->Probs.empty())

902addSuccessor(*I, Orig->getSuccProbability(I));

903else

904addSuccessorWithoutProb(*I);

905}

906

907void MachineBasicBlock::addPredecessor(MachineBasicBlock *Pred) {

908 Predecessors.push_back(Pred);

909}

910

911void MachineBasicBlock::removePredecessor(MachineBasicBlock *Pred) {

912pred_iterator I =find(Predecessors, Pred);

913assert(I != Predecessors.end() &&"Pred is not a predecessor of this block!");

914 Predecessors.erase(I);

915}

916

917voidMachineBasicBlock::transferSuccessors(MachineBasicBlock *FromMBB) {

918if (this == FromMBB)

919return;

920

921while (!FromMBB->succ_empty()) {

922MachineBasicBlock *Succ = *FromMBB->succ_begin();

923

924// If probability list is empty it means we don't use it (disabled

925// optimization).

926if (!FromMBB->Probs.empty()) {

927auto Prob = *FromMBB->Probs.begin();

928addSuccessor(Succ, Prob);

929 }else

930addSuccessorWithoutProb(Succ);

931

932 FromMBB->removeSuccessor(Succ);

933 }

934}

935

936void

937MachineBasicBlock::transferSuccessorsAndUpdatePHIs(MachineBasicBlock *FromMBB) {

938if (this == FromMBB)

939return;

940

941while (!FromMBB->succ_empty()) {

942MachineBasicBlock *Succ = *FromMBB->succ_begin();

943if (!FromMBB->Probs.empty()) {

944auto Prob = *FromMBB->Probs.begin();

945addSuccessor(Succ, Prob);

946 }else

947addSuccessorWithoutProb(Succ);

948 FromMBB->removeSuccessor(Succ);

949

950// Fix up any PHI nodes in the successor.

951 Succ->replacePhiUsesWith(FromMBB,this);

952 }

953normalizeSuccProbs();

954}

955

956boolMachineBasicBlock::isPredecessor(constMachineBasicBlock *MBB) const{

957returnis_contained(predecessors(),MBB);

958}

959

960boolMachineBasicBlock::isSuccessor(constMachineBasicBlock *MBB) const{

961returnis_contained(successors(),MBB);

962}

963

964boolMachineBasicBlock::isLayoutSuccessor(constMachineBasicBlock *MBB) const{

965MachineFunction::const_iterator I(this);

966return std::next(I) ==MachineFunction::const_iterator(MBB);

967}

968

969constMachineBasicBlock *MachineBasicBlock::getSingleSuccessor() const{

970return Successors.size() == 1 ? Successors[0] :nullptr;

971}

972

973constMachineBasicBlock *MachineBasicBlock::getSinglePredecessor() const{

974return Predecessors.size() == 1 ? Predecessors[0] :nullptr;

975}

976

977MachineBasicBlock *MachineBasicBlock::getFallThrough(bool JumpToFallThrough) {

978MachineFunction::iterator Fallthrough =getIterator();

979 ++Fallthrough;

980// If FallthroughBlock is off the end of the function, it can't fall through.

981if (Fallthrough ==getParent()->end())

982returnnullptr;

983

984// If FallthroughBlock isn't a successor, no fallthrough is possible.

985if (!isSuccessor(&*Fallthrough))

986returnnullptr;

987

988// Analyze the branches, if any, at the end of the block.

989MachineBasicBlock *TBB =nullptr, *FBB =nullptr;

990SmallVector<MachineOperand, 4>Cond;

991constTargetInstrInfo *TII =getParent()->getSubtarget().getInstrInfo();

992if (TII->analyzeBranch(*this,TBB, FBB,Cond)) {

993// If we couldn't analyze the branch, examine the last instruction.

994// If the block doesn't end in a known control barrier, assume fallthrough

995// is possible. The isPredicated check is needed because this code can be

996// called during IfConversion, where an instruction which is normally a

997// Barrier is predicated and thus no longer an actual control barrier.

998return (empty() || !back().isBarrier() ||TII->isPredicated(back()))

999 ? &*Fallthrough

1000 :nullptr;

1001 }

1002

1003// If there is no branch, control always falls through.

1004if (!TBB)return &*Fallthrough;

1005

1006// If there is some explicit branch to the fallthrough block, it can obviously

1007// reach, even though the branch should get folded to fall through implicitly.

1008if (JumpToFallThrough && (MachineFunction::iterator(TBB) == Fallthrough ||

1009MachineFunction::iterator(FBB) == Fallthrough))

1010return &*Fallthrough;

1011

1012// If it's an unconditional branch to some block not the fall through, it

1013// doesn't fall through.

1014if (Cond.empty())returnnullptr;

1015

1016// Otherwise, if it is conditional and has no explicit false block, it falls

1017// through.

1018return (FBB ==nullptr) ? &*Fallthrough :nullptr;

1019}

1020

1021boolMachineBasicBlock::canFallThrough() {

1022returngetFallThrough() !=nullptr;

1023}

1024

1025MachineBasicBlock *MachineBasicBlock::splitAt(MachineInstr &MI,

1026bool UpdateLiveIns,

1027LiveIntervals *LIS) {

1028MachineBasicBlock::iterator SplitPoint(&MI);

1029 ++SplitPoint;

1030

1031if (SplitPoint ==end()) {

1032// Don't bother with a new block.

1033returnthis;

1034 }

1035

1036MachineFunction *MF =getParent();

1037

1038LivePhysRegs LiveRegs;

1039if (UpdateLiveIns) {

1040// Make sure we add any physregs we define in the block as liveins to the

1041// new block.

1042MachineBasicBlock::iterator Prev(&MI);

1043 LiveRegs.init(*MF->getSubtarget().getRegisterInfo());

1044 LiveRegs.addLiveOuts(*this);

1045for (autoI =rbegin(), E = Prev.getReverse();I != E; ++I)

1046 LiveRegs.stepBackward(*I);

1047 }

1048

1049MachineBasicBlock *SplitBB = MF->CreateMachineBasicBlock(getBasicBlock());

1050

1051 MF->insert(++MachineFunction::iterator(this), SplitBB);

1052 SplitBB->splice(SplitBB->begin(),this, SplitPoint,end());

1053

1054 SplitBB->transferSuccessorsAndUpdatePHIs(this);

1055addSuccessor(SplitBB);

1056

1057if (UpdateLiveIns)

1058addLiveIns(*SplitBB, LiveRegs);

1059

1060if (LIS)

1061 LIS->insertMBBInMaps(SplitBB);

1062

1063return SplitBB;

1064}

1065

1066// Returns `true` if there are possibly other users of the jump table at

1067// `JumpTableIndex` except for the ones in `IgnoreMBB`.

1068staticbooljumpTableHasOtherUses(constMachineFunction &MF,

1069constMachineBasicBlock &IgnoreMBB,

1070int JumpTableIndex) {

1071assert(JumpTableIndex >= 0 &&"need valid index");

1072constMachineJumpTableInfo &MJTI = *MF.getJumpTableInfo();

1073constMachineJumpTableEntry &MJTE = MJTI.getJumpTables()[JumpTableIndex];

1074// Take any basic block from the table; every user of the jump table must

1075// show up in the predecessor list.

1076constMachineBasicBlock *MBB =nullptr;

1077for (MachineBasicBlock *B : MJTE.MBBs) {

1078if (B !=nullptr) {

1079MBB =B;

1080break;

1081 }

1082 }

1083if (MBB ==nullptr)

1084returntrue;// can't rule out other users if there isn't any block.

1085constTargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();

1086SmallVector<MachineOperand, 4>Cond;

1087for (MachineBasicBlock *Pred :MBB->predecessors()) {

1088if (Pred == &IgnoreMBB)

1089continue;

1090MachineBasicBlock *DummyT =nullptr;

1091MachineBasicBlock *DummyF =nullptr;

1092Cond.clear();

1093if (!TII.analyzeBranch(*Pred, DummyT, DummyF,Cond,

1094/*AllowModify=*/false)) {

1095// analyzable direct jump

1096continue;

1097 }

1098int PredJTI =findJumpTableIndex(*Pred);

1099if (PredJTI >= 0) {

1100if (PredJTI == JumpTableIndex)

1101returntrue;

1102continue;

1103 }

1104// Be conservative for unanalyzable jumps.

1105returntrue;

1106 }

1107returnfalse;

1108}

1109

1110classSlotIndexUpdateDelegate :publicMachineFunction::Delegate {

1111private:

1112MachineFunction &MF;

1113SlotIndexes *Indexes;

1114SmallSetVector<MachineInstr *, 2> Insertions;

1115

1116public:

1117SlotIndexUpdateDelegate(MachineFunction &MF,SlotIndexes *Indexes)

1118 : MF(MF), Indexes(Indexes) {

1119 MF.setDelegate(this);

1120 }

1121

1122~SlotIndexUpdateDelegate() {

1123 MF.resetDelegate(this);

1124for (autoMI : Insertions)

1125 Indexes->insertMachineInstrInMaps(*MI);

1126 }

1127

1128voidMF_HandleInsertion(MachineInstr &MI) override{

1129// This is called before MI is inserted into block so defer index update.

1130if (Indexes)

1131 Insertions.insert(&MI);

1132 }

1133

1134voidMF_HandleRemoval(MachineInstr &MI) override{

1135if (Indexes && !Insertions.remove(&MI))

1136 Indexes->removeMachineInstrFromMaps(MI);

1137 }

1138};

1139

1140#define GET_RESULT(RESULT, GETTER, INFIX) \

1141 [MF, P, MFAM]() { \

1142 if (P) { \

1143 auto *Wrapper = P->getAnalysisIfAvailable<RESULT##INFIX##WrapperPass>(); \

1144 return Wrapper ? &Wrapper->GETTER() : nullptr; \

1145 } \

1146 return MFAM->getCachedResult<RESULT##Analysis>(*MF); \

1147 }()

1148

1149MachineBasicBlock *MachineBasicBlock::SplitCriticalEdge(

1150MachineBasicBlock *Succ,Pass *P,MachineFunctionAnalysisManager *MFAM,

1151 std::vector<SparseBitVector<>> *LiveInSets,MachineDomTreeUpdater *MDTU) {

1152assert((P || MFAM) &&"Need a way to get analysis results!");

1153if (!canSplitCriticalEdge(Succ))

1154returnnullptr;

1155

1156MachineFunction *MF =getParent();

1157MachineBasicBlock *PrevFallthrough =getNextNode();

1158

1159MachineBasicBlock *NMBB = MF->CreateMachineBasicBlock();

1160 NMBB->setCallFrameSize(Succ->getCallFrameSize());

1161

1162// Is there an indirect jump with jump table?

1163bool ChangedIndirectJump =false;

1164int JTI =findJumpTableIndex(*this);

1165if (JTI >= 0) {

1166MachineJumpTableInfo &MJTI = *MF->getJumpTableInfo();

1167 MJTI.ReplaceMBBInJumpTable(JTI, Succ, NMBB);

1168 ChangedIndirectJump =true;

1169 }

1170

1171 MF->insert(std::next(MachineFunction::iterator(this)), NMBB);

1172LLVM_DEBUG(dbgs() <<"Splitting critical edge: " <<printMBBReference(*this)

1173 <<" -- " <<printMBBReference(*NMBB) <<" -- "

1174 <<printMBBReference(*Succ) <<'\n');

1175

1176LiveIntervals *LIS =GET_RESULT(LiveIntervals, getLIS, );

1177SlotIndexes *Indexes =GET_RESULT(SlotIndexes, getSI, );

1178if (LIS)

1179 LIS->insertMBBInMaps(NMBB);

1180elseif (Indexes)

1181 Indexes->insertMBBInMaps(NMBB);

1182

1183// On some targets like Mips, branches may kill virtual registers. Make sure

1184// that LiveVariables is properly updated after updateTerminator replaces the

1185// terminators.

1186LiveVariables *LV =GET_RESULT(LiveVariables, getLV, );

1187

1188// Collect a list of virtual registers killed by the terminators.

1189SmallVector<Register, 4> KilledRegs;

1190if (LV)

1191for (MachineInstr &MI :

1192llvm::make_range(getFirstInstrTerminator(),instr_end())) {

1193for (MachineOperand &MO :MI.all_uses()) {

1194if (MO.getReg() == 0 || !MO.isKill() || MO.isUndef())

1195continue;

1196Register Reg = MO.getReg();

1197if (Reg.isPhysical() || LV->getVarInfo(Reg).removeKill(MI)) {

1198 KilledRegs.push_back(Reg);

1199LLVM_DEBUG(dbgs() <<"Removing terminator kill: " <<MI);

1200 MO.setIsKill(false);

1201 }

1202 }

1203 }

1204

1205SmallVector<Register, 4> UsedRegs;

1206if (LIS) {

1207for (MachineInstr &MI :

1208llvm::make_range(getFirstInstrTerminator(),instr_end())) {

1209for (constMachineOperand &MO :MI.operands()) {

1210if (!MO.isReg() || MO.getReg() == 0)

1211continue;

1212

1213Register Reg = MO.getReg();

1214if (!is_contained(UsedRegs, Reg))

1215 UsedRegs.push_back(Reg);

1216 }

1217 }

1218 }

1219

1220ReplaceUsesOfBlockWith(Succ, NMBB);

1221

1222// Since we replaced all uses of Succ with NMBB, that should also be treated

1223// as the fallthrough successor

1224if (Succ == PrevFallthrough)

1225 PrevFallthrough = NMBB;

1226

1227if (!ChangedIndirectJump) {

1228SlotIndexUpdateDelegate SlotUpdater(*MF, Indexes);

1229updateTerminator(PrevFallthrough);

1230 }

1231

1232// Insert unconditional "jump Succ" instruction in NMBB if necessary.

1233 NMBB->addSuccessor(Succ);

1234if (!NMBB->isLayoutSuccessor(Succ)) {

1235SlotIndexUpdateDelegate SlotUpdater(*MF, Indexes);

1236SmallVector<MachineOperand, 4>Cond;

1237constTargetInstrInfo *TII =getParent()->getSubtarget().getInstrInfo();

1238

1239// In original 'this' BB, there must be a branch instruction targeting at

1240// Succ. We can not find it out since currently getBranchDestBlock was not

1241// implemented for all targets. However, if the merged DL has column or line

1242// number, the scope and non-zero column and line number is same with that

1243// branch instruction so we can safely use it.

1244DebugLoc DL, MergedDL =findBranchDebugLoc();

1245if (MergedDL && (MergedDL.getLine() || MergedDL.getCol()))

1246DL = MergedDL;

1247TII->insertBranch(*NMBB, Succ,nullptr,Cond,DL);

1248 }

1249

1250// Fix PHI nodes in Succ so they refer to NMBB instead of this.

1251 Succ->replacePhiUsesWith(this, NMBB);

1252

1253// Inherit live-ins from the successor

1254for (constauto &LI : Succ->liveins())

1255 NMBB->addLiveIn(LI);

1256

1257// Update LiveVariables.

1258constTargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();

1259if (LV) {

1260// Restore kills of virtual registers that were killed by the terminators.

1261while (!KilledRegs.empty()) {

1262Register Reg = KilledRegs.pop_back_val();

1263for (instr_iterator I =instr_end(), E =instr_begin();I != E;) {

1264if (!(--I)->addRegisterKilled(Reg,TRI,/* AddIfNotFound= */false))

1265continue;

1266if (Reg.isVirtual())

1267 LV->getVarInfo(Reg).Kills.push_back(&*I);

1268LLVM_DEBUG(dbgs() <<"Restored terminator kill: " << *I);

1269break;

1270 }

1271 }

1272// Update relevant live-through information.

1273if (LiveInSets !=nullptr)

1274 LV->addNewBlock(NMBB,this, Succ, *LiveInSets);

1275else

1276 LV->addNewBlock(NMBB,this, Succ);

1277 }

1278

1279if (LIS) {

1280// After splitting the edge and updating SlotIndexes, live intervals may be

1281// in one of two situations, depending on whether this block was the last in

1282// the function. If the original block was the last in the function, all

1283// live intervals will end prior to the beginning of the new split block. If

1284// the original block was not at the end of the function, all live intervals

1285// will extend to the end of the new split block.

1286

1287bool isLastMBB =

1288 std::next(MachineFunction::iterator(NMBB)) ==getParent()->end();

1289

1290SlotIndex StartIndex = Indexes->getMBBEndIdx(this);

1291SlotIndex PrevIndex = StartIndex.getPrevSlot();

1292SlotIndex EndIndex = Indexes->getMBBEndIdx(NMBB);

1293

1294// Find the registers used from NMBB in PHIs in Succ.

1295SmallSet<Register, 8> PHISrcRegs;

1296for (MachineBasicBlock::instr_iterator

1297I = Succ->instr_begin(), E = Succ->instr_end();

1298I != E &&I->isPHI(); ++I) {

1299for (unsigned ni = 1, ne =I->getNumOperands(); ni != ne; ni += 2) {

1300if (I->getOperand(ni+1).getMBB() == NMBB) {

1301MachineOperand &MO =I->getOperand(ni);

1302Register Reg = MO.getReg();

1303 PHISrcRegs.insert(Reg);

1304if (MO.isUndef())

1305continue;

1306

1307LiveInterval &LI = LIS->getInterval(Reg);

1308VNInfo *VNI = LI.getVNInfoAt(PrevIndex);

1309assert(VNI &&

1310"PHI sources should be live out of their predecessors.");

1311 LI.addSegment(LiveInterval::Segment(StartIndex, EndIndex, VNI));

1312for (auto &SR : LI.subranges())

1313 SR.addSegment(LiveInterval::Segment(StartIndex, EndIndex, VNI));

1314 }

1315 }

1316 }

1317

1318MachineRegisterInfo *MRI = &getParent()->getRegInfo();

1319for (unsigned i = 0, e =MRI->getNumVirtRegs(); i != e; ++i) {

1320Register Reg =Register::index2VirtReg(i);

1321if (PHISrcRegs.count(Reg) || !LIS->hasInterval(Reg))

1322continue;

1323

1324LiveInterval &LI = LIS->getInterval(Reg);

1325if (!LI.liveAt(PrevIndex))

1326continue;

1327

1328boolisLiveOut = LI.liveAt(LIS->getMBBStartIdx(Succ));

1329if (isLiveOut && isLastMBB) {

1330VNInfo *VNI = LI.getVNInfoAt(PrevIndex);

1331assert(VNI &&"LiveInterval should have VNInfo where it is live.");

1332 LI.addSegment(LiveInterval::Segment(StartIndex, EndIndex, VNI));

1333// Update subranges with live values

1334for (auto &SR : LI.subranges()) {

1335VNInfo *VNI = SR.getVNInfoAt(PrevIndex);

1336if (VNI)

1337 SR.addSegment(LiveInterval::Segment(StartIndex, EndIndex, VNI));

1338 }

1339 }elseif (!isLiveOut && !isLastMBB) {

1340 LI.removeSegment(StartIndex, EndIndex);

1341for (auto &SR : LI.subranges())

1342 SR.removeSegment(StartIndex, EndIndex);

1343 }

1344 }

1345

1346// Update all intervals for registers whose uses may have been modified by

1347// updateTerminator().

1348 LIS->repairIntervalsInRange(this,getFirstTerminator(),end(), UsedRegs);

1349 }

1350

1351if (MDTU)

1352 MDTU->splitCriticalEdge(this, Succ, NMBB);

1353

1354if (MachineLoopInfo *MLI =GET_RESULT(MachineLoop, getLI,Info))

1355if (MachineLoop *TIL = MLI->getLoopFor(this)) {

1356// If one or the other blocks were not in a loop, the new block is not

1357// either, and thus LI doesn't need to be updated.

1358if (MachineLoop *DestLoop = MLI->getLoopFor(Succ)) {

1359if (TIL == DestLoop) {

1360// Both in the same loop, the NMBB joins loop.

1361 DestLoop->addBasicBlockToLoop(NMBB, *MLI);

1362 }elseif (TIL->contains(DestLoop)) {

1363// Edge from an outer loop to an inner loop. Add to the outer loop.

1364 TIL->addBasicBlockToLoop(NMBB, *MLI);

1365 }elseif (DestLoop->contains(TIL)) {

1366// Edge from an inner loop to an outer loop. Add to the outer loop.

1367 DestLoop->addBasicBlockToLoop(NMBB, *MLI);

1368 }else {

1369// Edge from two loops with no containment relation. Because these

1370// are natural loops, we know that the destination block must be the

1371// header of its loop (adding a branch into a loop elsewhere would

1372// create an irreducible loop).

1373assert(DestLoop->getHeader() == Succ &&

1374"Should not create irreducible loops!");

1375if (MachineLoop *P = DestLoop->getParentLoop())

1376P->addBasicBlockToLoop(NMBB, *MLI);

1377 }

1378 }

1379 }

1380

1381return NMBB;

1382}

1383

1384boolMachineBasicBlock::canSplitCriticalEdge(

1385constMachineBasicBlock *Succ) const{

1386// Splitting the critical edge to a landing pad block is non-trivial. Don't do

1387// it in this generic function.

1388if (Succ->isEHPad())

1389returnfalse;

1390

1391// Splitting the critical edge to a callbr's indirect block isn't advised.

1392// Don't do it in this generic function.

1393if (Succ->isInlineAsmBrIndirectTarget())

1394returnfalse;

1395

1396constMachineFunction *MF =getParent();

1397// Performance might be harmed on HW that implements branching using exec mask

1398// where both sides of the branches are always executed.

1399if (MF->getTarget().requiresStructuredCFG())

1400returnfalse;

1401

1402// Do we have an Indirect jump with a jumptable that we can rewrite?

1403int JTI =findJumpTableIndex(*this);

1404if (JTI >= 0 && !jumpTableHasOtherUses(*MF, *this, JTI))

1405returntrue;

1406

1407// We may need to update this's terminator, but we can't do that if

1408// analyzeBranch fails.

1409constTargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();

1410MachineBasicBlock *TBB =nullptr, *FBB =nullptr;

1411SmallVector<MachineOperand, 4>Cond;

1412// AnalyzeBanch should modify this, since we did not allow modification.

1413if (TII->analyzeBranch(*const_cast<MachineBasicBlock *>(this),TBB, FBB,Cond,

1414/*AllowModify*/false))

1415returnfalse;

1416

1417// Avoid bugpoint weirdness: A block may end with a conditional branch but

1418// jumps to the same MBB is either case. We have duplicate CFG edges in that

1419// case that we can't handle. Since this never happens in properly optimized

1420// code, just skip those edges.

1421if (TBB &&TBB == FBB) {

1422LLVM_DEBUG(dbgs() <<"Won't split critical edge after degenerate "

1423 <<printMBBReference(*this) <<'\n');

1424returnfalse;

1425 }

1426returntrue;

1427}

1428

1429/// Prepare MI to be removed from its bundle. This fixes bundle flags on MI's

1430/// neighboring instructions so the bundle won't be broken by removing MI.

1431staticvoidunbundleSingleMI(MachineInstr *MI) {

1432// Removing the first instruction in a bundle.

1433if (MI->isBundledWithSucc() && !MI->isBundledWithPred())

1434MI->unbundleFromSucc();

1435// Removing the last instruction in a bundle.

1436if (MI->isBundledWithPred() && !MI->isBundledWithSucc())

1437MI->unbundleFromPred();

1438// If MI is not bundled, or if it is internal to a bundle, the neighbor flags

1439// are already fine.

1440}

1441

1442MachineBasicBlock::instr_iterator

1443MachineBasicBlock::erase(MachineBasicBlock::instr_iterator I) {

1444unbundleSingleMI(&*I);

1445return Insts.erase(I);

1446}

1447

1448MachineInstr *MachineBasicBlock::remove_instr(MachineInstr *MI) {

1449unbundleSingleMI(MI);

1450MI->clearFlag(MachineInstr::BundledPred);

1451MI->clearFlag(MachineInstr::BundledSucc);

1452return Insts.remove(MI);

1453}

1454

1455MachineBasicBlock::instr_iterator

1456MachineBasicBlock::insert(instr_iterator I,MachineInstr *MI) {

1457assert(!MI->isBundledWithPred() && !MI->isBundledWithSucc() &&

1458"Cannot insert instruction with bundle flags");

1459// Set the bundle flags when inserting inside a bundle.

1460if (I !=instr_end() &&I->isBundledWithPred()) {

1461MI->setFlag(MachineInstr::BundledPred);

1462MI->setFlag(MachineInstr::BundledSucc);

1463 }

1464return Insts.insert(I,MI);

1465}

1466

1467/// This method unlinks 'this' from the containing function, and returns it, but

1468/// does not delete it.

1469MachineBasicBlock *MachineBasicBlock::removeFromParent() {

1470assert(getParent() &&"Not embedded in a function!");

1471getParent()->remove(this);

1472returnthis;

1473}

1474

1475/// This method unlinks 'this' from the containing function, and deletes it.

1476voidMachineBasicBlock::eraseFromParent() {

1477assert(getParent() &&"Not embedded in a function!");

1478getParent()->erase(this);

1479}

1480

1481/// Given a machine basic block that branched to 'Old', change the code and CFG

1482/// so that it branches to 'New' instead.

1483voidMachineBasicBlock::ReplaceUsesOfBlockWith(MachineBasicBlock *Old,

1484MachineBasicBlock *New) {

1485assert(Old != New &&"Cannot replace self with self!");

1486

1487MachineBasicBlock::instr_iterator I =instr_end();

1488while (I !=instr_begin()) {

1489 --I;

1490if (!I->isTerminator())break;

1491

1492// Scan the operands of this machine instruction, replacing any uses of Old

1493// with New.

1494for (MachineOperand &MO :I->operands())

1495if (MO.isMBB() && MO.getMBB() == Old)

1496 MO.setMBB(New);

1497 }

1498

1499// Update the successor information.

1500replaceSuccessor(Old, New);

1501}

1502

1503voidMachineBasicBlock::replacePhiUsesWith(MachineBasicBlock *Old,

1504MachineBasicBlock *New) {

1505for (MachineInstr &MI :phis())

1506for (unsigned i = 2, e =MI.getNumOperands() + 1; i != e; i += 2) {

1507MachineOperand &MO =MI.getOperand(i);

1508if (MO.getMBB() == Old)

1509 MO.setMBB(New);

1510 }

1511}

1512

1513/// Find the next valid DebugLoc starting at MBBI, skipping any debug

1514/// instructions. Return UnknownLoc if there is none.

1515DebugLoc

1516MachineBasicBlock::findDebugLoc(instr_iterator MBBI) {

1517// Skip debug declarations, we don't want a DebugLoc from them.

1518MBBI =skipDebugInstructionsForward(MBBI,instr_end());

1519if (MBBI !=instr_end())

1520returnMBBI->getDebugLoc();

1521return {};

1522}

1523

1524DebugLoc MachineBasicBlock::rfindDebugLoc(reverse_instr_iterator MBBI) {

1525if (MBBI ==instr_rend())

1526returnfindDebugLoc(instr_begin());

1527// Skip debug declarations, we don't want a DebugLoc from them.

1528MBBI =skipDebugInstructionsBackward(MBBI,instr_rbegin());

1529if (!MBBI->isDebugInstr())

1530returnMBBI->getDebugLoc();

1531return {};

1532}

1533

1534/// Find the previous valid DebugLoc preceding MBBI, skipping any debug

1535/// instructions. Return UnknownLoc if there is none.

1536DebugLoc MachineBasicBlock::findPrevDebugLoc(instr_iterator MBBI) {

1537if (MBBI ==instr_begin())

1538return {};

1539// Skip debug instructions, we don't want a DebugLoc from them.

1540MBBI =prev_nodbg(MBBI,instr_begin());

1541if (!MBBI->isDebugInstr())

1542returnMBBI->getDebugLoc();

1543return {};

1544}

1545

1546DebugLoc MachineBasicBlock::rfindPrevDebugLoc(reverse_instr_iterator MBBI) {

1547if (MBBI ==instr_rend())

1548return {};

1549// Skip debug declarations, we don't want a DebugLoc from them.

1550MBBI =next_nodbg(MBBI,instr_rend());

1551if (MBBI !=instr_rend())

1552returnMBBI->getDebugLoc();

1553return {};

1554}

1555

1556/// Find and return the merged DebugLoc of the branch instructions of the block.

1557/// Return UnknownLoc if there is none.

1558DebugLoc

1559MachineBasicBlock::findBranchDebugLoc() {

1560DebugLoc DL;

1561auto TI =getFirstTerminator();

1562while (TI !=end() && !TI->isBranch())

1563 ++TI;

1564

1565if (TI !=end()) {

1566DL = TI->getDebugLoc();

1567for (++TI ; TI !=end() ; ++TI)

1568if (TI->isBranch())

1569DL =DILocation::getMergedLocation(DL, TI->getDebugLoc());

1570 }

1571returnDL;

1572}

1573

1574/// Return probability of the edge from this block to MBB.

1575BranchProbability

1576MachineBasicBlock::getSuccProbability(const_succ_iterator Succ) const{

1577if (Probs.empty())

1578returnBranchProbability(1,succ_size());

1579

1580constauto &Prob = *getProbabilityIterator(Succ);

1581if (Prob.isUnknown()) {

1582// For unknown probabilities, collect the sum of all known ones, and evenly

1583// ditribute the complemental of the sum to each unknown probability.

1584unsigned KnownProbNum = 0;

1585auto Sum =BranchProbability::getZero();

1586for (constauto &P : Probs) {

1587if (!P.isUnknown()) {

1588 Sum +=P;

1589 KnownProbNum++;

1590 }

1591 }

1592return Sum.getCompl() / (Probs.size() - KnownProbNum);

1593 }else

1594return Prob;

1595}

1596

1597/// Set successor probability of a given iterator.

1598voidMachineBasicBlock::setSuccProbability(succ_iterator I,

1599BranchProbability Prob) {

1600assert(!Prob.isUnknown());

1601if (Probs.empty())

1602return;

1603 *getProbabilityIterator(I) = Prob;

1604}

1605

1606/// Return probability iterator corresonding to the I successor iterator

1607MachineBasicBlock::const_probability_iterator

1608MachineBasicBlock::getProbabilityIterator(

1609MachineBasicBlock::const_succ_iterator I) const{

1610assert(Probs.size() == Successors.size() &&"Async probability list!");

1611constsize_t index = std::distance(Successors.begin(),I);

1612assert(index < Probs.size() &&"Not a current successor!");

1613return Probs.begin() + index;

1614}

1615

1616/// Return probability iterator corresonding to the I successor iterator.

1617MachineBasicBlock::probability_iterator

1618MachineBasicBlock::getProbabilityIterator(MachineBasicBlock::succ_iterator I) {

1619assert(Probs.size() == Successors.size() &&"Async probability list!");

1620constsize_t index = std::distance(Successors.begin(),I);

1621assert(index < Probs.size() &&"Not a current successor!");

1622return Probs.begin() + index;

1623}

1624

1625/// Return whether (physical) register "Reg" has been <def>ined and not <kill>ed

1626/// as of just before "MI".

1627///

1628/// Search is localised to a neighborhood of

1629/// Neighborhood instructions before (searching for defs or kills) and N

1630/// instructions after (searching just for defs) MI.

1631MachineBasicBlock::LivenessQueryResult

1632MachineBasicBlock::computeRegisterLiveness(constTargetRegisterInfo *TRI,

1633MCRegister Reg,const_iterator Before,

1634unsigned Neighborhood) const{

1635unsignedN = Neighborhood;

1636

1637// Try searching forwards from Before, looking for reads or defs.

1638const_iterator I(Before);

1639for (;I !=end() &&N > 0; ++I) {

1640if (I->isDebugOrPseudoInstr())

1641continue;

1642

1643 --N;

1644

1645PhysRegInfo Info =AnalyzePhysRegInBundle(*I, Reg,TRI);

1646

1647// Register is live when we read it here.

1648if (Info.Read)

1649returnLQR_Live;

1650// Register is dead if we can fully overwrite or clobber it here.

1651if (Info.FullyDefined ||Info.Clobbered)

1652returnLQR_Dead;

1653 }

1654

1655// If we reached the end, it is safe to clobber Reg at the end of a block of

1656// no successor has it live in.

1657if (I ==end()) {

1658for (MachineBasicBlock *S :successors()) {

1659for (constMachineBasicBlock::RegisterMaskPair &LI : S->liveins()) {

1660if (TRI->regsOverlap(LI.PhysReg, Reg))

1661returnLQR_Live;

1662 }

1663 }

1664

1665returnLQR_Dead;

1666 }

1667

1668

1669N = Neighborhood;

1670

1671// Start by searching backwards from Before, looking for kills, reads or defs.

1672I =const_iterator(Before);

1673// If this is the first insn in the block, don't search backwards.

1674if (I !=begin()) {

1675do {

1676 --I;

1677

1678if (I->isDebugOrPseudoInstr())

1679continue;

1680

1681 --N;

1682

1683PhysRegInfo Info =AnalyzePhysRegInBundle(*I, Reg,TRI);

1684

1685// Defs happen after uses so they take precedence if both are present.

1686

1687// Register is dead after a dead def of the full register.

1688if (Info.DeadDef)

1689returnLQR_Dead;

1690// Register is (at least partially) live after a def.

1691if (Info.Defined) {

1692if (!Info.PartialDeadDef)

1693returnLQR_Live;

1694// As soon as we saw a partial definition (dead or not),

1695// we cannot tell if the value is partial live without

1696// tracking the lanemasks. We are not going to do this,

1697// so fall back on the remaining of the analysis.

1698break;

1699 }

1700// Register is dead after a full kill or clobber and no def.

1701if (Info.Killed ||Info.Clobbered)

1702returnLQR_Dead;

1703// Register must be live if we read it.

1704if (Info.Read)

1705returnLQR_Live;

1706

1707 }while (I !=begin() &&N > 0);

1708 }

1709

1710// If all the instructions before this in the block are debug instructions,

1711// skip over them.

1712while (I !=begin() && std::prev(I)->isDebugOrPseudoInstr())

1713 --I;

1714

1715// Did we get to the start of the block?

1716if (I ==begin()) {

1717// If so, the register's state is definitely defined by the live-in state.

1718for (constMachineBasicBlock::RegisterMaskPair &LI :liveins())

1719if (TRI->regsOverlap(LI.PhysReg, Reg))

1720returnLQR_Live;

1721

1722returnLQR_Dead;

1723 }

1724

1725// At this point we have no idea of the liveness of the register.

1726returnLQR_Unknown;

1727}

1728

1729constuint32_t *

1730MachineBasicBlock::getBeginClobberMask(constTargetRegisterInfo *TRI) const{

1731// EH funclet entry does not preserve any registers.

1732returnisEHFuncletEntry() ?TRI->getNoPreservedMask() :nullptr;

1733}

1734

1735constuint32_t *

1736MachineBasicBlock::getEndClobberMask(constTargetRegisterInfo *TRI) const{

1737// If we see a return block with successors, this must be a funclet return,

1738// which does not preserve any registers. If there are no successors, we don't

1739// care what kind of return it is, putting a mask after it is a no-op.

1740returnisReturnBlock() && !succ_empty() ?TRI->getNoPreservedMask() :nullptr;

1741}

1742

1743voidMachineBasicBlock::clearLiveIns() {

1744 LiveIns.clear();

1745}

1746

1747voidMachineBasicBlock::clearLiveIns(

1748 std::vector<RegisterMaskPair> &OldLiveIns) {

1749assert(OldLiveIns.empty() &&"Vector must be empty");

1750std::swap(LiveIns, OldLiveIns);

1751}

1752

1753MachineBasicBlock::livein_iterator MachineBasicBlock::livein_begin() const{

1754assert(getParent()->getProperties().hasProperty(

1755MachineFunctionProperties::Property::TracksLiveness) &&

1756"Liveness information is accurate");

1757return LiveIns.begin();

1758}

1759

1760MachineBasicBlock::liveout_iterator MachineBasicBlock::liveout_begin() const{

1761constMachineFunction &MF = *getParent();

1762assert(MF.getProperties().hasProperty(

1763MachineFunctionProperties::Property::TracksLiveness) &&

1764"Liveness information is accurate");

1765

1766constTargetLowering &TLI = *MF.getSubtarget().getTargetLowering();

1767MCPhysReg ExceptionPointer = 0, ExceptionSelector = 0;

1768if (MF.getFunction().hasPersonalityFn()) {

1769auto PersonalityFn = MF.getFunction().getPersonalityFn();

1770 ExceptionPointer = TLI.getExceptionPointerRegister(PersonalityFn);

1771 ExceptionSelector = TLI.getExceptionSelectorRegister(PersonalityFn);

1772 }

1773

1774returnliveout_iterator(*this, ExceptionPointer, ExceptionSelector,false);

1775}

1776

1777boolMachineBasicBlock::sizeWithoutDebugLargerThan(unsigned Limit) const{

1778unsigned Cntr = 0;

1779auto R =instructionsWithoutDebug(begin(),end());

1780for (autoI = R.begin(), E = R.end();I != E; ++I) {

1781if (++Cntr > Limit)

1782returntrue;

1783 }

1784returnfalse;

1785}

1786

1787constMBBSectionID MBBSectionID::ColdSectionID(MBBSectionID::SectionType::Cold);

1788constMBBSectionID

1789MBBSectionID::ExceptionSectionID(MBBSectionID::SectionType::Exception);

MRI

unsigned const MachineRegisterInfo * MRI

Definition:AArch64AdvSIMDScalarPass.cpp:105

MBB

MachineBasicBlock & MBB

Definition:ARMSLSHardening.cpp:71

MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL

Definition:ARMSLSHardening.cpp:73

MBBI

MachineBasicBlock MachineBasicBlock::iterator MBBI

Definition:ARMSLSHardening.cpp:72

static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")

Info

Analysis containing CSE Info

Definition:CSEInfo.cpp:27

LLVM_DUMP_METHOD

#define LLVM_DUMP_METHOD

Mark debug helper function definitions like dump() that should not be stripped from debug builds.

Definition:Compiler.h:622

DebugInfoMetadata.h

Debug.h

LLVM_DEBUG

#define LLVM_DEBUG(...)

Definition:Debug.h:106

Name

std::string Name

Definition:ELFObjHandler.cpp:77

TII

const HexagonInstrInfo * TII

Definition:HexagonCopyToCombine.cpp:125

IRTranslator LLVM IR MI

Definition:IRTranslator.cpp:112

BasicBlock.h

LiveIntervals.h

LivePhysRegs.h

This file implements the LivePhysRegs utility for tracking liveness of physical registers.

LiveVariables.h

MCAsmInfo.h

MCContext.h

#define F(x, y, z)

Definition:MD5.cpp:55

#define I(x, y, z)

Definition:MD5.cpp:58

GET_RESULT

#define GET_RESULT(RESULT, GETTER, INFIX)

Definition:MachineBasicBlock.cpp:1140

jumpTableHasOtherUses

static bool jumpTableHasOtherUses(const MachineFunction &MF, const MachineBasicBlock &IgnoreMBB, int JumpTableIndex)

Definition:MachineBasicBlock.cpp:1068

unbundleSingleMI

static void unbundleSingleMI(MachineInstr *MI)

Prepare MI to be removed from its bundle.

Definition:MachineBasicBlock.cpp:1431

findJumpTableIndex

static int findJumpTableIndex(const MachineBasicBlock &MBB)

Definition:MachineBasicBlock.cpp:684

PrintSlotIndexes

static cl::opt< bool > PrintSlotIndexes("print-slotindexes", cl::desc("When printing machine IR, annotate instructions and blocks with " "SlotIndexes when available"), cl::init(true), cl::Hidden)

MachineBasicBlock.h

MachineDomTreeUpdater.h

MachineDominators.h

MachineFunction.h

MachineInstrBuilder.h

MachineJumpTableInfo.h

MachineLoopInfo.h

MachinePostDominators.h

MachineRegisterInfo.h

TRI

unsigned const TargetRegisterInfo * TRI

Definition:MachineSink.cpp:2029

ModuleSlotTracker.h

uint64_t IntrinsicInst * II

Definition:NVVMIntrRange.cpp:51

#define P(N)

Number

uint32_t Number

Definition:Profile.cpp:47

TBB

const SmallVectorImpl< MachineOperand > MachineBasicBlock * TBB

Definition:RISCVRedundantCopyElimination.cpp:76

Cond

const SmallVectorImpl< MachineOperand > & Cond

Definition:RISCVRedundantCopyElimination.cpp:75

assert

assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())

isLiveOut

static bool isLiveOut(const MachineBasicBlock &MBB, unsigned Reg)

Definition:SIOptimizeExecMasking.cpp:338

STLExtras.h

This file contains some templates that are useful if you are working with the STL at all.

raw_pwrite_stream & OS

Definition:SampleProfWriter.cpp:51

SlotIndexes.h

IRDumpFileSuffixType::Before

@ Before

StringExtras.h

This file contains some functions that are useful when dealing with strings.

TargetInstrInfo.h

TargetLowering.h

This file describes how to lower LLVM code to machine code.

TargetRegisterInfo.h

TargetSubtargetInfo.h

SlotIndexUpdateDelegate

Definition:MachineBasicBlock.cpp:1110

SlotIndexUpdateDelegate::SlotIndexUpdateDelegate

SlotIndexUpdateDelegate(MachineFunction &MF, SlotIndexes *Indexes)

Definition:MachineBasicBlock.cpp:1117

SlotIndexUpdateDelegate::~SlotIndexUpdateDelegate

~SlotIndexUpdateDelegate()

Definition:MachineBasicBlock.cpp:1122

SlotIndexUpdateDelegate::MF_HandleRemoval

void MF_HandleRemoval(MachineInstr &MI) override

Callback before a removal. This should not modify the MI directly.

Definition:MachineBasicBlock.cpp:1134

SlotIndexUpdateDelegate::MF_HandleInsertion

void MF_HandleInsertion(MachineInstr &MI) override

Callback after an insertion. This should not modify the MI directly.

Definition:MachineBasicBlock.cpp:1128

llvm::AnalysisManager

A container for analyses that lazily runs them and caches their results.

Definition:PassManager.h:253

llvm::BasicBlock

LLVM Basic Block Representation.

Definition:BasicBlock.h:61

llvm::BranchProbability

Definition:BranchProbability.h:30

llvm::BranchProbability::getDenominator

static uint32_t getDenominator()

Definition:BranchProbability.h:66

llvm::BranchProbability::getUnknown

static BranchProbability getUnknown()

Definition:BranchProbability.h:51

llvm::BranchProbability::getNumerator

uint32_t getNumerator() const

Definition:BranchProbability.h:65

llvm::BranchProbability::isUnknown

bool isUnknown() const

Definition:BranchProbability.h:47

llvm::BranchProbability::getZero

static BranchProbability getZero()

Definition:BranchProbability.h:49

llvm::DILocation::getMergedLocation

static DILocation * getMergedLocation(DILocation *LocA, DILocation *LocB)

When two instructions are combined into a single instruction we also need to combine the original loc...

Definition:DebugInfoMetadata.cpp:121

llvm::DebugLoc

A debug info location.

Definition:DebugLoc.h:33

llvm::DebugLoc::getLine

unsigned getLine() const

Definition:DebugLoc.cpp:24

llvm::DebugLoc::getCol

unsigned getCol() const

Definition:DebugLoc.cpp:29

llvm::Function

Definition:Function.h:63

llvm::Function::hasPersonalityFn

bool hasPersonalityFn() const

Check whether this function has a personality function.

Definition:Function.h:905

llvm::Function::getPersonalityFn

Constant * getPersonalityFn() const

Get the personality function associated with this function.

Definition:Function.cpp:1048

llvm::GenericDomTreeUpdater::splitCriticalEdge

void splitCriticalEdge(BasicBlockT *FromBB, BasicBlockT *ToBB, BasicBlockT *NewBB)

Apply updates that the critical edge (FromBB, ToBB) has been split with NewBB.

Definition:GenericDomTreeUpdaterImpl.h:134

llvm::HexagonInstrInfo::removeBranch

unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override

Remove the branching code at the end of the specific MBB.

Definition:HexagonInstrInfo.cpp:604

llvm::HexagonInstrInfo::isPredicated

bool isPredicated(const MachineInstr &MI) const override

Returns true if the instruction is already predicated.

Definition:HexagonInstrInfo.cpp:1670

llvm::HexagonInstrInfo::analyzeBranch

bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override

Analyze the branching code at the end of MBB, returning true if it cannot be understood (e....

Definition:HexagonInstrInfo.cpp:434

llvm::HexagonInstrInfo::reverseBranchCondition

bool reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const override

Reverses the branch condition of the specified condition list, returning false on success and true if...

Definition:HexagonInstrInfo.cpp:1637

llvm::HexagonInstrInfo::insertBranch

unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override

Insert branch code into the end of the specified MachineBasicBlock.

Definition:HexagonInstrInfo.cpp:627

llvm::LiveInterval

LiveInterval - This class represents the liveness of a register, or stack slot.

Definition:LiveInterval.h:687

llvm::LiveInterval::subranges

iterator_range< subrange_iterator > subranges()

Definition:LiveInterval.h:782

llvm::LiveIntervals

Definition:LiveIntervals.h:55

llvm::LiveIntervals::repairIntervalsInRange

void repairIntervalsInRange(MachineBasicBlock *MBB, MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, ArrayRef< Register > OrigRegs)

Update live intervals for instructions in a range of iterators.

Definition:LiveIntervals.cpp:1700

llvm::LiveIntervals::hasInterval

bool hasInterval(Register Reg) const

Definition:LiveIntervals.h:144

llvm::LiveIntervals::getMBBStartIdx

SlotIndex getMBBStartIdx(const MachineBasicBlock *mbb) const

Return the first index in the given basic block.

Definition:LiveIntervals.h:255

llvm::LiveIntervals::insertMBBInMaps

void insertMBBInMaps(MachineBasicBlock *MBB)

Definition:LiveIntervals.h:276

llvm::LiveIntervals::getInterval

LiveInterval & getInterval(Register Reg)

Definition:LiveIntervals.h:133

llvm::LivePhysRegs

A set of physical registers with utility functions to track liveness when walking backward/forward th...

Definition:LivePhysRegs.h:52

llvm::LivePhysRegs::stepBackward

void stepBackward(const MachineInstr &MI)

Simulates liveness when stepping backwards over an instruction(bundle).

Definition:LivePhysRegs.cpp:68

llvm::LivePhysRegs::init

void init(const TargetRegisterInfo &TRI)

(re-)initializes and clears the set.

Definition:LivePhysRegs.h:70

llvm::LivePhysRegs::addLiveOuts

void addLiveOuts(const MachineBasicBlock &MBB)

Adds all live-out registers of basic block MBB.

Definition:LivePhysRegs.cpp:232

llvm::LiveRange::addSegment

iterator addSegment(Segment S)

Add the specified Segment to this range, merging segments as appropriate.

Definition:LiveInterval.cpp:533

llvm::LiveRange::liveAt

bool liveAt(SlotIndex index) const

Definition:LiveInterval.h:401

llvm::LiveRange::removeSegment

void removeSegment(SlotIndex Start, SlotIndex End, bool RemoveDeadValNo=false)

Remove the specified interval from this live range.

Definition:LiveInterval.cpp:566

llvm::LiveRange::getVNInfoAt

VNInfo * getVNInfoAt(SlotIndex Idx) const

getVNInfoAt - Return the VNInfo that is live at Idx, or NULL.

Definition:LiveInterval.h:421

llvm::LiveVariables

Definition:LiveVariables.h:48

llvm::LiveVariables::getVarInfo

VarInfo & getVarInfo(Register Reg)

getVarInfo - Return the VarInfo structure for the specified VIRTUAL register.

Definition:LiveVariables.cpp:114

llvm::LiveVariables::addNewBlock

void addNewBlock(MachineBasicBlock *BB, MachineBasicBlock *DomBB, MachineBasicBlock *SuccBB)

addNewBlock - Add a new basic block BB between DomBB and SuccBB.

Definition:LiveVariables.cpp:850

llvm::MCContext

Context object for machine code objects.

Definition:MCContext.h:83

llvm::MCContext::createBlockSymbol

MCSymbol * createBlockSymbol(const Twine &Name, bool AlwaysEmit=false)

Get or create a symbol for a basic block.

Definition:MCContext.cpp:324

llvm::MCContext::getOrCreateSymbol

MCSymbol * getOrCreateSymbol(const Twine &Name)

Lookup the symbol inside with the specified Name.

Definition:MCContext.cpp:212

llvm::MCRegister

Wrapper class representing physical registers. Should be passed by value.

Definition:MCRegister.h:33

llvm::MCRegister::isPhysical

constexpr bool isPhysical() const

Return true if the specified register number is in the physical register namespace.

Definition:MCRegister.h:73

llvm::MCSymbol

MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...

Definition:MCSymbol.h:41

llvm::MachineBasicBlock::liveout_iterator

Definition:MachineBasicBlock.h:514

llvm::MachineBasicBlock

Definition:MachineBasicBlock.h:125

llvm::MachineBasicBlock::isInlineAsmBrIndirectTarget

bool isInlineAsmBrIndirectTarget() const

Returns true if this is the indirect dest of an INLINEASM_BR.

Definition:MachineBasicBlock.h:704

llvm::MachineBasicBlock::rfindPrevDebugLoc

DebugLoc rfindPrevDebugLoc(reverse_instr_iterator MBBI)

Has exact same behavior as findPrevDebugLoc (it also searches towards the beginning of this MBB) exce...

Definition:MachineBasicBlock.cpp:1546

llvm::MachineBasicBlock::transferSuccessorsAndUpdatePHIs

void transferSuccessorsAndUpdatePHIs(MachineBasicBlock *FromMBB)

Transfers all the successors, as in transferSuccessors, and update PHI operands in the successor bloc...

Definition:MachineBasicBlock.cpp:937

llvm::MachineBasicBlock::hasEHPadSuccessor

bool hasEHPadSuccessor() const

Definition:MachineBasicBlock.cpp:289

llvm::MachineBasicBlock::empty

bool empty() const

Definition:MachineBasicBlock.h:327

llvm::MachineBasicBlock::normalizeSuccProbs

void normalizeSuccProbs()

Normalize probabilities of all successors so that the sum of them becomes one.

Definition:MachineBasicBlock.h:764

llvm::MachineBasicBlock::livein_end

livein_iterator livein_end() const

Definition:MachineBasicBlock.h:503

llvm::MachineBasicBlock::getFirstTerminatorForward

iterator getFirstTerminatorForward()

Finds the first terminator in a block by scanning forward.

Definition:MachineBasicBlock.cpp:262

llvm::MachineBasicBlock::isEHPad

bool isEHPad() const

Returns true if the block is a landing pad.

Definition:MachineBasicBlock.h:634

llvm::MachineBasicBlock::replacePhiUsesWith

void replacePhiUsesWith(MachineBasicBlock *Old, MachineBasicBlock *New)

Update all phi nodes in this basic block to refer to basic block New instead of basic block Old.

Definition:MachineBasicBlock.cpp:1503

llvm::MachineBasicBlock::remove_instr

MachineInstr * remove_instr(MachineInstr *I)

Remove the possibly bundled instruction from the instruction list without deleting it.

Definition:MachineBasicBlock.cpp:1448

llvm::MachineBasicBlock::instr_begin

instr_iterator instr_begin()

Definition:MachineBasicBlock.h:339

llvm::MachineBasicBlock::const_iterator

MachineInstrBundleIterator< const MachineInstr > const_iterator

Definition:MachineBasicBlock.h:320

llvm::MachineBasicBlock::getSymbol

MCSymbol * getSymbol() const

Return the MCSymbol for this basic block.

Definition:MachineBasicBlock.cpp:63

llvm::MachineBasicBlock::const_succ_iterator

SmallVectorImpl< MachineBasicBlock * >::const_iterator const_succ_iterator

Definition:MachineBasicBlock.h:396

llvm::MachineBasicBlock::getEHCatchretSymbol

MCSymbol * getEHCatchretSymbol() const

Return the EHCatchret Symbol for this basic block.

Definition:MachineBasicBlock.cpp:95

llvm::MachineBasicBlock::moveBefore

void moveBefore(MachineBasicBlock *NewAfter)

Move 'this' block before or after the specified block.

Definition:MachineBasicBlock.cpp:676

llvm::MachineBasicBlock::replaceSuccessor

void replaceSuccessor(MachineBasicBlock *Old, MachineBasicBlock *New)

Replace successor OLD with NEW and update probability info.

Definition:MachineBasicBlock.cpp:859

llvm::MachineBasicBlock::getFallThrough

MachineBasicBlock * getFallThrough(bool JumpToFallThrough=true)

Return the fallthrough block if the block can implicitly transfer control to the block after it by fa...

Definition:MachineBasicBlock.cpp:977

llvm::MachineBasicBlock::transferSuccessors

void transferSuccessors(MachineBasicBlock *FromMBB)

Transfers all the successors from MBB to this machine basic block (i.e., copies all the successors Fr...

Definition:MachineBasicBlock.cpp:917

llvm::MachineBasicBlock::SplitCriticalEdge

MachineBasicBlock * SplitCriticalEdge(MachineBasicBlock *Succ, Pass &P, std::vector< SparseBitVector<> > *LiveInSets=nullptr, MachineDomTreeUpdater *MDTU=nullptr)

Split the critical edge from this block to the given successor block, and return the newly created bl...

Definition:MachineBasicBlock.h:975

llvm::MachineBasicBlock::hasLabelMustBeEmitted

bool hasLabelMustBeEmitted() const

Test whether this block must have its label emitted.

Definition:MachineBasicBlock.h:304

llvm::MachineBasicBlock::insert

instr_iterator insert(instr_iterator I, MachineInstr *M)

Insert MI into the instruction list before I, possibly inside a bundle.

Definition:MachineBasicBlock.cpp:1456

llvm::MachineBasicBlock::getSuccProbability

BranchProbability getSuccProbability(const_succ_iterator Succ) const

Return probability of the edge from this block to MBB.

Definition:MachineBasicBlock.cpp:1576

llvm::MachineBasicBlock::liveins

iterator_range< livein_iterator > liveins() const

Definition:MachineBasicBlock.h:505

llvm::MachineBasicBlock::phis

iterator_range< iterator > phis()

Returns a range that iterates over the phis in the basic block.

Definition:MachineBasicBlock.h:383

llvm::MachineBasicBlock::instr_rbegin

reverse_instr_iterator instr_rbegin()

Definition:MachineBasicBlock.h:343

llvm::MachineBasicBlock::getNumber

int getNumber() const

MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a MachineFuncti...

Definition:MachineBasicBlock.h:1217

llvm::MachineBasicBlock::SkipPHIsAndLabels

iterator SkipPHIsAndLabels(iterator I)

Return the first instruction in MBB after I that is not a PHI or a label.

Definition:MachineBasicBlock.cpp:212

llvm::MachineBasicBlock::succ_end

succ_iterator succ_end()

Definition:MachineBasicBlock.h:423

llvm::MachineBasicBlock::addSuccessorWithoutProb

void addSuccessorWithoutProb(MachineBasicBlock *Succ)

Add Succ as a successor of this MachineBasicBlock.

Definition:MachineBasicBlock.cpp:808

llvm::MachineBasicBlock::instrs

instr_range instrs()

Definition:MachineBasicBlock.h:350

llvm::MachineBasicBlock::hasName

bool hasName() const

Check if there is a name of corresponding LLVM basic block.

Definition:MachineBasicBlock.cpp:320

llvm::MachineBasicBlock::setCallFrameSize

void setCallFrameSize(unsigned N)

Set the call frame size on entry to this basic block.

Definition:MachineBasicBlock.h:1223

llvm::MachineBasicBlock::getBBID

std::optional< UniqueBBID > getBBID() const

Definition:MachineBasicBlock.h:681

llvm::MachineBasicBlock::getBasicBlock

const BasicBlock * getBasicBlock() const

Return the LLVM basic block that this instance corresponded to originally.

Definition:MachineBasicBlock.h:256

llvm::MachineBasicBlock::splitSuccessor

void splitSuccessor(MachineBasicBlock *Old, MachineBasicBlock *New, bool NormalizeSuccProbs=false)

Split the old successor into old plus new and updates the probability info.

Definition:MachineBasicBlock.cpp:817

llvm::MachineBasicBlock::PrintNameIr

@ PrintNameIr

Add IR name where available.

Definition:MachineBasicBlock.h:1205

llvm::MachineBasicBlock::PrintNameAttributes

@ PrintNameAttributes

Print attributes.

Definition:MachineBasicBlock.h:1206

llvm::MachineBasicBlock::updateTerminator

void updateTerminator(MachineBasicBlock *PreviousLayoutSuccessor)

Update the terminator instructions in block to account for changes to block layout which may have bee...

Definition:MachineBasicBlock.cpp:693

llvm::MachineBasicBlock::getSinglePredecessor

const MachineBasicBlock * getSinglePredecessor() const

Return the predecessor of this block if it has a single predecessor.

Definition:MachineBasicBlock.cpp:973

llvm::MachineBasicBlock::SkipPHIsLabelsAndDebug

iterator SkipPHIsLabelsAndDebug(iterator I, Register Reg=Register(), bool SkipPseudoOp=true)

Return the first instruction in MBB after I that is not a PHI, label or debug.

Definition:MachineBasicBlock.cpp:227

llvm::MachineBasicBlock::canFallThrough

bool canFallThrough()

Return true if the block can implicitly transfer control to the block after it by falling off the end...

Definition:MachineBasicBlock.cpp:1021

llvm::MachineBasicBlock::setSuccProbability

void setSuccProbability(succ_iterator I, BranchProbability Prob)

Set successor probability of a given iterator.

Definition:MachineBasicBlock.cpp:1598

llvm::MachineBasicBlock::getFirstNonDebugInstr

iterator getFirstNonDebugInstr(bool SkipPseudoOp=true)

Returns an iterator to the first non-debug instruction in the basic block, or end().

Definition:MachineBasicBlock.cpp:267

llvm::MachineBasicBlock::succ_begin

succ_iterator succ_begin()

Definition:MachineBasicBlock.h:421

llvm::MachineBasicBlock::livein_empty

bool livein_empty() const

Definition:MachineBasicBlock.h:504

llvm::MachineBasicBlock::removeLiveIn

void removeLiveIn(MCRegister Reg, LaneBitmask LaneMask=LaneBitmask::getAll())

Remove the specified register from the live in set.

Definition:MachineBasicBlock.cpp:600

llvm::MachineBasicBlock::printAsOperand

void printAsOperand(raw_ostream &OS, bool PrintType=true) const

Definition:MachineBasicBlock.cpp:594

llvm::MachineBasicBlock::validateSuccProbs

void validateSuccProbs() const

Validate successors' probabilities and check if the sum of them is approximate one.

Definition:MachineBasicBlock.cpp:784

llvm::MachineBasicBlock::isIRBlockAddressTaken

bool isIRBlockAddressTaken() const

Test whether this block is the target of an IR BlockAddress.

Definition:MachineBasicBlock.h:289

llvm::MachineBasicBlock::livein_iterator

LiveInVector::const_iterator livein_iterator

Definition:MachineBasicBlock.h:491

llvm::MachineBasicBlock::getEndSymbol

MCSymbol * getEndSymbol() const

Returns the MCSymbol marking the end of this basic block.

Definition:MachineBasicBlock.cpp:106

llvm::MachineBasicBlock::clearLiveIns

void clearLiveIns()

Clear live in list.

Definition:MachineBasicBlock.cpp:1743

llvm::MachineBasicBlock::isEHFuncletEntry

bool isEHFuncletEntry() const

Returns true if this is the entry block of an EH funclet.

Definition:MachineBasicBlock.h:660

llvm::MachineBasicBlock::computeRegisterLiveness

LivenessQueryResult computeRegisterLiveness(const TargetRegisterInfo *TRI, MCRegister Reg, const_iterator Before, unsigned Neighborhood=10) const

Return whether (physical) register Reg has been defined and not killed as of just before Before.

Definition:MachineBasicBlock.cpp:1632

llvm::MachineBasicBlock::getFirstTerminator

iterator getFirstTerminator()

Returns an iterator to the first terminator instruction of this basic block.

Definition:MachineBasicBlock.cpp:244

llvm::MachineBasicBlock::livein_begin

livein_iterator livein_begin() const

Definition:MachineBasicBlock.cpp:1753

llvm::MachineBasicBlock::succ_size

unsigned succ_size() const

Definition:MachineBasicBlock.h:433

llvm::MachineBasicBlock::isReturnBlock

bool isReturnBlock() const

Convenience function that returns true if the block ends in a return instruction.

Definition:MachineBasicBlock.h:948

llvm::MachineBasicBlock::getBeginClobberMask

const uint32_t * getBeginClobberMask(const TargetRegisterInfo *TRI) const

Get the clobber mask for the start of this basic block.

Definition:MachineBasicBlock.cpp:1730

llvm::MachineBasicBlock::pred_empty

bool pred_empty() const

Definition:MachineBasicBlock.h:420

llvm::MachineBasicBlock::getSectionID

MBBSectionID getSectionID() const

Returns the section ID of this basic block.

Definition:MachineBasicBlock.h:684

llvm::MachineBasicBlock::dump

void dump() const

Definition:MachineBasicBlock.cpp:301

llvm::MachineBasicBlock::isEntryBlock

bool isEntryBlock() const

Returns true if this is the entry block of the function.

Definition:MachineBasicBlock.cpp:296

llvm::MachineBasicBlock::addSuccessor

void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())

Add Succ as a successor of this MachineBasicBlock.

Definition:MachineBasicBlock.cpp:798

llvm::MachineBasicBlock::copySuccessor

void copySuccessor(const MachineBasicBlock *Orig, succ_iterator I)

Copy a successor (and any probability info) from original block to this block's.

Definition:MachineBasicBlock.cpp:899

llvm::MachineBasicBlock::succ_iterator

SmallVectorImpl< MachineBasicBlock * >::iterator succ_iterator

Definition:MachineBasicBlock.h:394

llvm::MachineBasicBlock::getAddressTakenIRBlock

BasicBlock * getAddressTakenIRBlock() const

Retrieves the BasicBlock which corresponds to this MachineBasicBlock.

Definition:MachineBasicBlock.h:292

llvm::MachineBasicBlock::sortUniqueLiveIns

void sortUniqueLiveIns()

Sorts and uniques the LiveIns vector.

Definition:MachineBasicBlock.cpp:624

llvm::MachineBasicBlock::getSingleSuccessor

const MachineBasicBlock * getSingleSuccessor() const

Return the successor of this block if it has a single successor.

Definition:MachineBasicBlock.cpp:969

llvm::MachineBasicBlock::liveout_begin

liveout_iterator liveout_begin() const

Iterator scanning successor basic blocks' liveins to determine the registers potentially live at the ...

Definition:MachineBasicBlock.cpp:1760

llvm::MachineBasicBlock::removeSuccessor

void removeSuccessor(MachineBasicBlock *Succ, bool NormalizeSuccProbs=false)

Remove successor from the successors list of this MachineBasicBlock.

Definition:MachineBasicBlock.cpp:836

llvm::MachineBasicBlock::getFirstNonPHI

iterator getFirstNonPHI()

Returns a pointer to the first instruction in this block that is not a PHINode instruction.

Definition:MachineBasicBlock.cpp:202

llvm::MachineBasicBlock::succ_empty

bool succ_empty() const

Definition:MachineBasicBlock.h:436

llvm::MachineBasicBlock::isPredecessor

bool isPredecessor(const MachineBasicBlock *MBB) const

Return true if the specified MBB is a predecessor of this block.

Definition:MachineBasicBlock.cpp:956

llvm::MachineBasicBlock::rfindDebugLoc

DebugLoc rfindDebugLoc(reverse_instr_iterator MBBI)

Has exact same behavior as findDebugLoc (it also searches towards the end of this MBB) except that th...

Definition:MachineBasicBlock.cpp:1524

llvm::MachineBasicBlock::begin

iterator begin()

Definition:MachineBasicBlock.h:355

llvm::MachineBasicBlock::print

void print(raw_ostream &OS, const SlotIndexes *=nullptr, bool IsStandalone=true) const

Definition:MachineBasicBlock.cpp:345

llvm::MachineBasicBlock::instr_rend

reverse_instr_iterator instr_rend()

Definition:MachineBasicBlock.h:345

llvm::MachineBasicBlock::findDebugLoc

DebugLoc findDebugLoc(instr_iterator MBBI)

Find the next valid DebugLoc starting at MBBI, skipping any debug instructions.

Definition:MachineBasicBlock.cpp:1516

llvm::MachineBasicBlock::instr_iterator

Instructions::iterator instr_iterator

Definition:MachineBasicBlock.h:314

llvm::MachineBasicBlock::getLastNonDebugInstr

iterator getLastNonDebugInstr(bool SkipPseudoOp=true)

Returns an iterator to the last non-debug instruction in the basic block, or end().

Definition:MachineBasicBlock.cpp:273

llvm::MachineBasicBlock::ReplaceUsesOfBlockWith

void ReplaceUsesOfBlockWith(MachineBasicBlock *Old, MachineBasicBlock *New)

Given a machine basic block that branched to 'Old', change the code and CFG so that it branches to 'N...

Definition:MachineBasicBlock.cpp:1483

llvm::MachineBasicBlock::isLayoutSuccessor

bool isLayoutSuccessor(const MachineBasicBlock *MBB) const

Return true if the specified MBB will be emitted immediately after this block, such that if this bloc...

Definition:MachineBasicBlock.cpp:964

llvm::MachineBasicBlock::findPrevDebugLoc

DebugLoc findPrevDebugLoc(instr_iterator MBBI)

Find the previous valid DebugLoc preceding MBBI, skipping any debug instructions.

Definition:MachineBasicBlock.cpp:1536

llvm::MachineBasicBlock::splitAt

MachineBasicBlock * splitAt(MachineInstr &SplitInst, bool UpdateLiveIns=true, LiveIntervals *LIS=nullptr)

Split a basic block into 2 pieces at SplitPoint.

Definition:MachineBasicBlock.cpp:1025

llvm::MachineBasicBlock::eraseFromParent

void eraseFromParent()

This method unlinks 'this' from the containing function and deletes it.

Definition:MachineBasicBlock.cpp:1476

llvm::MachineBasicBlock::instr_end

instr_iterator instr_end()

Definition:MachineBasicBlock.h:341

llvm::MachineBasicBlock::end

iterator end()

Definition:MachineBasicBlock.h:357

llvm::MachineBasicBlock::addLiveIn

void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())

Adds the specified register as a live in.

Definition:MachineBasicBlock.h:456

llvm::MachineBasicBlock::back

MachineInstr & back()

Definition:MachineBasicBlock.h:335

llvm::MachineBasicBlock::getParent

const MachineFunction * getParent() const

Return the MachineFunction containing this basic block.

Definition:MachineBasicBlock.h:311

llvm::MachineBasicBlock::erase

instr_iterator erase(instr_iterator I)

Remove an instruction from the instruction list and delete it.

Definition:MachineBasicBlock.cpp:1443

llvm::MachineBasicBlock::getFullName

std::string getFullName() const

Return a formatted string to identify this block and its parent function.

Definition:MachineBasicBlock.cpp:334

llvm::MachineBasicBlock::isBeginSection

bool isBeginSection() const

Returns true if this block begins any section.

Definition:MachineBasicBlock.h:672

llvm::MachineBasicBlock::getCallFrameSize

unsigned getCallFrameSize() const

Return the call frame size on entry to this basic block.

Definition:MachineBasicBlock.h:1221

llvm::MachineBasicBlock::findBranchDebugLoc

DebugLoc findBranchDebugLoc()

Find and return the merged DebugLoc of the branch instructions of the block.

Definition:MachineBasicBlock.cpp:1559

llvm::MachineBasicBlock::successors

iterator_range< succ_iterator > successors()

Definition:MachineBasicBlock.h:444

llvm::MachineBasicBlock::getFirstInstrTerminator

instr_iterator getFirstInstrTerminator()

Same getFirstTerminator but it ignores bundles and return an instr_iterator instead.

Definition:MachineBasicBlock.cpp:253

llvm::MachineBasicBlock::rbegin

reverse_iterator rbegin()

Definition:MachineBasicBlock.h:359

llvm::MachineBasicBlock::isMachineBlockAddressTaken

bool isMachineBlockAddressTaken() const

Test whether this block is used as something other than the target of a terminator,...

Definition:MachineBasicBlock.h:285

llvm::MachineBasicBlock::printName

void printName(raw_ostream &os, unsigned printNameFlags=PrintNameIr, ModuleSlotTracker *moduleSlotTracker=nullptr) const

Print the basic block's name as:

Definition:MachineBasicBlock.cpp:490

llvm::MachineBasicBlock::isSuccessor

bool isSuccessor(const MachineBasicBlock *MBB) const

Return true if the specified MBB is a successor of this block.

Definition:MachineBasicBlock.cpp:960

llvm::MachineBasicBlock::predecessors

iterator_range< pred_iterator > predecessors()

Definition:MachineBasicBlock.h:438

llvm::MachineBasicBlock::splice

void splice(iterator Where, MachineBasicBlock *Other, iterator From)

Take an instruction from MBB 'Other' at the position From, and insert it into this MBB right before '...

Definition:MachineBasicBlock.h:1109

llvm::MachineBasicBlock::getAlignment

Align getAlignment() const

Return alignment of the basic block.

Definition:MachineBasicBlock.h:614

llvm::MachineBasicBlock::canSplitCriticalEdge

bool canSplitCriticalEdge(const MachineBasicBlock *Succ) const

Check if the edge between this block and the given successor Succ, can be split.

Definition:MachineBasicBlock.cpp:1384

llvm::MachineBasicBlock::isLegalToHoistInto

bool isLegalToHoistInto() const

Returns true if it is legal to hoist instructions into this block.

Definition:MachineBasicBlock.cpp:314

llvm::MachineBasicBlock::getName

StringRef getName() const

Return the name of the corresponding LLVM basic block, or an empty string.

Definition:MachineBasicBlock.cpp:326

llvm::MachineBasicBlock::front

MachineInstr & front()

Definition:MachineBasicBlock.h:334

llvm::MachineBasicBlock::mayHaveInlineAsmBr

bool mayHaveInlineAsmBr() const

Returns true if this block may have an INLINEASM_BR (overestimate, by checking if any of the successo...

Definition:MachineBasicBlock.cpp:306

llvm::MachineBasicBlock::LivenessQueryResult

LivenessQueryResult

Possible outcome of a register liveness query to computeRegisterLiveness()

Definition:MachineBasicBlock.h:1178

llvm::MachineBasicBlock::LQR_Dead

@ LQR_Dead

Definition:MachineBasicBlock.h:1180

llvm::MachineBasicBlock::LQR_Live

@ LQR_Live

Definition:MachineBasicBlock.h:1179

llvm::MachineBasicBlock::LQR_Unknown

@ LQR_Unknown

Definition:MachineBasicBlock.h:1181

llvm::MachineBasicBlock::moveAfter

void moveAfter(MachineBasicBlock *NewBefore)

Definition:MachineBasicBlock.cpp:680

llvm::MachineBasicBlock::getEndClobberMask

const uint32_t * getEndClobberMask(const TargetRegisterInfo *TRI) const

Get the clobber mask for the end of the basic block.

Definition:MachineBasicBlock.cpp:1736

llvm::MachineBasicBlock::sizeWithoutDebugLargerThan

bool sizeWithoutDebugLargerThan(unsigned Limit) const

Definition:MachineBasicBlock.cpp:1777

llvm::MachineBasicBlock::isLiveIn

bool isLiveIn(MCRegister Reg, LaneBitmask LaneMask=LaneBitmask::getAll()) const

Return true if the specified register is in the live in set.

Definition:MachineBasicBlock.cpp:618

llvm::MachineBasicBlock::removeFromParent

MachineBasicBlock * removeFromParent()

This method unlinks 'this' from the containing function, and returns it, but does not delete it.

Definition:MachineBasicBlock.cpp:1469

llvm::MachineBasicBlock::reverse_instr_iterator

Instructions::reverse_iterator reverse_instr_iterator

Definition:MachineBasicBlock.h:316

llvm::MachineDomTreeUpdater

Definition:MachineDomTreeUpdater.h:26

llvm::MachineFunctionProperties::hasProperty

bool hasProperty(Property P) const

Definition:MachineFunction.h:203

llvm::MachineFunctionProperties::Property::TracksLiveness

@ TracksLiveness

llvm::MachineFunction::Delegate

Definition:MachineFunction.h:469

llvm::MachineFunction

Definition:MachineFunction.h:267

llvm::MachineFunction::addToMBBNumbering

unsigned addToMBBNumbering(MachineBasicBlock *MBB)

Adds the MBB to the internal numbering.

Definition:MachineFunction.h:1002

llvm::MachineFunction::getFunctionNumber

unsigned getFunctionNumber() const

getFunctionNumber - Return a unique ID for the current function.

Definition:MachineFunction.h:713

llvm::MachineFunction::getSubtarget

const TargetSubtargetInfo & getSubtarget() const

getSubtarget - Return the subtarget for which this machine code is being compiled.

Definition:MachineFunction.h:733

llvm::MachineFunction::getName

StringRef getName() const

getName - Return the name of the corresponding LLVM function.

Definition:MachineFunction.cpp:645

llvm::MachineFunction::hasBBSections

bool hasBBSections() const

Returns true if this function has basic block sections enabled.

Definition:MachineFunction.h:716

llvm::MachineFunction::getContext

MCContext & getContext() const

Definition:MachineFunction.h:690

llvm::MachineFunction::getRegInfo

MachineRegisterInfo & getRegInfo()

getRegInfo - Return information about the registers currently in use.

Definition:MachineFunction.h:743

llvm::MachineFunction::resetDelegate

void resetDelegate(Delegate *delegate)

Reset the currently registered delegate - otherwise assert.

Definition:MachineFunction.h:670

llvm::MachineFunction::getFunction

Function & getFunction()

Return the LLVM function that this machine code represents.

Definition:MachineFunction.h:704

llvm::MachineFunction::end

iterator end()

Definition:MachineFunction.h:949

llvm::MachineFunction::begin

iterator begin()

Definition:MachineFunction.h:947

llvm::MachineFunction::remove

void remove(iterator MBBI)

Definition:MachineFunction.h:979

llvm::MachineFunction::getProperties

const MachineFunctionProperties & getProperties() const

Get the function properties.

Definition:MachineFunction.h:824

llvm::MachineFunction::setDelegate

void setDelegate(Delegate *delegate)

Set the delegate.

Definition:MachineFunction.h:678

llvm::MachineFunction::getJumpTableInfo

const MachineJumpTableInfo * getJumpTableInfo() const

getJumpTableInfo - Return the jump table info object for the current function.

Definition:MachineFunction.h:756

llvm::MachineFunction::splice

void splice(iterator InsertPt, iterator MBBI)

Definition:MachineFunction.h:969

llvm::MachineFunction::CreateMachineBasicBlock

MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *BB=nullptr, std::optional< UniqueBBID > BBID=std::nullopt)

CreateMachineBasicBlock - Allocate a new MachineBasicBlock.

Definition:MachineFunction.cpp:499

llvm::MachineFunction::erase

void erase(iterator MBBI)

Definition:MachineFunction.h:981

llvm::MachineFunction::insert

void insert(iterator MBBI, MachineBasicBlock *MBB)

Definition:MachineFunction.h:966

llvm::MachineFunction::getTarget

const TargetMachine & getTarget() const

getTarget - Return the target machine this machine code is compiled with

Definition:MachineFunction.h:729

llvm::MachineFunction::const_iterator

BasicBlockListType::const_iterator const_iterator

Definition:MachineFunction.h:930

llvm::MachineInstrBuilder::addReg

const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const

Add a new virtual register operand.

Definition:MachineInstrBuilder.h:99

llvm::MachineInstrBundleIterator< MachineInstr >

llvm::MachineInstrBundleIterator::getReverse

reverse_iterator getReverse() const

Get a reverse iterator to the same node.

Definition:MachineInstrBundleIterator.h:283

llvm::MachineInstr

Representation of each machine instruction.

Definition:MachineInstr.h:71

llvm::MachineInstr::BundledPred

@ BundledPred

Definition:MachineInstr.h:91

llvm::MachineInstr::BundledSucc

@ BundledSucc

Definition:MachineInstr.h:92

llvm::MachineJumpTableInfo

Definition:MachineJumpTableInfo.h:46

llvm::MachineJumpTableInfo::ReplaceMBBInJumpTable

bool ReplaceMBBInJumpTable(unsigned Idx, MachineBasicBlock *Old, MachineBasicBlock *New)

ReplaceMBBInJumpTable - If Old is a target of the jump tables, update the jump table to branch to New...

Definition:MachineFunction.cpp:1403

llvm::MachineJumpTableInfo::getJumpTables

const std::vector< MachineJumpTableEntry > & getJumpTables() const

Definition:MachineJumpTableInfo.h:110

llvm::MachineLoopInfo

Definition:MachineLoopInfo.h:105

llvm::MachineLoop

Definition:MachineLoopInfo.h:46

llvm::MachineOperand

MachineOperand class - Representation of each machine instruction operand.

Definition:MachineOperand.h:48

llvm::MachineOperand::isUndef

bool isUndef() const

Definition:MachineOperand.h:404

llvm::MachineOperand::getMBB

MachineBasicBlock * getMBB() const

Definition:MachineOperand.h:571

llvm::MachineOperand::setMBB

void setMBB(MachineBasicBlock *MBB)

Definition:MachineOperand.h:728

llvm::MachineOperand::getReg

getReg - Returns the register number.

Definition:MachineOperand.h:369

llvm::MachineRegisterInfo

MachineRegisterInfo - Keep track of information for virtual and physical registers,...

Definition:MachineRegisterInfo.h:51

llvm::ModuleSlotTracker

Manage lifetime of a slot tracker for printing IR.

Definition:ModuleSlotTracker.h:44

llvm::ModuleSlotTracker::getLocalSlot

int getLocalSlot(const Value *V)

Return the slot number of the specified local value.

Definition:AsmWriter.cpp:918

llvm::ModuleSlotTracker::incorporateFunction

void incorporateFunction(const Function &F)

Incorporate the given function.

Definition:AsmWriter.cpp:904

llvm::Module

A Module instance is used to store all the information related to an LLVM module.

Definition:Module.h:65

llvm::Pass

Pass interface - Implemented by all 'passes'.

Definition:Pass.h:94

llvm::Pass::print

virtual void print(raw_ostream &OS, const Module *M) const

print - Print out the internal state of the pass.

Definition:Pass.cpp:130

llvm::PredIterator

Definition:CFG.h:42

llvm::Printable

Simple wrapper around std::function<void(raw_ostream&)>.

Definition:Printable.h:38

llvm::Register

Wrapper class representing virtual and physical registers.

Definition:Register.h:19

llvm::Register::index2VirtReg

static Register index2VirtReg(unsigned Index)

Convert a 0-based index to a virtual register number.

Definition:Register.h:84

llvm::SetVector::remove

bool remove(const value_type &X)

Remove an item from the set vector.

Definition:SetVector.h:188

llvm::SetVector::insert

bool insert(const value_type &X)

Insert a new element into the SetVector.

Definition:SetVector.h:162

llvm::SlotIndex

SlotIndex - An opaque wrapper around machine indexes.

Definition:SlotIndexes.h:65

llvm::SlotIndex::getPrevSlot

SlotIndex getPrevSlot() const

Returns the previous slot in the index list.

Definition:SlotIndexes.h:272

llvm::SlotIndexes

SlotIndexes pass.

Definition:SlotIndexes.h:297

llvm::SlotIndexes::insertMachineInstrInMaps

SlotIndex insertMachineInstrInMaps(MachineInstr &MI, bool Late=false)

Insert the given machine instruction into the mapping.

Definition:SlotIndexes.h:531

llvm::SlotIndexes::removeMachineInstrFromMaps

void removeMachineInstrFromMaps(MachineInstr &MI, bool AllowBundled=false)

Removes machine instruction (bundle) MI from the mapping.

Definition:SlotIndexes.cpp:127

llvm::SlotIndexes::insertMBBInMaps

void insertMBBInMaps(MachineBasicBlock *mbb)

Add the given MachineBasicBlock into the maps.

Definition:SlotIndexes.h:606

llvm::SlotIndexes::getMBBEndIdx

SlotIndex getMBBEndIdx(unsigned Num) const

Returns the last index in the given basic block number.

Definition:SlotIndexes.h:470

llvm::SlotIndexes::getInstructionIndex

SlotIndex getInstructionIndex(const MachineInstr &MI, bool IgnoreBundle=false) const

Returns the base index for the given instruction.

Definition:SlotIndexes.h:379

llvm::SlotIndexes::getMBBStartIdx

SlotIndex getMBBStartIdx(unsigned Num) const

Returns the first index in the given basic block number.

Definition:SlotIndexes.h:460

llvm::SlotIndexes::hasIndex

bool hasIndex(const MachineInstr &instr) const

Returns true if the given machine instr is mapped to an index, otherwise returns false.

Definition:SlotIndexes.h:374

llvm::SmallSetVector

A SetVector that performs no allocations if smaller than a certain size.

Definition:SetVector.h:370

llvm::SmallSet

SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...

Definition:SmallSet.h:132

llvm::SmallSet::count

size_type count(const T &V) const

count - Return 1 if the element is in the set, 0 otherwise.

Definition:SmallSet.h:175

llvm::SmallSet::insert

std::pair< const_iterator, bool > insert(const T &V)

insert - Insert an element into the set if it isn't already there.

Definition:SmallSet.h:181

llvm::SmallString

SmallString - A SmallString is just a SmallVector with methods and accessors that make it work better...

Definition:SmallString.h:26

llvm::SmallVectorBase::empty

bool empty() const

Definition:SmallVector.h:81

llvm::SmallVectorImpl::pop_back_val

T pop_back_val()

Definition:SmallVector.h:673

llvm::SmallVectorTemplateBase::push_back

void push_back(const T &Elt)

Definition:SmallVector.h:413

llvm::SmallVector

This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.

Definition:SmallVector.h:1196

llvm::SparseBitVector

Definition:SparseBitVector.h:256

llvm::StringRef

StringRef - Represent a constant reference to a string, i.e.

Definition:StringRef.h:51

llvm::TargetInstrInfo

TargetInstrInfo - Interface to description of machine instruction set.

Definition:TargetInstrInfo.h:112

llvm::TargetLoweringBase::getExceptionPointerRegister

virtual Register getExceptionPointerRegister(const Constant *PersonalityFn) const

If a physical register, this returns the register that receives the exception address on entry to an ...

Definition:TargetLowering.h:2022

llvm::TargetLoweringBase::getExceptionSelectorRegister

virtual Register getExceptionSelectorRegister(const Constant *PersonalityFn) const

If a physical register, this returns the register that receives the exception typeid on entry to a la...

Definition:TargetLowering.h:2029

llvm::TargetLowering

This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...

Definition:TargetLowering.h:3780

llvm::TargetMachine::requiresStructuredCFG

bool requiresStructuredCFG() const

Definition:TargetMachine.h:223

llvm::TargetRegisterClass

Definition:TargetRegisterInfo.h:44

llvm::TargetRegisterInfo

TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...

Definition:TargetRegisterInfo.h:235

llvm::TargetSubtargetInfo::getRegisterInfo

virtual const TargetRegisterInfo * getRegisterInfo() const

getRegisterInfo - If register information is available, return it.

Definition:TargetSubtargetInfo.h:129

llvm::TargetSubtargetInfo::getInstrInfo

virtual const TargetInstrInfo * getInstrInfo() const

Definition:TargetSubtargetInfo.h:97

llvm::TargetSubtargetInfo::getTargetLowering

virtual const TargetLowering * getTargetLowering() const

Definition:TargetSubtargetInfo.h:101

llvm::Twine

Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...

Definition:Twine.h:81

llvm::VNInfo

VNInfo - Value Number Information.

Definition:LiveInterval.h:53

llvm::Value::getName

StringRef getName() const

Return a constant reference to the value's name.

Definition:Value.cpp:309

llvm::cl::opt

Definition:CommandLine.h:1423

llvm::ilist_node_impl< ilist_detail::compute_node_options< T, Options... >::type >::getIterator

self_iterator getIterator()

Definition:ilist_node.h:132

llvm::ilist_node_with_parent< MachineBasicBlock, MachineFunction >::getNextNode

MachineBasicBlock * getNextNode()

Get the next node, or nullptr for the list tail.

Definition:ilist_node.h:353

llvm::iplist_impl::erase

iterator erase(iterator where)

Definition:ilist.h:204

llvm::iplist_impl::remove

pointer remove(iterator &IT)

Definition:ilist.h:188

llvm::iplist_impl::insert

iterator insert(iterator where, pointer New)

Definition:ilist.h:165

llvm::raw_ostream

This class implements an extremely fast bulk output stream that can only output to a stream.

Definition:raw_ostream.h:52

llvm::raw_ostream::indent

raw_ostream & indent(unsigned NumSpaces)

indent - Insert 'NumSpaces' spaces.

Definition:raw_ostream.cpp:495

llvm::raw_svector_ostream

A raw_ostream that writes to an SmallVector or SmallString.

Definition:raw_ostream.h:691

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

Definition:ErrorHandling.h:143

TargetMachine.h

llvm::RegState::Kill

@ Kill

The last use of a register.

Definition:MachineInstrBuilder.h:50

llvm::cl::Hidden

@ Hidden

Definition:CommandLine.h:137

llvm::cl::init

initializer< Ty > init(const Ty &Val)

Definition:CommandLine.h:443

llvm

This is an optimization pass for GlobalISel generic memory operations.

Definition:AddressRanges.h:18

llvm::next_nodbg

IterT next_nodbg(IterT It, IterT End, bool SkipPseudoOp=true)

Increment It, then continue incrementing it while it points to a debug instruction.

Definition:MachineBasicBlock.h:1440

llvm::find

auto find(R &&Range, const T &Val)

Provide wrappers to std::find which take ranges instead of having to pass begin/end explicitly.

Definition:STLExtras.h:1759

llvm::BuildMI

MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)

Builder interface. Specify how to create the initial instruction itself.

Definition:MachineInstrBuilder.h:373

llvm::make_range

iterator_range< T > make_range(T x, T y)

Convenience function for iterating over sub-ranges.

Definition:iterator_range.h:77

llvm::AnalyzePhysRegInBundle

PhysRegInfo AnalyzePhysRegInBundle(const MachineInstr &MI, Register Reg, const TargetRegisterInfo *TRI)

AnalyzePhysRegInBundle - Analyze how the current instruction or bundle uses a physical register.

Definition:MachineInstrBundle.cpp:334

llvm::PrintLaneMask

Printable PrintLaneMask(LaneBitmask LaneMask)

Create Printable object to print LaneBitmasks on a raw_ostream.

Definition:LaneBitmask.h:92

llvm::skipDebugInstructionsForward

IterT skipDebugInstructionsForward(IterT It, IterT End, bool SkipPseudoOp=true)

Increment It until it points to a non-debug instruction or to End and return the resulting iterator.

Definition:MachineBasicBlock.h:1416

llvm::sort

void sort(IteratorTy Start, IteratorTy End)

Definition:STLExtras.h:1664

llvm::dbgs

raw_ostream & dbgs()

dbgs() - This returns a reference to a raw_ostream for debugging messages.

Definition:Debug.cpp:163

llvm::instructionsWithoutDebug

auto instructionsWithoutDebug(IterT It, IterT End, bool SkipPseudoOp=true)

Construct a range iterator which begins at It and moves forwards until End is reached,...

Definition:MachineBasicBlock.h:1454

llvm::skipDebugInstructionsBackward

IterT skipDebugInstructionsBackward(IterT It, IterT Begin, bool SkipPseudoOp=true)

Decrement It until it points to a non-debug instruction or to Begin and return the resulting iterator...

Definition:MachineBasicBlock.h:1429

llvm::format

format_object< Ts... > format(const char *Fmt, const Ts &... Vals)

These are helper functions used to produce formatted output.

Definition:Format.h:125

llvm::IRMemLocation::First

@ First

Helpers to iterate all locations in the MemoryEffectsBase class.

llvm::operator<<

raw_ostream & operator<<(raw_ostream &OS, const APFixedPoint &FX)

Definition:APFixedPoint.h:303

llvm::PseudoProbeReservedId::Last

@ Last

llvm::find_if

auto find_if(R &&Range, UnaryPredicate P)

Provide wrappers to std::find_if which take ranges instead of having to pass begin/end explicitly.

Definition:STLExtras.h:1766

llvm::is_contained

bool is_contained(R &&Range, const E &Element)

Returns true if Element is found in Range.

Definition:STLExtras.h:1903

llvm::prev_nodbg

IterT prev_nodbg(IterT It, IterT Begin, bool SkipPseudoOp=true)

Decrement It, then continue decrementing it while it points to a debug instruction.

Definition:MachineBasicBlock.h:1447

llvm::printReg

Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)

Prints virtual and physical registers with or without a TRI instance.

Definition:TargetRegisterInfo.cpp:107

llvm::printMBBReference

Printable printMBBReference(const MachineBasicBlock &MBB)

Prints a machine basic block reference.

Definition:MachineBasicBlock.cpp:122

llvm::addLiveIns

void addLiveIns(MachineBasicBlock &MBB, const LivePhysRegs &LiveRegs)

Adds registers contained in LiveRegs to the block live-in list of MBB.

Definition:LivePhysRegs.cpp:259

std::swap

void swap(llvm::BitVector &LHS, llvm::BitVector &RHS)

Implement std::swap in terms of BitVector swap.

Definition:BitVector.h:860

raw_ostream.h

#define N

llvm::Align

This struct is a compact representation of a valid (non-zero power of two) alignment.

Definition:Alignment.h:39

llvm::Align::value

uint64_t value() const

This is a hole in the type system and should not be abused.

Definition:Alignment.h:85

llvm::LaneBitmask

Definition:LaneBitmask.h:40

llvm::LiveRange::Segment

This represents a simple continuous liveness interval for a value.

Definition:LiveInterval.h:162

llvm::LiveVariables::VarInfo::removeKill

bool removeKill(MachineInstr &MI)

removeKill - Delete a kill corresponding to the specified machine instruction.

Definition:LiveVariables.h:93

llvm::LiveVariables::VarInfo::Kills

std::vector< MachineInstr * > Kills

Kills - List of MachineInstruction's which are the last use of this virtual register (kill it) in the...

Definition:LiveVariables.h:88

llvm::MBBSectionID

Definition:MachineBasicBlock.h:55

llvm::MBBSectionID::ExceptionSectionID

static const MBBSectionID ExceptionSectionID

Definition:MachineBasicBlock.h:68

llvm::MBBSectionID::Number

unsigned Number

Definition:MachineBasicBlock.h:62

llvm::MBBSectionID::ColdSectionID

static const MBBSectionID ColdSectionID

Definition:MachineBasicBlock.h:67

llvm::MBBSectionID::Type

enum llvm::MBBSectionID::SectionType Type

llvm::MBBSectionID::Cold

@ Cold

Definition:MachineBasicBlock.h:60

llvm::MBBSectionID::Exception

@ Exception

Definition:MachineBasicBlock.h:59

llvm::MachineBasicBlock::RegisterMaskPair

Pair of physical register and lane mask.

Definition:MachineBasicBlock.h:130

llvm::MachineBasicBlock::RegisterMaskPair::PhysReg

MCRegister PhysReg

Definition:MachineBasicBlock.h:132

llvm::MachineJumpTableEntry

MachineJumpTableEntry - One jump table in the jump table info.

Definition:MachineJumpTableInfo.h:35

llvm::MachineJumpTableEntry::MBBs

std::vector< MachineBasicBlock * > MBBs

MBBs - The vector of basic blocks from which to create the jump table.

Definition:MachineJumpTableInfo.h:37

llvm::PhysRegInfo

Information about how a physical register Reg is used by a set of operands.

Definition:MachineInstrBundle.h:253

llvm::cl::desc

Definition:CommandLine.h:409

llvm::ilist_alloc_traits::deleteNode

static void deleteNode(NodeTy *V)

Definition:ilist.h:42

llvm::ilist_callback_traits::removeNodeFromList

void removeNodeFromList(NodeTy *)

Definition:ilist.h:67

llvm::ilist_callback_traits::addNodeToList

void addNodeToList(NodeTy *)

Definition:ilist.h:66

llvm::ilist_callback_traits::transferNodesFromList

void transferNodesFromList(ilist_callback_traits &OldList, Iterator, Iterator)

Callback before transferring nodes to this list.

Definition:ilist.h:72

llvm::ilist_traits

Template traits for intrusive list.

Definition:ilist.h:90