1//===-- M68kDisassembler.cpp - Disassembler for M68k ------------*- C++ -*-===// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7//===----------------------------------------------------------------------===// 9// This file is part of the M68k Disassembler. 11//===----------------------------------------------------------------------===// 31#define DEBUG_TYPE "m68k-disassembler" 36 M68k::D0, M68k::D1, M68k::D2, M68k::D3, M68k::D4, M68k::D5,
37 M68k::D6, M68k::D7, M68k::A0, M68k::A1, M68k::A2, M68k::A3,
38 M68k::A4, M68k::A5, M68k::A6, M68k::SP, M68k::FP0, M68k::FP1,
39 M68k::FP2, M68k::FP3, M68k::FP4, M68k::FP5, M68k::FP6, M68k::FP7,
40 M68k::FPIAR, M68k::FPS, M68k::FPC};
43uint64_t Address,
constvoid *Decoder) {
45return DecodeStatus::Fail;
47return DecodeStatus::Success;
103#define DecodeFPDR32RegisterClass DecodeFPDRRegisterClass 104#define DecodeFPDR64RegisterClass DecodeFPDRRegisterClass 105#define DecodeFPDR80RegisterClass DecodeFPDRRegisterClass 112#define DecodeFPICRegisterClass DecodeFPCSCRegisterClass 129return DecodeStatus::Success;
132#include "M68kGenDisassemblerTable.inc" 134#undef DecodeFPDR32RegisterClass 135#undef DecodeFPDR64RegisterClass 136#undef DecodeFPDR80RegisterClass 137#undef DecodeFPICRegisterClass 139/// A disassembler class for M68k. 155auto MakeUp = [&](
APInt &
Insn,
unsigned InstrBits) {
156unsignedIdx =
Insn.getBitWidth() >> 3;
158if (RoundUp >
Insn.getBitWidth())
160 RoundUp = RoundUp >> 3;
161for (;
Idx < RoundUp;
Idx += 2) {
166// 2 bytes of data are consumed, so set Size to 2 167// If we don't do this, disassembler may generate result even 168// the encoding is invalid. We need to let it fail correctly. 170 Result = decodeInstruction(DecoderTable80, Instr,
Insn,
Address,
this,
STI,
172if (Result == DecodeStatus::Success)
173Size = InstrLenTable[Instr.getOpcode()] >> 3;
184// Register the disassembler. SmallVector< AArch64_IMM::ImmInsnModel, 4 > Insn
#define LLVM_EXTERNAL_VISIBILITY
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
static DecodeStatus DecodeSRCRegisterClass(MCInst &Inst, APInt &Insn, uint64_t Address, const void *Decoder)
static const unsigned RegisterDecode[]
MCDisassembler::DecodeStatus DecodeStatus
static DecodeStatus DecodeXR32RegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)
static DecodeStatus DecodeFPDRRegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)
static DecodeStatus DecodeDR32RegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)
static MCDisassembler * createM68kDisassembler(const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx)
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeM68kDisassembler()
static DecodeStatus DecodeCCRCRegisterClass(MCInst &Inst, APInt &Insn, uint64_t Address, const void *Decoder)
static DecodeStatus DecodeRegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)
static DecodeStatus DecodeDR8RegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)
static DecodeStatus DecodeAR32RegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)
static DecodeStatus DecodeFPCSCRegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)
static DecodeStatus DecodeXR16RegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)
static DecodeStatus DecodeAR16RegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)
static DecodeStatus DecodeDR16RegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)
static DecodeStatus DecodeImm32(MCInst &Inst, uint64_t Imm, uint64_t Address, const void *Decoder)
This file contains the declarations for the code emitter which are useful outside of the emitter itse...
This file provides M68k specific target descriptions.
This file contains the M68k implementation of the TargetRegisterInfo class.
This file declares the M68k specific subclass of TargetSubtargetInfo.
This file contains the entry points for global functions defined in the M68k target library,...
Class for arbitrary precision integers.
uint64_t getZExtValue() const
Get zero extended value.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Context object for machine code objects.
Superclass for all disassemblers.
const MCSubtargetInfo & STI
DecodeStatus
Ternary decode status.
Instances of this class represent a single low-level machine instruction.
void addOperand(const MCOperand Op)
static MCOperand createReg(MCRegister Reg)
static MCOperand createImm(int64_t Val)
Generic base class for all target subtargets.
Target - Wrapper for Target specific information.
This class implements an extremely fast bulk output stream that can only output to a stream.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
uint16_t read16be(const void *P)
This is an optimization pass for GlobalISel generic memory operations.
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
Target & getTheM68kTarget()
A disassembler class for M68k.
DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size, ArrayRef< uint8_t > Bytes, uint64_t Address, raw_ostream &CStream) const override
Returns the disassembly of a single instruction.
M68kDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx)
virtual ~M68kDisassembler()
This struct is a compact representation of a valid (non-zero power of two) alignment.
static void RegisterMCDisassembler(Target &T, Target::MCDisassemblerCtorTy Fn)
RegisterMCDisassembler - Register a MCDisassembler implementation for the given target.
