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LLVM 20.0.0git
CallingConvLower.cpp
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1//===-- CallingConvLower.cpp - Calling Conventions ------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements the CCState class, used for lowering and implementing
10// calling conventions.
11//
12//===----------------------------------------------------------------------===//
13
14#include "llvm/CodeGen/CallingConvLower.h"
15#include "llvm/CodeGen/MachineFrameInfo.h"
16#include "llvm/CodeGen/MachineFunction.h"
17#include "llvm/CodeGen/TargetLowering.h"
18#include "llvm/CodeGen/TargetRegisterInfo.h"
19#include "llvm/CodeGen/TargetSubtargetInfo.h"
20#include "llvm/MC/MCRegisterInfo.h"
21#include "llvm/Support/Debug.h"
22#include "llvm/Support/ErrorHandling.h"
23#include "llvm/Support/SaveAndRestore.h"
24#include "llvm/Support/raw_ostream.h"
25
26using namespacellvm;
27
28CCState::CCState(CallingConv::IDCC,bool IsVarArg,MachineFunction &MF,
29SmallVectorImpl<CCValAssign> &Locs,LLVMContext &Context,
30bool NegativeOffsets)
31 : CallingConv(CC), IsVarArg(IsVarArg), MF(MF),
32TRI(*MF.getSubtarget().getRegisterInfo()), Locs(Locs), Context(Context),
33 NegativeOffsets(NegativeOffsets) {
34
35// No stack is used.
36 StackSize = 0;
37
38clearByValRegsInfo();
39 UsedRegs.resize((TRI.getNumRegs()+31)/32);
40}
41
42/// Allocate space on the stack large enough to pass an argument by value.
43/// The size and alignment information of the argument is encoded in
44/// its parameter attribute.
45voidCCState::HandleByVal(unsigned ValNo,MVT ValVT,MVT LocVT,
46CCValAssign::LocInfo LocInfo,int MinSize,
47AlignMinAlign,ISD::ArgFlagsTy ArgFlags) {
48Align Alignment = ArgFlags.getNonZeroByValAlign();
49unsignedSize = ArgFlags.getByValSize();
50if (MinSize > (int)Size)
51Size = MinSize;
52if (MinAlign > Alignment)
53 Alignment =MinAlign;
54ensureMaxAlignment(Alignment);
55 MF.getSubtarget().getTargetLowering()->HandleByVal(this,Size, Alignment);
56Size =unsigned(alignTo(Size,MinAlign));
57uint64_tOffset =AllocateStack(Size, Alignment);
58addLoc(CCValAssign::getMem(ValNo, ValVT,Offset, LocVT, LocInfo));
59}
60
61/// Mark a register and all of its aliases as allocated.
62void CCState::MarkAllocated(MCPhysReg Reg) {
63for (MCRegAliasIterator AI(Reg, &TRI,true); AI.isValid(); ++AI)
64 UsedRegs[(*AI).id() / 32] |= 1 << ((*AI).id() & 31);
65}
66
67void CCState::MarkUnallocated(MCPhysReg Reg) {
68for (MCRegAliasIterator AI(Reg, &TRI,true); AI.isValid(); ++AI)
69 UsedRegs[(*AI).id() / 32] &= ~(1 << ((*AI).id() & 31));
70}
71
72boolCCState::IsShadowAllocatedReg(MCRegister Reg) const{
73if (!isAllocated(Reg))
74returnfalse;
75
76for (autoconst &ValAssign : Locs)
77if (ValAssign.isRegLoc() && TRI.regsOverlap(ValAssign.getLocReg(), Reg))
78returnfalse;
79returntrue;
80}
81
82/// Analyze an array of argument values,
83/// incorporating info about the formals into this state.
84void
85CCState::AnalyzeFormalArguments(constSmallVectorImpl<ISD::InputArg> &Ins,
86CCAssignFn Fn) {
87unsigned NumArgs = Ins.size();
88
89for (unsigned i = 0; i != NumArgs; ++i) {
90MVT ArgVT = Ins[i].VT;
91ISD::ArgFlagsTy ArgFlags = Ins[i].Flags;
92if (Fn(i, ArgVT, ArgVT,CCValAssign::Full, ArgFlags, *this))
93report_fatal_error("unable to allocate function argument #" +Twine(i));
94 }
95}
96
97/// Analyze the return values of a function, returning true if the return can
98/// be performed without sret-demotion and false otherwise.
99boolCCState::CheckReturn(constSmallVectorImpl<ISD::OutputArg> &Outs,
100CCAssignFn Fn) {
101// Determine which register each value should be copied into.
102for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
103MVT VT = Outs[i].VT;
104ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
105if (Fn(i, VT, VT,CCValAssign::Full, ArgFlags, *this))
106returnfalse;
107 }
108returntrue;
109}
110
111/// Analyze the returned values of a return,
112/// incorporating info about the result values into this state.
113voidCCState::AnalyzeReturn(constSmallVectorImpl<ISD::OutputArg> &Outs,
114CCAssignFn Fn) {
115// Determine which register each value should be copied into.
116for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
117MVT VT = Outs[i].VT;
118ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
119if (Fn(i, VT, VT,CCValAssign::Full, ArgFlags, *this))
120report_fatal_error("unable to allocate function return #" +Twine(i));
121 }
122}
123
124/// Analyze the outgoing arguments to a call,
125/// incorporating info about the passed values into this state.
126voidCCState::AnalyzeCallOperands(constSmallVectorImpl<ISD::OutputArg> &Outs,
127CCAssignFn Fn) {
128unsigned NumOps = Outs.size();
129for (unsigned i = 0; i != NumOps; ++i) {
130MVT ArgVT = Outs[i].VT;
131ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
132if (Fn(i, ArgVT, ArgVT,CCValAssign::Full, ArgFlags, *this)) {
133#ifndef NDEBUG
134dbgs() <<"Call operand #" << i <<" has unhandled type "
135 << ArgVT <<'\n';
136#endif
137llvm_unreachable(nullptr);
138 }
139 }
140}
141
142/// Same as above except it takes vectors of types and argument flags.
143voidCCState::AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
144SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
145CCAssignFn Fn) {
146unsigned NumOps = ArgVTs.size();
147for (unsigned i = 0; i != NumOps; ++i) {
148MVT ArgVT = ArgVTs[i];
149ISD::ArgFlagsTy ArgFlags = Flags[i];
150if (Fn(i, ArgVT, ArgVT,CCValAssign::Full, ArgFlags, *this)) {
151#ifndef NDEBUG
152dbgs() <<"Call operand #" << i <<" has unhandled type "
153 << ArgVT <<'\n';
154#endif
155llvm_unreachable(nullptr);
156 }
157 }
158}
159
160/// Analyze the return values of a call, incorporating info about the passed
161/// values into this state.
162voidCCState::AnalyzeCallResult(constSmallVectorImpl<ISD::InputArg> &Ins,
163CCAssignFn Fn) {
164for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
165MVT VT = Ins[i].VT;
166ISD::ArgFlagsTy Flags = Ins[i].Flags;
167if (Fn(i, VT, VT,CCValAssign::Full, Flags, *this)) {
168#ifndef NDEBUG
169dbgs() <<"Call result #" << i <<" has unhandled type "
170 << VT <<'\n';
171#endif
172llvm_unreachable(nullptr);
173 }
174 }
175}
176
177/// Same as above except it's specialized for calls that produce a single value.
178voidCCState::AnalyzeCallResult(MVT VT,CCAssignFn Fn) {
179if (Fn(0, VT, VT,CCValAssign::Full,ISD::ArgFlagsTy(), *this)) {
180#ifndef NDEBUG
181dbgs() <<"Call result has unhandled type "
182 << VT <<'\n';
183#endif
184llvm_unreachable(nullptr);
185 }
186}
187
188voidCCState::ensureMaxAlignment(Align Alignment) {
189if (!AnalyzingMustTailForwardedRegs)
190 MF.getFrameInfo().ensureMaxAlignment(Alignment);
191}
192
193staticboolisValueTypeInRegForCC(CallingConv::IDCC,MVT VT) {
194if (VT.isVector())
195returntrue;// Assume -msse-regparm might be in effect.
196if (!VT.isInteger())
197returnfalse;
198return (CC ==CallingConv::X86_VectorCall ||CC ==CallingConv::X86_FastCall);
199}
200
201voidCCState::getRemainingRegParmsForType(SmallVectorImpl<MCPhysReg> &Regs,
202MVT VT,CCAssignFn Fn) {
203uint64_t SavedStackSize = StackSize;
204Align SavedMaxStackArgAlign = MaxStackArgAlign;
205unsigned NumLocs = Locs.size();
206
207// Set the 'inreg' flag if it is used for this calling convention.
208ISD::ArgFlagsTy Flags;
209if (isValueTypeInRegForCC(CallingConv, VT))
210 Flags.setInReg();
211
212// Allocate something of this value type repeatedly until we get assigned a
213// location in memory.
214bool HaveRegParm;
215do {
216if (Fn(0, VT, VT,CCValAssign::Full, Flags, *this)) {
217#ifndef NDEBUG
218dbgs() <<"Call has unhandled type " << VT
219 <<" while computing remaining regparms\n";
220#endif
221llvm_unreachable(nullptr);
222 }
223 HaveRegParm = Locs.back().isRegLoc();
224 }while (HaveRegParm);
225
226// Copy all the registers from the value locations we added.
227assert(NumLocs < Locs.size() &&"CC assignment failed to add location");
228for (unsignedI = NumLocs, E = Locs.size();I != E; ++I)
229if (Locs[I].isRegLoc())
230 Regs.push_back(MCPhysReg(Locs[I].getLocReg()));
231
232// Clear the assigned values and stack memory. We leave the registers marked
233// as allocated so that future queries don't return the same registers, i.e.
234// when i64 and f64 are both passed in GPRs.
235 StackSize = SavedStackSize;
236 MaxStackArgAlign = SavedMaxStackArgAlign;
237 Locs.truncate(NumLocs);
238}
239
240voidCCState::analyzeMustTailForwardedRegisters(
241SmallVectorImpl<ForwardedRegister> &Forwards,ArrayRef<MVT> RegParmTypes,
242CCAssignFn Fn) {
243// Oftentimes calling conventions will not user register parameters for
244// variadic functions, so we need to assume we're not variadic so that we get
245// all the registers that might be used in a non-variadic call.
246SaveAndRestore SavedVarArg(IsVarArg,false);
247SaveAndRestore SavedMustTail(AnalyzingMustTailForwardedRegs,true);
248
249for (MVT RegVT : RegParmTypes) {
250SmallVector<MCPhysReg, 8> RemainingRegs;
251getRemainingRegParmsForType(RemainingRegs, RegVT, Fn);
252constTargetLowering *TL = MF.getSubtarget().getTargetLowering();
253constTargetRegisterClass *RC = TL->getRegClassFor(RegVT);
254for (MCPhysReg PReg : RemainingRegs) {
255Register VReg = MF.addLiveIn(PReg, RC);
256 Forwards.push_back(ForwardedRegister(VReg, PReg, RegVT));
257 }
258 }
259}
260
261boolCCState::resultsCompatible(CallingConv::ID CalleeCC,
262CallingConv::ID CallerCC,MachineFunction &MF,
263LLVMContext &C,
264constSmallVectorImpl<ISD::InputArg> &Ins,
265CCAssignFn CalleeFn,CCAssignFn CallerFn) {
266if (CalleeCC == CallerCC)
267returntrue;
268SmallVector<CCValAssign, 4> RVLocs1;
269CCState CCInfo1(CalleeCC,false, MF, RVLocs1,C);
270 CCInfo1.AnalyzeCallResult(Ins, CalleeFn);
271
272SmallVector<CCValAssign, 4> RVLocs2;
273CCState CCInfo2(CallerCC,false, MF, RVLocs2,C);
274 CCInfo2.AnalyzeCallResult(Ins, CallerFn);
275
276auto AreCompatible = [](constCCValAssign &Loc1,constCCValAssign &Loc2) {
277assert(!Loc1.isPendingLoc() && !Loc2.isPendingLoc() &&
278"The location must have been decided by now");
279// Must fill the same part of their locations.
280if (Loc1.getLocInfo() != Loc2.getLocInfo())
281returnfalse;
282// Must both be in the same registers, or both in memory at the same offset.
283if (Loc1.isRegLoc() && Loc2.isRegLoc())
284return Loc1.getLocReg() == Loc2.getLocReg();
285if (Loc1.isMemLoc() && Loc2.isMemLoc())
286return Loc1.getLocMemOffset() == Loc2.getLocMemOffset();
287llvm_unreachable("Unknown location kind");
288 };
289
290return std::equal(RVLocs1.begin(), RVLocs1.end(), RVLocs2.begin(),
291 RVLocs2.end(), AreCompatible);
292}
isValueTypeInRegForCC
static bool isValueTypeInRegForCC(CallingConv::ID CC, MVT VT)
Definition:CallingConvLower.cpp:193
CallingConvLower.h
Debug.h
Size
uint64_t Size
Definition:ELFObjHandler.cpp:81
MCRegisterInfo.h
I
#define I(x, y, z)
Definition:MD5.cpp:58
MachineFrameInfo.h
MachineFunction.h
TRI
unsigned const TargetRegisterInfo * TRI
Definition:MachineSink.cpp:2029
CC
auto CC
Definition:RISCVRedundantCopyElimination.cpp:79
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
SaveAndRestore.h
This file provides utility classes that use RAII to save and restore values.
TargetLowering.h
This file describes how to lower LLVM code to machine code.
TargetRegisterInfo.h
TargetSubtargetInfo.h
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition:ArrayRef.h:41
llvm::CCState
CCState - This class holds information needed while lowering arguments and return values.
Definition:CallingConvLower.h:170
llvm::CCState::HandleByVal
void HandleByVal(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, int MinSize, Align MinAlign, ISD::ArgFlagsTy ArgFlags)
Allocate space on the stack large enough to pass an argument by value.
Definition:CallingConvLower.cpp:45
llvm::CCState::analyzeMustTailForwardedRegisters
void analyzeMustTailForwardedRegisters(SmallVectorImpl< ForwardedRegister > &Forwards, ArrayRef< MVT > RegParmTypes, CCAssignFn Fn)
Compute the set of registers that need to be preserved and forwarded to any musttail calls.
Definition:CallingConvLower.cpp:240
llvm::CCState::resultsCompatible
static bool resultsCompatible(CallingConv::ID CalleeCC, CallingConv::ID CallerCC, MachineFunction &MF, LLVMContext &C, const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn CalleeFn, CCAssignFn CallerFn)
Returns true if the results of the two calling conventions are compatible.
Definition:CallingConvLower.cpp:261
llvm::CCState::AnalyzeCallResult
void AnalyzeCallResult(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)
AnalyzeCallResult - Analyze the return values of a call, incorporating info about the passed values i...
Definition:CallingConvLower.cpp:162
llvm::CCState::IsShadowAllocatedReg
bool IsShadowAllocatedReg(MCRegister Reg) const
A shadow allocated register is a register that was allocated but wasn't added to the location list (L...
Definition:CallingConvLower.cpp:72
llvm::CCState::CheckReturn
bool CheckReturn(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
CheckReturn - Analyze the return values of a function, returning true if the return can be performed ...
Definition:CallingConvLower.cpp:99
llvm::CCState::AnalyzeReturn
void AnalyzeReturn(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
AnalyzeReturn - Analyze the returned values of a return, incorporating info about the result values i...
Definition:CallingConvLower.cpp:113
llvm::CCState::AllocateStack
int64_t AllocateStack(unsigned Size, Align Alignment)
AllocateStack - Allocate a chunk of stack space with the specified size and alignment.
Definition:CallingConvLower.h:405
llvm::CCState::getRemainingRegParmsForType
void getRemainingRegParmsForType(SmallVectorImpl< MCPhysReg > &Regs, MVT VT, CCAssignFn Fn)
Compute the remaining unused register parameters that would be used for the given value type.
Definition:CallingConvLower.cpp:201
llvm::CCState::AnalyzeCallOperands
void AnalyzeCallOperands(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
AnalyzeCallOperands - Analyze the outgoing arguments to a call, incorporating info about the passed v...
Definition:CallingConvLower.cpp:126
llvm::CCState::ensureMaxAlignment
void ensureMaxAlignment(Align Alignment)
Definition:CallingConvLower.cpp:188
llvm::CCState::CCState
CCState(CallingConv::ID CC, bool IsVarArg, MachineFunction &MF, SmallVectorImpl< CCValAssign > &Locs, LLVMContext &Context, bool NegativeOffsets=false)
Definition:CallingConvLower.cpp:28
llvm::CCState::isAllocated
bool isAllocated(MCRegister Reg) const
isAllocated - Return true if the specified register (or an alias) is allocated.
Definition:CallingConvLower.h:256
llvm::CCState::AnalyzeFormalArguments
void AnalyzeFormalArguments(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)
AnalyzeFormalArguments - Analyze an array of argument values, incorporating info about the formals in...
Definition:CallingConvLower.cpp:85
llvm::CCState::addLoc
void addLoc(const CCValAssign &V)
Definition:CallingConvLower.h:235
llvm::CCState::clearByValRegsInfo
void clearByValRegsInfo()
Definition:CallingConvLower.h:472
llvm::CCValAssign
CCValAssign - Represent assignment of one arg/retval to a location.
Definition:CallingConvLower.h:33
llvm::CCValAssign::isRegLoc
bool isRegLoc() const
Definition:CallingConvLower.h:122
llvm::CCValAssign::getLocReg
Register getLocReg() const
Definition:CallingConvLower.h:128
llvm::CCValAssign::isPendingLoc
bool isPendingLoc() const
Definition:CallingConvLower.h:124
llvm::CCValAssign::getLocInfo
LocInfo getLocInfo() const
Definition:CallingConvLower.h:134
llvm::CCValAssign::LocInfo
LocInfo
Definition:CallingConvLower.h:35
llvm::CCValAssign::Full
@ Full
Definition:CallingConvLower.h:36
llvm::CCValAssign::getMem
static CCValAssign getMem(unsigned ValNo, MVT ValVT, int64_t Offset, MVT LocVT, LocInfo HTP, bool IsCustom=false)
Definition:CallingConvLower.h:96
llvm::CCValAssign::isMemLoc
bool isMemLoc() const
Definition:CallingConvLower.h:123
llvm::CCValAssign::getLocMemOffset
int64_t getLocMemOffset() const
Definition:CallingConvLower.h:129
llvm::LLVMContext
This is an important class for using LLVM in a threaded context.
Definition:LLVMContext.h:67
llvm::MCRegAliasIterator
MCRegAliasIterator enumerates all registers aliasing Reg.
Definition:MCRegisterInfo.h:747
llvm::MCRegAliasIterator::isValid
bool isValid() const
Definition:MCRegisterInfo.h:763
llvm::MCRegisterInfo::getNumRegs
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
Definition:MCRegisterInfo.h:414
llvm::MCRegister
Wrapper class representing physical registers. Should be passed by value.
Definition:MCRegister.h:33
llvm::MVT
Machine Value Type.
Definition:MachineValueType.h:35
llvm::MVT::isVector
bool isVector() const
Return true if this is a vector value type.
Definition:MachineValueType.h:106
llvm::MVT::isInteger
bool isInteger() const
Return true if this is an integer or a vector integer type.
Definition:MachineValueType.h:90
llvm::MachineFrameInfo::ensureMaxAlignment
void ensureMaxAlignment(Align Alignment)
Make sure the function is at least Align bytes aligned.
Definition:MachineFrameInfo.cpp:31
llvm::MachineFunction
Definition:MachineFunction.h:267
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition:MachineFunction.h:733
llvm::MachineFunction::getFrameInfo
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Definition:MachineFunction.h:749
llvm::MachineFunction::addLiveIn
Register addLiveIn(MCRegister PReg, const TargetRegisterClass *RC)
addLiveIn - Add the specified physical register as a live-in value and create a corresponding virtual...
Definition:MachineFunction.cpp:762
llvm::Register
Wrapper class representing virtual and physical registers.
Definition:Register.h:19
llvm::SmallVectorBase::size
size_t size() const
Definition:SmallVector.h:78
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition:SmallVector.h:573
llvm::SmallVectorImpl::resize
void resize(size_type N)
Definition:SmallVector.h:638
llvm::SmallVectorTemplateBase::push_back
void push_back(const T &Elt)
Definition:SmallVector.h:413
llvm::SmallVectorTemplateCommon::end
iterator end()
Definition:SmallVector.h:269
llvm::SmallVectorTemplateCommon::begin
iterator begin()
Definition:SmallVector.h:267
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition:SmallVector.h:1196
llvm::TargetLoweringBase::getRegClassFor
virtual const TargetRegisterClass * getRegClassFor(MVT VT, bool isDivergent=false) const
Return the register class that should be used for the specified value type.
Definition:TargetLowering.h:1042
llvm::TargetLowering
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
Definition:TargetLowering.h:3780
llvm::TargetLowering::HandleByVal
virtual void HandleByVal(CCState *, unsigned &, Align) const
Target-specific cleanup for formal ByVal parameters.
Definition:TargetLowering.h:4776
llvm::TargetRegisterClass
Definition:TargetRegisterInfo.h:44
llvm::TargetRegisterInfo::regsOverlap
bool regsOverlap(Register RegA, Register RegB) const
Returns true if the two registers are equal or alias each other.
Definition:TargetRegisterInfo.h:460
llvm::TargetSubtargetInfo::getTargetLowering
virtual const TargetLowering * getTargetLowering() const
Definition:TargetSubtargetInfo.h:101
llvm::Twine
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition:Twine.h:81
uint16_t
uint64_t
unsigned
ErrorHandling.h
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition:ErrorHandling.h:143
llvm::CallingConv::X86_VectorCall
@ X86_VectorCall
MSVC calling convention that passes vectors and vector aggregates in SSE registers.
Definition:CallingConv.h:163
llvm::CallingConv::C
@ C
The default llvm calling convention, compatible with C.
Definition:CallingConv.h:34
llvm::CallingConv::X86_FastCall
@ X86_FastCall
'fast' analog of X86_StdCall.
Definition:CallingConv.h:103
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition:AddressRanges.h:18
llvm::Offset
@ Offset
Definition:DWP.cpp:480
llvm::MCPhysReg
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
Definition:MCRegister.h:21
llvm::MinAlign
constexpr T MinAlign(U A, V B)
A and B are either alignments or offsets.
Definition:MathExtras.h:367
llvm::dbgs
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition:Debug.cpp:163
llvm::report_fatal_error
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition:Error.cpp:167
llvm::CCAssignFn
bool CCAssignFn(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
CCAssignFn - This function assigns a location for Val, updating State to reflect the change.
Definition:CallingConvLower.h:156
llvm::alignTo
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
Definition:Alignment.h:155
raw_ostream.h
llvm::Align
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition:Alignment.h:39
llvm::ForwardedRegister
Describes a register that needs to be forwarded from the prologue to a musttail call.
Definition:CallingConvLower.h:146
llvm::ISD::ArgFlagsTy
Definition:TargetCallingConv.h:27
llvm::ISD::ArgFlagsTy::getByValSize
unsigned getByValSize() const
Definition:TargetCallingConv.h:173
llvm::ISD::ArgFlagsTy::getNonZeroByValAlign
Align getNonZeroByValAlign() const
Definition:TargetCallingConv.h:157
llvm::SaveAndRestore
A utility class that uses RAII to save and restore the value of a variable.
Definition:SaveAndRestore.h:23

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