1//===-- CallingConvLower.cpp - Calling Conventions ------------------------===// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7//===----------------------------------------------------------------------===// 9// This file implements the CCState class, used for lowering and implementing 10// calling conventions. 12//===----------------------------------------------------------------------===// 31 : CallingConv(
CC), IsVarArg(IsVarArg), MF(MF),
32TRI(*MF.getSubtarget().getRegisterInfo()), Locs(Locs), Context(Context),
33 NegativeOffsets(NegativeOffsets) {
42/// Allocate space on the stack large enough to pass an argument by value. 43/// The size and alignment information of the argument is encoded in 44/// its parameter attribute. 50if (MinSize > (
int)
Size)
61/// Mark a register and all of its aliases as allocated. 62void CCState::MarkAllocated(
MCPhysReg Reg) {
64 UsedRegs[(*AI).id() / 32] |= 1 << ((*AI).id() & 31);
67void CCState::MarkUnallocated(
MCPhysReg Reg) {
69 UsedRegs[(*AI).id() / 32] &= ~(1 << ((*AI).id() & 31));
76for (
autoconst &ValAssign : Locs)
77if (ValAssign.isRegLoc() && TRI.
regsOverlap(ValAssign.getLocReg(), Reg))
82/// Analyze an array of argument values, 83/// incorporating info about the formals into this state. 87unsigned NumArgs = Ins.size();
89for (
unsigned i = 0; i != NumArgs; ++i) {
97/// Analyze the return values of a function, returning true if the return can 98/// be performed without sret-demotion and false otherwise. 101// Determine which register each value should be copied into. 102for (
unsigned i = 0, e = Outs.
size(); i != e; ++i) {
111/// Analyze the returned values of a return, 112/// incorporating info about the result values into this state. 115// Determine which register each value should be copied into. 116for (
unsigned i = 0, e = Outs.
size(); i != e; ++i) {
124/// Analyze the outgoing arguments to a call, 125/// incorporating info about the passed values into this state. 128unsigned NumOps = Outs.
size();
129for (
unsigned i = 0; i != NumOps; ++i) {
130MVT ArgVT = Outs[i].VT;
134dbgs() <<
"Call operand #" << i <<
" has unhandled type " 142/// Same as above except it takes vectors of types and argument flags. 146unsigned NumOps = ArgVTs.
size();
147for (
unsigned i = 0; i != NumOps; ++i) {
148MVT ArgVT = ArgVTs[i];
152dbgs() <<
"Call operand #" << i <<
" has unhandled type " 160/// Analyze the return values of a call, incorporating info about the passed 161/// values into this state. 164for (
unsigned i = 0, e = Ins.size(); i != e; ++i) {
169dbgs() <<
"Call result #" << i <<
" has unhandled type " 177/// Same as above except it's specialized for calls that produce a single value. 181dbgs() <<
"Call result has unhandled type " 189if (!AnalyzingMustTailForwardedRegs)
195returntrue;
// Assume -msse-regparm might be in effect. 204Align SavedMaxStackArgAlign = MaxStackArgAlign;
205unsigned NumLocs = Locs.size();
207// Set the 'inreg' flag if it is used for this calling convention. 212// Allocate something of this value type repeatedly until we get assigned a 213// location in memory. 218dbgs() <<
"Call has unhandled type " << VT
219 <<
" while computing remaining regparms\n";
223 HaveRegParm = Locs.back().isRegLoc();
224 }
while (HaveRegParm);
226// Copy all the registers from the value locations we added. 227assert(NumLocs < Locs.size() &&
"CC assignment failed to add location");
228for (
unsignedI = NumLocs, E = Locs.size();
I != E; ++
I)
229if (Locs[
I].isRegLoc())
232// Clear the assigned values and stack memory. We leave the registers marked 233// as allocated so that future queries don't return the same registers, i.e. 234// when i64 and f64 are both passed in GPRs. 235 StackSize = SavedStackSize;
236 MaxStackArgAlign = SavedMaxStackArgAlign;
237 Locs.truncate(NumLocs);
243// Oftentimes calling conventions will not user register parameters for 244// variadic functions, so we need to assume we're not variadic so that we get 245// all the registers that might be used in a non-variadic call. 249for (
MVT RegVT : RegParmTypes) {
266if (CalleeCC == CallerCC)
269CCState CCInfo1(CalleeCC,
false, MF, RVLocs1,
C);
273CCState CCInfo2(CallerCC,
false, MF, RVLocs2,
C);
278"The location must have been decided by now");
279// Must fill the same part of their locations. 282// Must both be in the same registers, or both in memory at the same offset. 283if (Loc1.
isRegLoc() && Loc2.isRegLoc())
284return Loc1.
getLocReg() == Loc2.getLocReg();
285if (Loc1.
isMemLoc() && Loc2.isMemLoc())
290return std::equal(RVLocs1.
begin(), RVLocs1.
end(), RVLocs2.
begin(),
291 RVLocs2.
end(), AreCompatible);
static bool isValueTypeInRegForCC(CallingConv::ID CC, MVT VT)
unsigned const TargetRegisterInfo * TRI
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file provides utility classes that use RAII to save and restore values.
This file describes how to lower LLVM code to machine code.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
CCState - This class holds information needed while lowering arguments and return values.
void HandleByVal(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, int MinSize, Align MinAlign, ISD::ArgFlagsTy ArgFlags)
Allocate space on the stack large enough to pass an argument by value.
void analyzeMustTailForwardedRegisters(SmallVectorImpl< ForwardedRegister > &Forwards, ArrayRef< MVT > RegParmTypes, CCAssignFn Fn)
Compute the set of registers that need to be preserved and forwarded to any musttail calls.
static bool resultsCompatible(CallingConv::ID CalleeCC, CallingConv::ID CallerCC, MachineFunction &MF, LLVMContext &C, const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn CalleeFn, CCAssignFn CallerFn)
Returns true if the results of the two calling conventions are compatible.
void AnalyzeCallResult(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)
AnalyzeCallResult - Analyze the return values of a call, incorporating info about the passed values i...
bool IsShadowAllocatedReg(MCRegister Reg) const
A shadow allocated register is a register that was allocated but wasn't added to the location list (L...
bool CheckReturn(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
CheckReturn - Analyze the return values of a function, returning true if the return can be performed ...
void AnalyzeReturn(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
AnalyzeReturn - Analyze the returned values of a return, incorporating info about the result values i...
int64_t AllocateStack(unsigned Size, Align Alignment)
AllocateStack - Allocate a chunk of stack space with the specified size and alignment.
void getRemainingRegParmsForType(SmallVectorImpl< MCPhysReg > &Regs, MVT VT, CCAssignFn Fn)
Compute the remaining unused register parameters that would be used for the given value type.
void AnalyzeCallOperands(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
AnalyzeCallOperands - Analyze the outgoing arguments to a call, incorporating info about the passed v...
void ensureMaxAlignment(Align Alignment)
CCState(CallingConv::ID CC, bool IsVarArg, MachineFunction &MF, SmallVectorImpl< CCValAssign > &Locs, LLVMContext &Context, bool NegativeOffsets=false)
bool isAllocated(MCRegister Reg) const
isAllocated - Return true if the specified register (or an alias) is allocated.
void AnalyzeFormalArguments(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)
AnalyzeFormalArguments - Analyze an array of argument values, incorporating info about the formals in...
void addLoc(const CCValAssign &V)
void clearByValRegsInfo()
CCValAssign - Represent assignment of one arg/retval to a location.
Register getLocReg() const
bool isPendingLoc() const
LocInfo getLocInfo() const
static CCValAssign getMem(unsigned ValNo, MVT ValVT, int64_t Offset, MVT LocVT, LocInfo HTP, bool IsCustom=false)
int64_t getLocMemOffset() const
This is an important class for using LLVM in a threaded context.
MCRegAliasIterator enumerates all registers aliasing Reg.
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
Wrapper class representing physical registers. Should be passed by value.
bool isVector() const
Return true if this is a vector value type.
bool isInteger() const
Return true if this is an integer or a vector integer type.
void ensureMaxAlignment(Align Alignment)
Make sure the function is at least Align bytes aligned.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Register addLiveIn(MCRegister PReg, const TargetRegisterClass *RC)
addLiveIn - Add the specified physical register as a live-in value and create a corresponding virtual...
Wrapper class representing virtual and physical registers.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
virtual const TargetRegisterClass * getRegClassFor(MVT VT, bool isDivergent=false) const
Return the register class that should be used for the specified value type.
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
virtual void HandleByVal(CCState *, unsigned &, Align) const
Target-specific cleanup for formal ByVal parameters.
bool regsOverlap(Register RegA, Register RegB) const
Returns true if the two registers are equal or alias each other.
virtual const TargetLowering * getTargetLowering() const
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ X86_VectorCall
MSVC calling convention that passes vectors and vector aggregates in SSE registers.
@ C
The default llvm calling convention, compatible with C.
@ X86_FastCall
'fast' analog of X86_StdCall.
This is an optimization pass for GlobalISel generic memory operations.
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
constexpr T MinAlign(U A, V B)
A and B are either alignments or offsets.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
bool CCAssignFn(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
CCAssignFn - This function assigns a location for Val, updating State to reflect the change.
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
This struct is a compact representation of a valid (non-zero power of two) alignment.
Describes a register that needs to be forwarded from the prologue to a musttail call.
unsigned getByValSize() const
Align getNonZeroByValAlign() const
A utility class that uses RAII to save and restore the value of a variable.