LLVM 20.0.0git |
#include "ARMBaseInstrInfo.h"#include "MCTargetDesc/ARMAddressingModes.h"#include "MCTargetDesc/ARMBaseInfo.h"#include "MCTargetDesc/ARMMCTargetDesc.h"#include "TargetInfo/ARMTargetInfo.h"#include "Utils/ARMBaseInfo.h"#include "llvm/MC/MCContext.h"#include "llvm/MC/MCDecoderOps.h"#include "llvm/MC/MCDisassembler/MCDisassembler.h"#include "llvm/MC/MCInst.h"#include "llvm/MC/MCInstrDesc.h"#include "llvm/MC/MCInstrInfo.h"#include "llvm/MC/MCSubtargetInfo.h"#include "llvm/MC/TargetRegistry.h"#include "llvm/Support/Compiler.h"#include "llvm/Support/ErrorHandling.h"#include "llvm/Support/MathExtras.h"#include "llvm/Support/raw_ostream.h"#include "llvm/TargetParser/SubtargetFeature.h"#include <algorithm>#include <cassert>#include <cstdint>#include <vector>#include "ARMGenDisassemblerTables.inc"Go to the source code of this file.
Macros | |
| #define | DEBUG_TYPE "arm-disassembler" |
Typedefs | |
| using | DecodeStatus =MCDisassembler::DecodeStatus |
| typedefDecodeStatus | OperandDecoder(MCInst &Inst,unsigned Val,uint64_t Address,constMCDisassembler *Decoder) |
Variables | |
| staticconstuint16_t | GPRDecoderTable [] |
| staticconstuint16_t | CLRMGPRDecoderTable [] |
| staticconstuint16_t | GPRPairDecoderTable [] |
| staticconstuint16_t | SPRDecoderTable [] |
| staticconstuint16_t | DPRDecoderTable [] |
| staticconstuint16_t | QPRDecoderTable [] |
| staticconstuint16_t | DPairDecoderTable [] |
| staticconstuint16_t | DPairSpacedDecoderTable [] |
| staticconstuint16_t | QQPRDecoderTable [] |
| staticconstuint16_t | QQQQPRDecoderTable [] |
| #define DEBUG_TYPE "arm-disassembler" |
Definition at line35 of fileARMDisassembler.cpp.
Definition at line37 of fileARMDisassembler.cpp.
| typedefDecodeStatus OperandDecoder(MCInst &Inst,unsigned Val,uint64_t Address,constMCDisassembler *Decoder) |
Definition at line686 of fileARMDisassembler.cpp.
| static |
Definition at line716 of fileARMDisassembler.cpp.
ReferencesCond,llvm::MCDisassembler::Fail,Insn,MI, andllvm::MCDisassembler::SoftFail.
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Definition at line709 of fileARMDisassembler.cpp.
Referenced byLLVMInitializeARMDisassembler().
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Definition at line2049 of fileARMDisassembler.cpp.
Referencesllvm::ARM_AM::add,llvm::MCInst::addOperand(),Address,llvm::ARM_AM::asr,Check,llvm::MCOperand::createImm(),llvm::MCOperand::createReg(),DecodeGPRnopcRegisterClass(),DecodeGPRRegisterClass(),DecodePredicateOperand(),llvm::MCDisassembler::Fail,llvm::ARM_AM::getAM2Opc(),llvm::MCInst::getOpcode(),llvm::ARMII::IndexModePost,llvm::ARMII::IndexModePre,Insn,llvm::ARM_AM::lsl,llvm::ARM_AM::lsr,P,pred,llvm::ARM_AM::ror,llvm::ARM_AM::rrx,llvm::MCDisassembler::SoftFail,llvm::ARM_AM::sub, andllvm::MCDisassembler::Success.
| static |
Definition at line2211 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createImm(),llvm::MCOperand::createReg(),DecodeGPRRegisterClass(),DecodePredicateOperand(),llvm::MCDisassembler::Fail,llvm::MCInst::getOpcode(),llvm::ARMII::IndexModePost,llvm::ARMII::IndexModePre,Insn,P,pred,llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
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| static |
| static |
Definition at line2948 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createImm(),DecodeGPRRegisterClass(),llvm::MCDisassembler::Fail, andllvm::MCDisassembler::Success.
Referenced byDecodeVLDInstruction(), andDecodeVSTInstruction().
| static |
Definition at line2885 of fileARMDisassembler.cpp.
ReferencesAddress, andDecodeGPRRegisterClass().
Referenced byDecodeLDR().
| static |
Definition at line2822 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createImm(),DecodeGPRRegisterClass(),llvm::MCDisassembler::Fail,llvm::MCDisassembler::Success, andtryAddingPcLoadReferenceComment().
Referenced byDecodeLDRPreImm(), andDecodeSTRPreImm().
| static |
Definition at line2714 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createImm(),DecodeGPRnopcRegisterClass(),DecodePredicateOperand(),llvm::MCDisassembler::Fail,llvm::MCInst::getOpcode(),Insn,pred,llvm::MCDisassembler::Success, andtryAddingSymbolicOperand().
| static |
Definition at line5083 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(),llvm::MCDisassembler::Fail, andllvm::MCDisassembler::Success.
| static |
Definition at line6313 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,llvm::MCOperand::createImm(),llvm::MCOperand::getImm(),llvm::MCInst::getOperand(),llvm::MCDisassembler::Success, andtryAddingSymbolicOperand().
| static |
Definition at line6294 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,llvm::MCOperand::createImm(),llvm::MCDisassembler::Fail,isNeg(),isSigned(),llvm::MCDisassembler::Success, andtryAddingSymbolicOperand().
| static |
Definition at line1841 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Check,llvm::MCOperand::createImm(),llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
| static |
Definition at line2918 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createImm(),DecodePredicateOperand(),llvm::MCDisassembler::Fail,llvm::MCInst::getOpcode(),Insn,pred,llvm::MCInst::setOpcode(),llvm::MCDisassembler::Success, andtryAddingSymbolicOperand().
| static |
Definition at line1657 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createReg(), andllvm::MCDisassembler::Success.
Referenced byDecodeT2AddSubSPImm().
| static |
Definition at line1308 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),CLRMGPRDecoderTable,llvm::MCOperand::createReg(),llvm::MCDisassembler::Fail, andllvm::MCDisassembler::Success.
Referenced byDecodeRegListOperand().
| static |
Definition at line1869 of fileARMDisassembler.cpp.
Referencesllvm::ARM_AM::add,llvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createImm(),DecodeGPRRegisterClass(),DecodePredicateOperand(),llvm::MCDisassembler::Fail,llvm::ARM_AM::getAM5Opc(),llvm::MCInst::getOpcode(),Insn,pred,llvm::ARM_AM::sub, andllvm::MCDisassembler::Success.
| static |
Definition at line4821 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(),llvm::MCDisassembler::Fail,llvm::isValidCoprocessorNumber(), andllvm::MCDisassembler::Success.
| static |
Definition at line2573 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(),llvm::MCDisassembler::Fail,Insn,mode,llvm::MCInst::setOpcode(),llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
Referenced byDecodeQADDInstruction(),DecodeSMLAInstruction(), andDecodeSwap().
| static |
Definition at line5099 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeGPRPairRegisterClass(),DecodeGPRRegisterClass(),DecodePredicateOperand(),llvm::MCDisassembler::Fail,Insn,pred,llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
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Definition at line1604 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createReg(),DPairDecoderTable,llvm::MCDisassembler::Fail, andllvm::MCDisassembler::Success.
Referenced byDecodeTBLInstruction(),DecodeVLD1DupInstruction(),DecodeVLD2DupInstruction(),DecodeVLDInstruction(), andDecodeVSTInstruction().
| static |
Definition at line1627 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createReg(),DPairSpacedDecoderTable,llvm::MCDisassembler::Fail, andllvm::MCDisassembler::Success.
Referenced byDecodeVLD2DupInstruction(),DecodeVLDInstruction(), andDecodeVSTInstruction().
| static |
Definition at line1552 of fileARMDisassembler.cpp.
ReferencesAddress,DecodeDPRRegisterClass(), andllvm::MCDisassembler::Fail.
| static |
Definition at line1568 of fileARMDisassembler.cpp.
ReferencesAddress,DecodeDPRRegisterClass(), andllvm::MCDisassembler::Fail.
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Definition at line1541 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createReg(),DPRDecoderTable,llvm::MCDisassembler::Fail,PermitsD32(), andllvm::MCDisassembler::Success.
Referenced byDecodeDPR_8RegisterClass(),DecodeDPR_VFP2RegisterClass(),DecodeDPRRegListOperand(),DecodeNEONComplexLane64Instruction(),DecodeTBLInstruction(),DecodeVCVTD(),DecodeVLD1DupInstruction(),DecodeVLD1LN(),DecodeVLD2DupInstruction(),DecodeVLD2LN(),DecodeVLD3DupInstruction(),DecodeVLD3LN(),DecodeVLD4DupInstruction(),DecodeVLD4LN(),DecodeVLDInstruction(),DecodeVMOVModImmInstruction(),DecodeVSCCLRM(),DecodeVSHLMaxInstruction(),DecodeVST1LN(),DecodeVST2LN(),DecodeVST3LN(),DecodeVST4LN(), andDecodeVSTInstruction().
| static |
Definition at line1814 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeDPRRegisterClass(),llvm::MCDisassembler::Fail,PermitsD32(),llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
Referenced byDecodeVSCCLRM().
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Definition at line6242 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,llvm::ARMCC::AL,Check,llvm::MCOperand::createImm(),llvm::MCOperand::createReg(),DecodeGPRnopcRegisterClass(),DecodeGPRRegisterClass(),DecodePredicateOperand(),llvm::MCDisassembler::Fail,llvm::MCInst::getOpcode(),pred,llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
| static |
Definition at line1322 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeGPRRegisterClass(),llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
Referenced byDecodeAddrMode2IdxInstruction(),DecodeArmMOVTWInstruction(),DecodeDoubleRegStore(),DecodeForVMRSandVMSR(),DecodeLDR(),DecodeMveAddrModeRQ(),DecodePostIdxReg(),DecodeQADDInstruction(),DecoderForMRRC2AndMCRR2(),DecodeSMLAInstruction(),DecodeSORegRegOperand(),DecodeSwap(),DecodeT2AddrModeImm0_1020s4(),DecodeT2AddrModeImm7(),DecodeT2AddrModeImm7s4(), andDecodeVSTRVLDR_SYSREG().
| static |
Definition at line1335 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeGPRRegisterClass(),llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
| static |
Definition at line1423 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createReg(),llvm::MCDisassembler::Fail,GPRPairDecoderTable,llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
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Definition at line1404 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createReg(),llvm::MCDisassembler::Fail,GPRPairDecoderTable,llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
Referenced byDecodeDoubleRegLoad(), andDecodeDoubleRegStore().
| static |
Definition at line1297 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createReg(),llvm::MCDisassembler::Fail,GPRDecoderTable, andllvm::MCDisassembler::Success.
Referenced byDecodeAddrMode2IdxInstruction(),DecodeAddrMode3Instruction(),DecodeAddrMode5FP16Operand(),DecodeAddrMode5Operand(),DecodeAddrMode6Operand(),DecodeAddrMode7Operand(),DecodeAddrModeImm12Operand(),DecodeCopMemInstruction(),DecodeDoubleRegLoad(),DecodeDoubleRegStore(),DecodeForVMRSandVMSR(),DecodeGPRnopcRegisterClass(),DecodeGPRnospRegisterClass(),DecodeGPRwithAPSRRegisterClass(),DecodeGPRwithZRRegisterClass(),DecodeLazyLoadStoreMul(),DecodeLDRPreImm(),DecodeLDRPreReg(),DecodeMemMultipleWritebackInstruction(),DecodeMVEVMOVDRegtoQ(),DecodeMVEVMOVQtoDReg(),DecodeRegListOperand(),DecodeRFEInstruction(),DecoderGPRRegisterClass(),DecodeSORegMemOperand(),DecodeSTRPreImm(),DecodeSTRPreReg(),DecodeT2AddrModeImm12(),DecodeT2AddrModeImm8(),DecodeT2AddrModeImm8s4(),DecodeT2AddrModeSOReg(),DecodeT2LdStPre(),DecodeT2LoadImm12(),DecodeT2LoadImm8(),DecodeT2LoadLabel(),DecodeT2LoadShift(),DecodetGPRRegisterClass(),DecodeThumbAddSPReg(),DecodeThumbTableBranch(),DecodeTSTInstruction(),DecodeVLD1DupInstruction(),DecodeVLD1LN(),DecodeVLD2DupInstruction(),DecodeVLD2LN(),DecodeVLD3DupInstruction(),DecodeVLD3LN(),DecodeVLD4DupInstruction(),DecodeVLD4LN(),DecodeVLDInstruction(),DecodeVMOVRRS(),DecodeVMOVSRR(),DecodeVST1LN(),DecodeVST2LN(),DecodeVST3LN(),DecodeVST4LN(), andDecodeVSTInstruction().
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Definition at line1436 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createReg(),llvm::MCDisassembler::Fail,GPRDecoderTable, andllvm::MCDisassembler::Success.
Referenced byDecodeT2AddSubSPImm().
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Definition at line6432 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createReg(),GPRDecoderTable,llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
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Definition at line1349 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createReg(),DecodeGPRRegisterClass(), andllvm::MCDisassembler::Success.
| static |
Definition at line1382 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeGPRwithZRRegisterClass(),llvm::MCDisassembler::Fail, andllvm::MCDisassembler::Success.
| static |
Definition at line1364 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createReg(),DecodeGPRRegisterClass(),llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
Referenced byDecodeGPRwithZRnospRegisterClass(), andDecodeMVEVCMP().
| static |
Definition at line2550 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createImm(),DecodePredicateOperand(),llvm::MCDisassembler::Fail,llvm::MCSubtargetInfo::getFeatureBits(),llvm::MCDisassembler::getSubtargetInfo(),Insn,pred,llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
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Definition at line1515 of fileARMDisassembler.cpp.
ReferencesAddress, andDecodeSPRRegisterClass().
| static |
Definition at line4972 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(),llvm::MCDisassembler::Fail, andllvm::MCDisassembler::Success.
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Definition at line5853 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(),llvm::MCDisassembler::Fail,Insn,pred,llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
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Definition at line5147 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeAddrModeImm12Operand(),DecodeGPRRegisterClass(),DecodePredicateOperand(),llvm::MCDisassembler::Fail,Insn,pred,llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
| static |
Definition at line5173 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeGPRRegisterClass(),DecodePredicateOperand(),DecodeSORegMemOperand(),llvm::MCDisassembler::Fail,Insn,pred,llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
| static |
Definition at line6334 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createReg(),DecoderGPRRegisterClass(),llvm::MCDisassembler::Fail,llvm::MCInst::getOpcode(),Insn,llvm::MCInst::setOpcode(),llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
| static |
Definition at line6396 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(), andllvm::MCDisassembler::Success.
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Definition at line4962 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(),llvm::MCDisassembler::Fail, andllvm::MCDisassembler::Success.
Referenced byDecodeThumb2BCCInstruction().
| static |
Definition at line2458 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createImm(),DecodeGPRRegisterClass(),DecodePredicateOperand(),DecodeRegListOperand(),DecodeRFEInstruction(),llvm::MCDisassembler::Fail,llvm::MCInst::getOpcode(),Insn,pred,llvm::MCInst::setOpcode(), andllvm::MCDisassembler::Success.
| static |
Definition at line6486 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createReg(),llvm::MCDisassembler::Fail,QPRDecoderTable, andllvm::MCDisassembler::Success.
Referenced byDecodeMVE_MEM_3_pre(),DecodeMVE_MEM_pre(),DecodeMveAddrModeQ(),DecodeMveAddrModeRQ(),DecodeMVEModImmInstruction(),DecodeMVEVADCInstruction(),DecodeMVEVCMP(),DecodeMVEVCVTt1fp(),DecodeMVEVMOVDRegtoQ(), andDecodeMVEVMOVQtoDReg().
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Definition at line6502 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createReg(),llvm::MCDisassembler::Fail,QQPRDecoderTable, andllvm::MCDisassembler::Success.
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Definition at line6518 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createReg(),llvm::MCDisassembler::Fail,QQQQPRDecoderTable, andllvm::MCDisassembler::Success.
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Definition at line4982 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(),llvm::MCDisassembler::Fail,llvm::MCInst::getOpcode(),llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
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Definition at line6766 of fileARMDisassembler.cpp.
ReferencesAddress,DecodeMVE_MEM_pre(), andDecodetGPRRegisterClass().
| static |
Definition at line6776 of fileARMDisassembler.cpp.
ReferencesAddress,DecodeMVE_MEM_pre(), andDecoderGPRRegisterClass().
| static |
Definition at line6786 of fileARMDisassembler.cpp.
ReferencesAddress,DecodeMQPRRegisterClass(), andDecodeMVE_MEM_pre().
| inlinestatic |
Definition at line6746 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeMQPRRegisterClass(),llvm::MCDisassembler::Fail, andllvm::MCDisassembler::Success.
Referenced byDecodeMVE_MEM_1_pre(),DecodeMVE_MEM_2_pre(), andDecodeMVE_MEM_3_pre().
| static |
Definition at line4773 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createImm(),DecodeMQPRRegisterClass(),llvm::MCDisassembler::Fail,Insn, andllvm::MCDisassembler::Success.
| static |
Definition at line4757 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeGPRnopcRegisterClass(),DecodeMQPRRegisterClass(),llvm::MCDisassembler::Fail,Insn, andllvm::MCDisassembler::Success.
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| static |
Definition at line6870 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createImm(),DecoderGPRRegisterClass(),DecodetGPREvenRegisterClass(),DecodetGPROddRegisterClass(),llvm::MCDisassembler::Fail,llvm::MCInst::getOpcode(),Insn,llvm_unreachable,llvm::MCInst::setOpcode(),llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
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Definition at line6810 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(), andllvm::MCDisassembler::Success.
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Definition at line6970 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createImm(),llvm::MCOperand::createReg(),DecodeGPRwithZRRegisterClass(),DecodeMQPRRegisterClass(),llvm::MCDisassembler::Fail,Insn,llvm::ARMVCC::None, andllvm::MCDisassembler::Success.
| static |
Definition at line7007 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createReg(),DecoderGPRRegisterClass(),llvm::MCDisassembler::Fail,Insn, andllvm::MCDisassembler::Success.
| static |
Definition at line6949 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeMQPRRegisterClass(),DecodeVCVTImmOperand(),llvm::MCDisassembler::Fail,Insn, andllvm::MCDisassembler::Success.
| static |
Definition at line6843 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeGPRRegisterClass(),DecodeMQPRRegisterClass(),llvm::MCDisassembler::Fail,Insn, andllvm::MCDisassembler::Success.
| static |
Definition at line6819 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeGPRRegisterClass(),DecodeMQPRRegisterClass(),llvm::MCDisassembler::Fail,Insn, andllvm::MCDisassembler::Success.
| static |
Definition at line7017 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createReg(), andllvm::MCDisassembler::Success.
| static |
Definition at line6137 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createImm(),DecodeDPRRegisterClass(),DecodeQPRRegisterClass(),llvm::MCDisassembler::Fail,Insn, andllvm::MCDisassembler::Success.
| static |
Definition at line4743 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createImm(),DecodeGPRnopcRegisterClass(),llvm::MCDisassembler::Fail,Insn, andllvm::MCDisassembler::Success.
Referenced byDecodeLDR().
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Definition at line6796 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(),llvm::MCDisassembler::Fail, andllvm::MCDisassembler::Success.
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Definition at line1637 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::ARMCC::AL,Check,llvm::MCOperand::createImm(),llvm::MCOperand::createReg(),llvm::MCDisassembler::Fail,llvm::MCInstrInfo::get(),llvm::MCInst::getOpcode(),llvm::MCInstrDesc::isPredicable(),llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
Referenced byDecodeAddrMode2IdxInstruction(),DecodeAddrMode3Instruction(),DecodeArmMOVTWInstruction(),DecodeBranchImmInstruction(),DecodeCopMemInstruction(),DecodeDoubleRegLoad(),DecodeDoubleRegStore(),DecodeForVMRSandVMSR(),DecodeHINTInstruction(),DecodeLazyLoadStoreMul(),DecodeLDR(),DecodeLDRPreImm(),DecodeLDRPreReg(),DecodeMemMultipleWritebackInstruction(),DecodeQADDInstruction(),DecodeSMLAInstruction(),DecodeSTRPreImm(),DecodeSTRPreReg(),DecodeSwap(),DecodeThumb2BCCInstruction(),DecodeTSTInstruction(),DecodeVMOVRRS(), andDecodeVMOVSRR().
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Definition at line6325 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::ARMCC::AL,llvm::MCOperand::createImm(),llvm::MCDisassembler::Fail, andllvm::MCDisassembler::Success.
| static |
Definition at line2433 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeCPSInstruction(),DecodeGPRnopcRegisterClass(),DecodePredicateOperand(),llvm::MCDisassembler::Fail,Insn,pred, andllvm::MCDisassembler::Success.
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Definition at line1583 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createReg(),llvm::MCDisassembler::Fail,QPRDecoderTable, andllvm::MCDisassembler::Success.
Referenced byDecodeNEONComplexLane64Instruction(),DecodeVCVTQ(),DecodeVMOVModImmInstruction(), andDecodeVSHLMaxInstruction().
| static |
Definition at line1741 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeCLRMGPRRegisterClass(),DecodeGPRRegisterClass(),llvm::MCInst::end(),llvm::MCDisassembler::Fail,llvm::MCInst::getOpcode(),llvm::MCInst::getOperand(),llvm::MCOperand::getReg(),llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
Referenced byDecodeMemMultipleWritebackInstruction().
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| static |
Definition at line6585 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(),llvm::ARMCC::EQ,llvm::ARMCC::NE, andllvm::MCDisassembler::Success.
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Definition at line6592 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(),llvm::ARMCC::GE,llvm::ARMCC::GT,llvm::ARMCC::LE,llvm::ARMCC::LT, andllvm::MCDisassembler::Success.
| static |
Definition at line6614 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(),llvm::ARMCC::HI,llvm::ARMCC::HS, andllvm::MCDisassembler::Success.
| static |
Definition at line2403 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createImm(),llvm::ARM_AM::da,llvm::ARM_AM::db,DecodeGPRRegisterClass(),llvm::MCDisassembler::Fail,llvm::ARM_AM::ia,llvm::ARM_AM::ib,Insn,mode, andllvm::MCDisassembler::Success.
Referenced byDecodeMemMultipleWritebackInstruction().
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Definition at line1478 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeGPRRegisterClass(),llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
Referenced byDecodeLOLoop(),DecodeMVE_MEM_2_pre(),DecodeMVEOverlappingLongShift(),DecodeMveVCTP(),DecodeSORegImmOperand(),DecodeT2AddrModeImm7(),DecodeT2AddrModeSOReg(),DecodeT2Adr(),DecodeT2LDRDPreInstruction(),DecodeT2LoadT(),DecodeT2MOVTWInstruction(),DecodeT2STRDPreInstruction(), andDecodeThumbTableBranch().
| static |
Definition at line2793 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(),llvm::MCDisassembler::Fail,llvm::MCSubtargetInfo::getFeatureBits(),llvm::MCDisassembler::getSubtargetInfo(),Insn,llvm::MCInst::setOpcode(),llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
Referenced byDecodeTSTInstruction().
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Definition at line3883 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(), andllvm::MCDisassembler::Success.
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Definition at line3890 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(), andllvm::MCDisassembler::Success.
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Definition at line3897 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(), andllvm::MCDisassembler::Success.
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Definition at line3876 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(), andllvm::MCDisassembler::Success.
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Definition at line2742 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeCPSInstruction(),DecodeGPRnopcRegisterClass(),DecodePredicateOperand(),llvm::MCDisassembler::Fail,Insn,pred, andllvm::MCDisassembler::Success.
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Definition at line1667 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,llvm::ARM_AM::asr,Check,llvm::MCOperand::createImm(),DecoderGPRRegisterClass(),llvm::MCDisassembler::Fail,llvm::ARM_AM::lsl,llvm::ARM_AM::lsr,llvm::ARM_AM::ror,llvm::ARM_AM::rrx, andllvm::MCDisassembler::Success.
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Definition at line2154 of fileARMDisassembler.cpp.
Referencesllvm::ARM_AM::add,llvm::MCInst::addOperand(),Address,llvm::ARM_AM::asr,Check,llvm::MCOperand::createImm(),DecodeGPRRegisterClass(),llvm::MCDisassembler::Fail,llvm::ARM_AM::getAM2Opc(),llvm::ARM_AM::lsl,llvm::ARM_AM::lsr,llvm::ARM_AM::ror,llvm::ARM_AM::rrx,llvm::ARM_AM::sub, andllvm::MCDisassembler::Success.
Referenced byDecodeLDRPreReg(), andDecodeSTRPreReg().
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Definition at line1560 of fileARMDisassembler.cpp.
ReferencesAddress,DecodeSPRRegisterClass(), andllvm::MCDisassembler::Fail.
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Definition at line1504 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createReg(),llvm::MCDisassembler::Fail,SPRDecoderTable, andllvm::MCDisassembler::Success.
Referenced byDecodeHPRRegisterClass(),DecodeSPR_8RegisterClass(),DecodeSPRRegListOperand(),DecodeVMOVRRS(),DecodeVMOVSRR(), andDecodeVSCCLRM().
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Definition at line1789 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeSPRRegisterClass(),llvm::MCDisassembler::Fail,llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
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Definition at line5201 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeAddrModeImm12Operand(),DecodeGPRRegisterClass(),DecodePredicateOperand(),llvm::MCDisassembler::Fail,Insn,pred,llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
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Definition at line5227 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeGPRRegisterClass(),DecodePredicateOperand(),DecodeSORegMemOperand(),llvm::MCDisassembler::Fail,Insn,pred,llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
| static |
Definition at line5991 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeCPSInstruction(),DecodeGPRnopcRegisterClass(),DecodePredicateOperand(),llvm::MCDisassembler::Fail,Insn,pred,llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
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Definition at line4478 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createImm(),DecodeGPRnopcRegisterClass(),llvm::MCDisassembler::Fail, andllvm::MCDisassembler::Success.
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Definition at line4666 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createImm(),DecodeGPRRegisterClass(),llvm::MCDisassembler::Fail,llvm::MCInst::getOpcode(), andllvm::MCDisassembler::Success.
Referenced byDecodeT2LoadImm12().
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Definition at line4586 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeGPRnopcRegisterClass(),DecoderGPRRegisterClass(),llvm::MCDisassembler::Fail, andllvm::MCDisassembler::Success.
| static |
Definition at line4462 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeGPRnopcRegisterClass(),DecodeT2Imm7S4(),llvm::MCDisassembler::Fail, andllvm::MCDisassembler::Success.
Referenced byDecodeVSTRVLDR_SYSREG().
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Definition at line4521 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeGPRRegisterClass(),DecodeT2Imm8(),llvm::MCDisassembler::Fail,llvm::MCInst::getOpcode(), andllvm::MCDisassembler::Success.
Referenced byDecodeT2LdStPre(),DecodeT2LoadImm8(), andDecodeT2LoadT().
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Definition at line4446 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeGPRRegisterClass(),DecodeT2Imm8S4(),llvm::MCDisassembler::Fail, andllvm::MCDisassembler::Success.
Referenced byDecodeT2LDRDPreInstruction(), andDecodeT2STRDPreInstruction().
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Definition at line4044 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createImm(),DecodeGPRRegisterClass(),DecoderGPRRegisterClass(),llvm::MCDisassembler::Fail,llvm::MCInst::getOpcode(), andllvm::MCDisassembler::Success.
Referenced byDecodeT2LoadShift().
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Definition at line2891 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,llvm::MCOperand::createImm(),Insn,llvm::MCDisassembler::Success, andtryAddingSymbolicOperand().
| static |
Definition at line3975 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,llvm::MCOperand::createImm(),llvm::MCDisassembler::Success, andtryAddingSymbolicOperand().
Referenced byDecodeThumb2BCCInstruction().
| static |
Definition at line2621 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(),llvm::MCDisassembler::Fail,Insn,mode,llvm::MCInst::setOpcode(),llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
| static |
Definition at line2665 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(),Insn,llvm::MCInst::setOpcode(), andllvm::MCDisassembler::Success.
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Definition at line4507 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(), andllvm::MCDisassembler::Success.
| static |
Definition at line4431 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(), andllvm::MCDisassembler::Success.
Referenced byDecodeT2AddrModeImm7s4().
| static |
Definition at line4494 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(), andllvm::MCDisassembler::Success.
Referenced byDecodeT2AddrModeImm8().
| static |
Definition at line4417 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(), andllvm::MCDisassembler::Success.
Referenced byDecodeT2AddrModeImm8s4().
| static |
Definition at line5882 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecoderGPRRegisterClass(),DecodeT2AddrModeImm8s4(),llvm::MCDisassembler::Fail,Insn,P,llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
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Definition at line4363 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createImm(),DecodeGPRRegisterClass(),llvm::MCDisassembler::Fail,llvm::MCInst::getOpcode(),Insn,llvm::MCInst::setOpcode(), andllvm::MCDisassembler::Success.
Referenced byDecodeT2LdStPre(),DecodeT2LoadImm12(),DecodeT2LoadImm8(),DecodeT2LoadShift(), andDecodeT2LoadT().
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Definition at line5980 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(),llvm::MCDisassembler::Fail, andllvm::MCDisassembler::Success.
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Definition at line4898 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(), andllvm::MCDisassembler::Success.
Referenced byDecodeT2AddSubSPImm().
| static |
Definition at line5919 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecoderGPRRegisterClass(),DecodeT2AddrModeImm8s4(),llvm::MCDisassembler::Fail,Insn,P,llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
| static |
Definition at line4569 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodetGPRRegisterClass(),llvm::MCDisassembler::Fail, andllvm::MCDisassembler::Success.
| static |
Definition at line3904 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeDPairRegisterClass(),DecodeDPRRegisterClass(),llvm::MCDisassembler::Fail,llvm::MCInst::getOpcode(),Insn,op, andllvm::MCDisassembler::Success.
| static |
Definition at line1447 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createReg(),llvm::MCDisassembler::Fail, andllvm::MCDisassembler::Success.
| static |
Definition at line6420 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createReg(),llvm::MCDisassembler::Fail,GPRDecoderTable, andllvm::MCDisassembler::Success.
Referenced byDecodeMVEOverlappingLongShift().
| static |
Definition at line6409 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createReg(),llvm::MCDisassembler::Fail,GPRDecoderTable, andllvm::MCDisassembler::Success.
Referenced byDecodeMVEOverlappingLongShift().
| static |
Definition at line1391 of fileARMDisassembler.cpp.
ReferencesAddress,DecodeGPRRegisterClass(), andllvm::MCDisassembler::Fail.
Referenced byDecodeMVE_MEM_1_pre(),DecodeTAddrModeImm7(),DecodeThumbAddrModeIS(),DecodeThumbAddrModeRR(), andDecodeThumbAddSpecialReg().
| static |
Definition at line4855 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeMemBarrierOption(),DecodePredicateOperand(),DecodeT2BROperand(),llvm::MCDisassembler::Fail,Insn,pred,llvm::MCInst::setOpcode(), andllvm::MCDisassembler::Success.
| static |
Definition at line4009 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createImm(),DecodetGPRRegisterClass(),llvm::MCDisassembler::Fail, andllvm::MCDisassembler::Success.
| static |
Definition at line4024 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,llvm::MCOperand::createImm(),llvm::MCDisassembler::Success, andtryAddingPcLoadReferenceComment().
| static |
Definition at line3993 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodetGPRRegisterClass(),llvm::MCDisassembler::Fail, andllvm::MCDisassembler::Success.
| static |
Definition at line4035 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(),llvm::MCOperand::createReg(), andllvm::MCDisassembler::Success.
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Definition at line4693 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(),llvm::MCOperand::createReg(),Insn, andllvm::MCDisassembler::Success.
| static |
Definition at line4705 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createReg(),DecodeGPRRegisterClass(),llvm::MCDisassembler::Fail,llvm::MCInst::getOpcode(),Insn, andllvm::MCDisassembler::Success.
| static |
Definition at line4929 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,llvm::MCOperand::createImm(),llvm::MCDisassembler::Success, andtryAddingSymbolicOperand().
| static |
Definition at line4938 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,llvm::MCOperand::createImm(),llvm::MCDisassembler::Success, andtryAddingSymbolicOperand().
| static |
Definition at line4796 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,llvm::MCOperand::createImm(),llvm::MCDisassembler::Success, andtryAddingSymbolicOperand().
| static |
Definition at line3966 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,llvm::MCOperand::createImm(),llvm::MCDisassembler::Success, andtryAddingSymbolicOperand().
| static |
Definition at line3984 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,llvm::MCOperand::createImm(),llvm::MCDisassembler::Success, andtryAddingSymbolicOperand().
| static |
Definition at line4731 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(),Insn, andllvm::MCDisassembler::Success.
| static |
Definition at line4837 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeGPRRegisterClass(),DecoderGPRRegisterClass(),llvm::MCDisassembler::Fail,Insn,llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
| static |
Definition at line2198 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(),llvm::ARM_TSB::CSYNC,llvm::MCDisassembler::Fail,llvm::MCInst::getOpcode(), andllvm::MCDisassembler::Success.
| static |
Definition at line2771 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeGPRRegisterClass(),DecodePredicateOperand(),DecodeSETPANInstruction(),llvm::MCDisassembler::Fail,Insn, andllvm::MCDisassembler::Success.
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Definition at line6651 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(),llvm::MCDisassembler::Fail,llvm::MCInst::getOpcode(), andllvm::MCDisassembler::Success.
Referenced byDecodeMVEVCVTt1fp().
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| static |
Definition at line3569 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createImm(),DecodeDPairRegisterClass(),DecodeDPRRegisterClass(),DecodeGPRRegisterClass(),llvm::MCDisassembler::Fail,llvm::MCInst::getOpcode(),Insn,llvm::size(), andllvm::MCDisassembler::Success.
| static |
| static |
Definition at line3617 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createImm(),DecodeDPairRegisterClass(),DecodeDPairSpacedRegisterClass(),DecodeDPRRegisterClass(),DecodeGPRRegisterClass(),llvm::MCDisassembler::Fail,llvm::MCInst::getOpcode(),Insn,llvm::size(), andllvm::MCDisassembler::Success.
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Definition at line2966 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createImm(),llvm::MCOperand::createReg(),DecodeAddrMode6Operand(),DecodeDPairRegisterClass(),DecodeDPairSpacedRegisterClass(),DecodeDPRRegisterClass(),DecodeGPRRegisterClass(),llvm::MCDisassembler::Fail,llvm::MCInst::getOpcode(),Insn, andllvm::MCDisassembler::Success.
Referenced byDecodeVLDST1Instruction(),DecodeVLDST2Instruction(),DecodeVLDST3Instruction(), andDecodeVLDST4Instruction().
| static |
Definition at line3243 of fileARMDisassembler.cpp.
ReferencesAddress,DecodeVLDInstruction(),DecodeVSTInstruction(),llvm::MCDisassembler::Fail,Insn, andload.
| static |
Definition at line3257 of fileARMDisassembler.cpp.
ReferencesAddress,DecodeVLDInstruction(),DecodeVSTInstruction(),llvm::MCDisassembler::Fail,Insn,load, andllvm::size().
| static |
Definition at line3273 of fileARMDisassembler.cpp.
ReferencesAddress,DecodeVLDInstruction(),DecodeVSTInstruction(),llvm::MCDisassembler::Fail,Insn,load, andllvm::size().
| static |
Definition at line3287 of fileARMDisassembler.cpp.
ReferencesAddress,DecodeVLDInstruction(),DecodeVSTInstruction(),llvm::MCDisassembler::Fail,Insn,load, andllvm::size().
| static |
Definition at line3755 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createImm(),DecodeDPRRegisterClass(),DecodeQPRRegisterClass(),llvm::MCDisassembler::Fail,llvm::MCInst::getOpcode(),Insn, andllvm::MCDisassembler::Success.
Referenced byDecodeVCVTD(), andDecodeVCVTQ().
| static |
Definition at line5827 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeGPRRegisterClass(),DecodePredicateOperand(),DecodeSPRRegisterClass(),llvm::MCDisassembler::Fail,Insn,pred,llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
| static |
Definition at line5801 of fileARMDisassembler.cpp.
ReferencesAddress,Check,DecodeGPRRegisterClass(),DecodePredicateOperand(),DecodeSPRRegisterClass(),llvm::MCDisassembler::Fail,Insn,pred,llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
| static |
Definition at line6574 of fileARMDisassembler.cpp.
Referencesllvm::MCDisassembler::Success.
| static |
Definition at line6560 of fileARMDisassembler.cpp.
Referencesllvm::MCDisassembler::Success.
| static |
Definition at line6529 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(), andllvm::MCDisassembler::Success.
| static |
Definition at line6449 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,llvm::ARMCC::AL,Check,llvm::MCOperand::createImm(),llvm::MCOperand::createReg(),DecodeDPRRegisterClass(),DecodeDPRRegListOperand(),DecodeSPRRegisterClass(),llvm::MCDisassembler::Fail,llvm::MCInst::getOpcode(),Insn,llvm::MCDisassembler::SoftFail, andllvm::MCDisassembler::Success.
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Definition at line3298 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,Check,llvm::MCOperand::createImm(),llvm::MCOperand::createReg(),DecodeAddrMode6Operand(),DecodeDPairRegisterClass(),DecodeDPairSpacedRegisterClass(),DecodeDPRRegisterClass(),DecodeGPRRegisterClass(),llvm::MCDisassembler::Fail,llvm::MCInst::getOpcode(),Insn, andllvm::MCDisassembler::Success.
Referenced byDecodeVLDST1Instruction(),DecodeVLDST2Instruction(),DecodeVLDST3Instruction(), andDecodeVLDST4Instruction().
| static |
Definition at line6702 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::addOperand(),Address,llvm::ARMCC::AL,Check,llvm::MCOperand::createImm(),llvm::MCOperand::createReg(),DecodeGPRnopcRegisterClass(),DecodeT2AddrModeImm7s4(),llvm::MCDisassembler::Fail,FixedRegForVSTRVLDR_SYSREG(),llvm::MCInst::getOpcode(), andllvm::MCDisassembler::Success.
Definition at line6680 of fileARMDisassembler.cpp.
Referenced byDecodeVSTRVLDR_SYSREG().
| LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARMDisassembler | ( | ) |
| static |
Definition at line1533 of fileARMDisassembler.cpp.
Referencesllvm::MCInst::getOpcode().
Referenced byDecodeDPRRegisterClass(), andDecodeDPRRegListOperand().
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tryAddingPcLoadReferenceComment - trys to add a comment as to what is being referenced by a load instruction with the base register that is the Pc.
These can often be values in a literal pool near the Address of the instruction. The Address of the instruction and its immediate Value are used as a possible literal pool entry. The SymbolLookUp call back will return the name of a symbol referenced by the literal pool's entry if the referenced address is that of a symbol. Or it will return a pointer to a literal 'C' string if the referenced address of the literal pool's entry is an address into a section with 'C' string literals.
Definition at line878 of fileARMDisassembler.cpp.
ReferencesAddress, andllvm::MCDisassembler::tryAddingPcLoadReferenceComment().
Referenced byDecodeAddrModeImm12Operand(), andDecodeThumbAddrModePC().
| static |
tryAddingSymbolicOperand - trys to add a symbolic operand in place of the immediate Value in the MCInst.
The immediate Value has had any PC adjustment made by the caller. If the instruction is a branch instruction then isBranch is true, else false. If the getOpInfo() function was set as part of the setupForSymbolicDisassembly() call then that function is called to get any symbolic information at the Address for this instruction. If that returns non-zero then the symbolic information it returns is used to create an MCExpr and that is added as an operand to the MCInst. If getOpInfo() returns zero and isBranch is true then a symbol look up for Value is done and if a symbol is found an MCExpr is created with that, else an MCExpr with Value is created. This function returns true if it adds an operand to the MCInst and false otherwise.
Definition at line859 of fileARMDisassembler.cpp.
ReferencesAddress,isBranch(),MI, andllvm::MCDisassembler::tryAddingSymbolicOperand().
Referenced byDecodeArmMOVTWInstruction(),DecodeBFAfterTargetOperand(),DecodeBFLabelOperand(),decodeBranch(),DecodeBranchImmInstruction(),DecodeT2BInstruction(),DecodeT2BROperand(),DecodeT2MOVTWInstruction(),DecodeThumbBCCTargetOperand(),DecodeThumbBLTargetOperand(),DecodeThumbBLXOffset(),DecodeThumbBROperand(), andDecodeThumbCmpBROperand().
Definition at line1290 of fileARMDisassembler.cpp.
Referenced byDecodeCLRMGPRRegisterClass().
Definition at line1595 of fileARMDisassembler.cpp.
Referenced byDecodeDPairRegisterClass().
Definition at line1615 of fileARMDisassembler.cpp.
Referenced byDecodeDPairSpacedRegisterClass().
Definition at line1521 of fileARMDisassembler.cpp.
Referenced byDecodeDPRRegisterClass().
Definition at line1283 of fileARMDisassembler.cpp.
Referenced byDecodeGPRRegisterClass(),DecodeGPRspRegisterClass(),DecodeGPRwithAPSR_NZCVnospRegisterClass(),decodeRiMemoryValue(),decodeRrMemoryValue(),decodeSplsValue(),DecodetGPREvenRegisterClass(), andDecodetGPROddRegisterClass().
Definition at line1399 of fileARMDisassembler.cpp.
Referenced byDecodeGPRPairnospRegisterClass(), andDecodeGPRPairRegisterClass().
Definition at line1576 of fileARMDisassembler.cpp.
Referenced byDecodeMQPRRegisterClass(), andDecodeQPRRegisterClass().
Definition at line6497 of fileARMDisassembler.cpp.
Referenced byDecodeMQQPRRegisterClass().
Definition at line6513 of fileARMDisassembler.cpp.
Referenced byDecodeMQQQQPRRegisterClass().
Definition at line1493 of fileARMDisassembler.cpp.
Referenced byDecodeSPRRegisterClass().
1.9.6