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1//===- AMDKernelCodeTUtils.cpp --------------------------------------------===//

2//

3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.

4// See https://llvm.org/LICENSE.txt for license information.

5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception

6//

7//===----------------------------------------------------------------------===//

8//

9/// \file - utility functions to parse/print AMDGPUMCKernelCodeT structure

10//

11//===----------------------------------------------------------------------===//

13#include "AMDKernelCodeTUtils.h"

14#include "AMDKernelCodeT.h"

15#include "SIDefines.h"

16#include "Utils/AMDGPUBaseInfo.h"

17#include "Utils/SIDefinesUtils.h"

18#include "llvm/ADT/StringRef.h"

19#include "llvm/MC/MCContext.h"

20#include "llvm/MC/MCExpr.h"

21#include "llvm/MC/MCParser/MCAsmLexer.h"

22#include "llvm/MC/MCParser/MCAsmParser.h"

23#include "llvm/MC/MCStreamer.h"

24#include "llvm/Support/MathExtras.h"

25#include "llvm/Support/raw_ostream.h"

27using namespacellvm;

28using namespacellvm::AMDGPU;

30// Generates the following for AMDGPUMCKernelCodeT struct members:

31// - HasMemberXXXXX class

32// A check to see if AMDGPUMCKernelCodeT has a specific member so it can

33// determine which of the original amd_kernel_code_t members are duplicated

34// (if the names don't match, the table driven strategy won't work).

35// - IsMCExprXXXXX class

36// Check whether a AMDGPUMCKernelcodeT struct member is MCExpr-ified or not.

37// - GetMemberXXXXX class

38// A retrieval helper for said member (of type const MCExpr *&). Will return

39// a `Phony` const MCExpr * initialized to nullptr to preserve reference

40// returns.

41#define GEN_HAS_MEMBER(member) \

42 class HasMember##member { \

43 private: \

44 struct KnownWithMember { \

45 int member; \

46 }; \

47 class AmbiguousDerived : public AMDGPUMCKernelCodeT, \

48 public KnownWithMember {}; \

49 template <typename U> \

50 static constexpr std::false_type Test(decltype(U::member) *); \

51 template <typename U> static constexpr std::true_type Test(...); \

52 \

53 public: \

54 static constexpr bool RESULT = \

55 std::is_same_v<decltype(Test<AmbiguousDerived>(nullptr)), \

56 std::true_type>; \

57 }; \

58 class IsMCExpr##member { \

59 template <typename U, \

60 typename std::enable_if_t< \

61 HasMember##member::RESULT && \

62 std::is_same_v<decltype(U::member), const MCExpr *>, \

63 U> * = nullptr> \

64 static constexpr std::true_type HasMCExprType(decltype(U::member) *); \

65 template <typename U> static constexpr std::false_type HasMCExprType(...); \

66 \

67 public: \

68 static constexpr bool RESULT = \

69 std::is_same_v<decltype(HasMCExprType<AMDGPUMCKernelCodeT>(nullptr)), \

70 std::true_type>; \

71 }; \

72 class GetMember##member { \

73 public: \

74 static const MCExpr *Phony; \

75 template <typename U, typename std::enable_if_t<IsMCExpr##member::RESULT, \

76 U> * = nullptr> \

77 static const MCExpr *&Get(U &C) { \

78 assert(IsMCExpr##member::RESULT && \

79 "Trying to retrieve member that does not exist."); \

80 return C.member; \

81 } \

82 template <typename U, typename std::enable_if_t<!IsMCExpr##member::RESULT, \

83 U> * = nullptr> \

84 static const MCExpr *&Get(U &C) { \

85 return Phony; \

86 } \

87 }; \

88 const MCExpr *GetMember##member::Phony = nullptr;

90// Cannot generate class declarations using the table driver approach (see table

91// in AMDKernelCodeTInfo.h). Luckily, if any are missing here or eventually

92// added to the table, an error should occur when trying to retrieve the table

93// in getMCExprIndexTable.

94GEN_HAS_MEMBER(amd_code_version_major)

95GEN_HAS_MEMBER(amd_code_version_minor)

96GEN_HAS_MEMBER(amd_machine_kind)

97GEN_HAS_MEMBER(amd_machine_version_major)

98GEN_HAS_MEMBER(amd_machine_version_minor)

99GEN_HAS_MEMBER(amd_machine_version_stepping)

100

101GEN_HAS_MEMBER(kernel_code_entry_byte_offset)

102GEN_HAS_MEMBER(kernel_code_prefetch_byte_size)

103

104GEN_HAS_MEMBER(granulated_workitem_vgpr_count)

105GEN_HAS_MEMBER(granulated_wavefront_sgpr_count)

106GEN_HAS_MEMBER(priority)

107GEN_HAS_MEMBER(float_mode)

108GEN_HAS_MEMBER(priv)

109GEN_HAS_MEMBER(enable_dx10_clamp)

110GEN_HAS_MEMBER(debug_mode)

111GEN_HAS_MEMBER(enable_ieee_mode)

112GEN_HAS_MEMBER(enable_wgp_mode)

113GEN_HAS_MEMBER(enable_mem_ordered)

114GEN_HAS_MEMBER(enable_fwd_progress)

115

116GEN_HAS_MEMBER(enable_sgpr_private_segment_wave_byte_offset)

117GEN_HAS_MEMBER(user_sgpr_count)

118GEN_HAS_MEMBER(enable_trap_handler)

119GEN_HAS_MEMBER(enable_sgpr_workgroup_id_x)

120GEN_HAS_MEMBER(enable_sgpr_workgroup_id_y)

121GEN_HAS_MEMBER(enable_sgpr_workgroup_id_z)

122GEN_HAS_MEMBER(enable_sgpr_workgroup_info)

123GEN_HAS_MEMBER(enable_vgpr_workitem_id)

124GEN_HAS_MEMBER(enable_exception_msb)

125GEN_HAS_MEMBER(granulated_lds_size)

126GEN_HAS_MEMBER(enable_exception)

127

128GEN_HAS_MEMBER(enable_sgpr_private_segment_buffer)

129GEN_HAS_MEMBER(enable_sgpr_dispatch_ptr)

130GEN_HAS_MEMBER(enable_sgpr_queue_ptr)

131GEN_HAS_MEMBER(enable_sgpr_kernarg_segment_ptr)

132GEN_HAS_MEMBER(enable_sgpr_dispatch_id)

133GEN_HAS_MEMBER(enable_sgpr_flat_scratch_init)

134GEN_HAS_MEMBER(enable_sgpr_private_segment_size)

135GEN_HAS_MEMBER(enable_sgpr_grid_workgroup_count_x)

136GEN_HAS_MEMBER(enable_sgpr_grid_workgroup_count_y)

137GEN_HAS_MEMBER(enable_sgpr_grid_workgroup_count_z)

138GEN_HAS_MEMBER(enable_wavefront_size32)

139GEN_HAS_MEMBER(enable_ordered_append_gds)

140GEN_HAS_MEMBER(private_element_size)

141GEN_HAS_MEMBER(is_ptr64)

142GEN_HAS_MEMBER(is_dynamic_callstack)

143GEN_HAS_MEMBER(is_debug_enabled)

144GEN_HAS_MEMBER(is_xnack_enabled)

145

146GEN_HAS_MEMBER(workitem_private_segment_byte_size)

147GEN_HAS_MEMBER(workgroup_group_segment_byte_size)

148GEN_HAS_MEMBER(gds_segment_byte_size)

149GEN_HAS_MEMBER(kernarg_segment_byte_size)

150GEN_HAS_MEMBER(workgroup_fbarrier_count)

151GEN_HAS_MEMBER(wavefront_sgpr_count)

152GEN_HAS_MEMBER(workitem_vgpr_count)

153GEN_HAS_MEMBER(reserved_vgpr_first)

154GEN_HAS_MEMBER(reserved_vgpr_count)

155GEN_HAS_MEMBER(reserved_sgpr_first)

156GEN_HAS_MEMBER(reserved_sgpr_count)

157GEN_HAS_MEMBER(debug_wavefront_private_segment_offset_sgpr)

158GEN_HAS_MEMBER(debug_private_segment_buffer_sgpr)

159GEN_HAS_MEMBER(kernarg_segment_alignment)

160GEN_HAS_MEMBER(group_segment_alignment)

161GEN_HAS_MEMBER(private_segment_alignment)

162GEN_HAS_MEMBER(wavefront_size)

163GEN_HAS_MEMBER(call_convention)

164GEN_HAS_MEMBER(runtime_loader_kernel_symbol)

165

166staticArrayRef<StringLiteral>get_amd_kernel_code_t_FldNames() {

167staticconstexprStringLiteralconst Table[] = {

168"",// not found placeholder

169#define RECORD(name, altName, print, parse) #name

170#include "Utils/AMDKernelCodeTInfo.h"

171#undef RECORD

172 };

173returnArrayRef(Table);

174}

175

176staticArrayRef<StringLiteral>get_amd_kernel_code_t_FldAltNames() {

177staticconstexprStringLiteralconst Table[] = {

178"",// not found placeholder

179#define RECORD(name, altName, print, parse) #altName

180#include "Utils/AMDKernelCodeTInfo.h"

181#undef RECORD

182 };

183returnArrayRef(Table);

184}

185

186staticArrayRef<bool>hasMCExprVersionTable() {

187staticboolconst Table[] = {

188#define RECORD(name, altName, print, parse) (IsMCExpr##name::RESULT)

189#include "Utils/AMDKernelCodeTInfo.h"

190#undef RECORD

191 };

192returnArrayRef(Table);

193}

194

195usingRetrieveFx =constMCExpr *&(*)(AMDGPUMCKernelCodeT &);

196

197staticArrayRef<RetrieveFx>getMCExprIndexTable() {

198staticconstRetrieveFx Table[] = {

199#define RECORD(name, altName, print, parse) GetMember##name::Get

200#include "Utils/AMDKernelCodeTInfo.h"

201#undef RECORD

202 };

203returnArrayRef(Table);

204}

205

206staticStringMap<int>createIndexMap(ArrayRef<StringLiteral> names,

207ArrayRef<StringLiteral> altNames) {

208StringMap<int> map;

209assert(names.size() == altNames.size());

210for (unsigned i = 0; i < names.size(); ++i) {

211 map.insert(std::pair(names[i], i));

212 map.insert(std::pair(altNames[i], i));

213 }

214return map;

215}

216

217staticintget_amd_kernel_code_t_FieldIndex(StringRef name) {

218staticconstauto map =createIndexMap(get_amd_kernel_code_t_FldNames(),

219get_amd_kernel_code_t_FldAltNames());

220return map.lookup(name) - 1;// returns -1 if not found

221}

222

223classPrintField {

224public:

225template <typenameT,T AMDGPUMCKernelCodeT::*ptr,

226typename std::enable_if_t<!std::is_integral_v<T>,T> * =nullptr>

227staticvoidprintField(StringRef Name,constAMDGPUMCKernelCodeT &C,

228raw_ostream &OS,MCContext &Ctx,

229AMDGPUMCKernelCodeT::PrintHelper Helper) {

230OS <<Name <<" = ";

231constMCExpr *Value =C.*ptr;

232 Helper(Value,OS, Ctx.getAsmInfo());

233 }

234

235template <typenameT,T AMDGPUMCKernelCodeT::*ptr,

236typename std::enable_if_t<std::is_integral_v<T>,T> * =nullptr>

237staticvoidprintField(StringRef Name,constAMDGPUMCKernelCodeT &C,

238raw_ostream &OS,MCContext &,

239AMDGPUMCKernelCodeT::PrintHelper) {

240OS <<Name <<" = " << (int)(C.*ptr);

241 }

242};

243

244template <typename T, T AMDGPUMCKernelCodeT::*ptr,int shift,int width = 1>

245staticvoidprintBitField(StringRef Name,constAMDGPUMCKernelCodeT &C,

246raw_ostream &OS,MCContext &,

247AMDGPUMCKernelCodeT::PrintHelper) {

248constauto Mask = (static_cast<T>(1) << width) - 1;

249OS <<Name <<" = " << (int)((C.*ptr >> shift) & Mask);

250}

251

252usingPrintFx = void (*)(StringRef,constAMDGPUMCKernelCodeT &,raw_ostream &,

253MCContext &,AMDGPUMCKernelCodeT::PrintHelper Helper);

254

255staticArrayRef<PrintFx>

256getPrinterTable(AMDGPUMCKernelCodeT::PrintHelper Helper) {

257staticconstPrintFx Table[] = {

258#define COMPPGM1(name, aname, AccMacro) \

259 COMPPGM(name, aname, C_00B848_##AccMacro, S_00B848_##AccMacro, 0)

260#define COMPPGM2(name, aname, AccMacro) \

261 COMPPGM(name, aname, C_00B84C_##AccMacro, S_00B84C_##AccMacro, 32)

262#define PRINTFIELD(sname, aname, name) PrintField::printField<FLD_T(name)>

263#define PRINTCOMP(Complement, PGMType) \

264 [](StringRef Name, const AMDGPUMCKernelCodeT &C, raw_ostream &OS, \

265 MCContext &Ctx, AMDGPUMCKernelCodeT::PrintHelper Helper) { \

266 OS << Name << " = "; \

267 auto [Shift, Mask] = getShiftMask(Complement); \

268 const MCExpr *Value; \

269 if (PGMType == 0) { \

270 Value = \

271 maskShiftGet(C.compute_pgm_resource1_registers, Mask, Shift, Ctx); \

272 } else { \

273 Value = \

274 maskShiftGet(C.compute_pgm_resource2_registers, Mask, Shift, Ctx); \

275 } \

276 Helper(Value, OS, Ctx.getAsmInfo()); \

277 }

278#define RECORD(name, altName, print, parse) print

279#include "Utils/AMDKernelCodeTInfo.h"

280#undef RECORD

281 };

282returnArrayRef(Table);

283}

284

285staticboolexpectAbsExpression(MCAsmParser &MCParser, int64_t &Value,

286raw_ostream &Err) {

287

288if (MCParser.getLexer().isNot(AsmToken::Equal)) {

289 Err <<"expected '='";

290returnfalse;

291 }

292 MCParser.getLexer().Lex();

293

294if (MCParser.parseAbsoluteExpression(Value)) {

295 Err <<"integer absolute expression expected";

296returnfalse;

297 }

298returntrue;

299}

300

301template <typename T, T AMDGPUMCKernelCodeT::*ptr>

302staticboolparseField(AMDGPUMCKernelCodeT &C,MCAsmParser &MCParser,

303raw_ostream &Err) {

304 int64_tValue = 0;

305if (!expectAbsExpression(MCParser,Value, Err))

306returnfalse;

307C.*ptr = (T)Value;

308returntrue;

309}

310

311template <typename T, T AMDGPUMCKernelCodeT::*ptr,int shift,int width = 1>

312staticboolparseBitField(AMDGPUMCKernelCodeT &C,MCAsmParser &MCParser,

313raw_ostream &Err) {

314 int64_tValue = 0;

315if (!expectAbsExpression(MCParser,Value, Err))

316returnfalse;

317constuint64_t Mask = ((UINT64_C(1) << width) - 1) << shift;

318C.*ptr &= (T)~Mask;

319C.*ptr |= (T)((Value << shift) & Mask);

320returntrue;

321}

322

323staticboolparseExpr(MCAsmParser &MCParser,constMCExpr *&Value,

324raw_ostream &Err) {

325if (MCParser.getLexer().isNot(AsmToken::Equal)) {

326 Err <<"expected '='";

327returnfalse;

328 }

329 MCParser.getLexer().Lex();

330

331if (MCParser.parseExpression(Value)) {

332 Err <<"Could not parse expression";

333returnfalse;

334 }

335returntrue;

336}

337

338usingParseFx =bool (*)(AMDGPUMCKernelCodeT &,MCAsmParser &,raw_ostream &);

339

340staticArrayRef<ParseFx>getParserTable() {

341staticconstParseFx Table[] = {

342#define COMPPGM1(name, aname, AccMacro) \

343 COMPPGM(name, aname, G_00B848_##AccMacro, C_00B848_##AccMacro, 0)

344#define COMPPGM2(name, aname, AccMacro) \

345 COMPPGM(name, aname, G_00B84C_##AccMacro, C_00B84C_##AccMacro, 32)

346#define PARSECOMP(Complement, PGMType) \

347 [](AMDGPUMCKernelCodeT &C, MCAsmParser &MCParser, \

348 raw_ostream &Err) -> bool { \

349 MCContext &Ctx = MCParser.getContext(); \

350 const MCExpr *Value; \

351 if (!parseExpr(MCParser, Value, Err)) \

352 return false; \

353 auto [Shift, Mask] = getShiftMask(Complement); \

354 Value = maskShiftSet(Value, Mask, Shift, Ctx); \

355 const MCExpr *Compl = MCConstantExpr::create(Complement, Ctx); \

356 if (PGMType == 0) { \

357 C.compute_pgm_resource1_registers = MCBinaryExpr::createAnd( \

358 C.compute_pgm_resource1_registers, Compl, Ctx); \

359 C.compute_pgm_resource1_registers = MCBinaryExpr::createOr( \

360 C.compute_pgm_resource1_registers, Value, Ctx); \

361 } else { \

362 C.compute_pgm_resource2_registers = MCBinaryExpr::createAnd( \

363 C.compute_pgm_resource2_registers, Compl, Ctx); \

364 C.compute_pgm_resource2_registers = MCBinaryExpr::createOr( \

365 C.compute_pgm_resource2_registers, Value, Ctx); \

366 } \

367 return true; \

368 }

369#define RECORD(name, altName, print, parse) parse

370#include "Utils/AMDKernelCodeTInfo.h"

371#undef RECORD

372 };

373returnArrayRef(Table);

374}

375

376staticvoidprintAmdKernelCodeField(constAMDGPUMCKernelCodeT &C,int FldIndex,

377raw_ostream &OS,MCContext &Ctx,

378AMDGPUMCKernelCodeT::PrintHelper Helper) {

379autoPrinter =getPrinterTable(Helper)[FldIndex];

380if (Printer)

381Printer(get_amd_kernel_code_t_FldNames()[FldIndex + 1],C,OS, Ctx, Helper);

382}

383

384voidAMDGPUMCKernelCodeT::initDefault(constMCSubtargetInfo *STI,

385MCContext &Ctx,bool InitMCExpr) {

386AMDGPUMCKernelCodeT();

387

388AMDGPU::initDefaultAMDKernelCodeT(*this, STI);

389

390if (InitMCExpr) {

391constMCExpr *ZeroExpr =MCConstantExpr::create(0, Ctx);

392compute_pgm_resource1_registers =

393MCConstantExpr::create(Lo_32(compute_pgm_resource_registers), Ctx);

394compute_pgm_resource2_registers =

395MCConstantExpr::create(Hi_32(compute_pgm_resource_registers), Ctx);

396is_dynamic_callstack = ZeroExpr;

397wavefront_sgpr_count = ZeroExpr;

398workitem_vgpr_count = ZeroExpr;

399workitem_private_segment_byte_size = ZeroExpr;

400 }

401}

402

403voidAMDGPUMCKernelCodeT::validate(constMCSubtargetInfo *STI,MCContext &Ctx) {

404 int64_tValue;

405if (!compute_pgm_resource1_registers->evaluateAsAbsolute(Value))

406return;

407

408if (G_00B848_DX10_CLAMP(Value) &&AMDGPU::isGFX12Plus(*STI)) {

409 Ctx.reportError({},"enable_dx10_clamp=1 is not allowed on GFX12+");

410return;

411 }

412

413if (G_00B848_IEEE_MODE(Value) &&AMDGPU::isGFX12Plus(*STI)) {

414 Ctx.reportError({},"enable_ieee_mode=1 is not allowed on GFX12+");

415return;

416 }

417

418if (G_00B848_WGP_MODE(Value) && !AMDGPU::isGFX10Plus(*STI)) {

419 Ctx.reportError({},"enable_wgp_mode=1 is only allowed on GFX10+");

420return;

421 }

422

423if (G_00B848_MEM_ORDERED(Value) && !AMDGPU::isGFX10Plus(*STI)) {

424 Ctx.reportError({},"enable_mem_ordered=1 is only allowed on GFX10+");

425return;

426 }

427

428if (G_00B848_FWD_PROGRESS(Value) && !AMDGPU::isGFX10Plus(*STI)) {

429 Ctx.reportError({},"enable_fwd_progress=1 is only allowed on GFX10+");

430return;

431 }

432}

433

434constMCExpr *&AMDGPUMCKernelCodeT::getMCExprForIndex(int Index) {

435staticconstauto IndexTable =getMCExprIndexTable();

436return IndexTable[Index](*this);

437}

438

439boolAMDGPUMCKernelCodeT::ParseKernelCodeT(StringRef ID,MCAsmParser &MCParser,

440raw_ostream &Err) {

441constintIdx =get_amd_kernel_code_t_FieldIndex(ID);

442if (Idx < 0) {

443 Err <<"unexpected amd_kernel_code_t field name " <<ID;

444returnfalse;

445 }

446

447if (hasMCExprVersionTable()[Idx]) {

448constMCExpr *Value;

449if (!parseExpr(MCParser,Value, Err))

450returnfalse;

451getMCExprForIndex(Idx) =Value;

452returntrue;

453 }

454auto Parser =getParserTable()[Idx];

455return Parser ? Parser(*this, MCParser, Err) :false;

456}

457

458voidAMDGPUMCKernelCodeT::EmitKernelCodeT(raw_ostream &OS,MCContext &Ctx,

459PrintHelper Helper) {

460constintSize =hasMCExprVersionTable().size();

461for (int i = 0; i <Size; ++i) {

462OS <<"\t\t";

463if (hasMCExprVersionTable()[i]) {

464OS <<get_amd_kernel_code_t_FldNames()[i + 1] <<" = ";

465constMCExpr *Value =getMCExprForIndex(i);

466 Helper(Value,OS, Ctx.getAsmInfo());

467 }else {

468printAmdKernelCodeField(*this, i,OS, Ctx, Helper);

469 }

470OS <<'\n';

471 }

472}

473

474voidAMDGPUMCKernelCodeT::EmitKernelCodeT(MCStreamer &OS,MCContext &Ctx) {

475OS.emitIntValue(amd_kernel_code_version_major,/*Size=*/4);

476OS.emitIntValue(amd_kernel_code_version_minor,/*Size=*/4);

477OS.emitIntValue(amd_machine_kind,/*Size=*/2);

478OS.emitIntValue(amd_machine_version_major,/*Size=*/2);

479OS.emitIntValue(amd_machine_version_minor,/*Size=*/2);

480OS.emitIntValue(amd_machine_version_stepping,/*Size=*/2);

481OS.emitIntValue(kernel_code_entry_byte_offset,/*Size=*/8);

482OS.emitIntValue(kernel_code_prefetch_byte_offset,/*Size=*/8);

483OS.emitIntValue(kernel_code_prefetch_byte_size,/*Size=*/8);

484OS.emitIntValue(reserved0,/*Size=*/8);

485

486if (compute_pgm_resource1_registers !=nullptr)

487OS.emitValue(compute_pgm_resource1_registers,/*Size=*/4);

488else

489OS.emitIntValue(Lo_32(compute_pgm_resource_registers),

490/*Size=*/4);

491

492if (compute_pgm_resource2_registers !=nullptr)

493OS.emitValue(compute_pgm_resource2_registers,/*Size=*/4);

494else

495OS.emitIntValue(Hi_32(compute_pgm_resource_registers),

496/*Size=*/4);

497

498if (is_dynamic_callstack !=nullptr) {

499constMCExpr *CodeProps =MCConstantExpr::create(code_properties, Ctx);

500 CodeProps =MCBinaryExpr::createOr(

501 CodeProps,

502maskShiftSet(is_dynamic_callstack,

503 (1 <<AMD_CODE_PROPERTY_IS_DYNAMIC_CALLSTACK_WIDTH) - 1,

504AMD_CODE_PROPERTY_IS_DYNAMIC_CALLSTACK_SHIFT, Ctx),

505 Ctx);

506OS.emitValue(CodeProps,/*Size=*/4);

507 }else

508OS.emitIntValue(code_properties,/*Size=*/4);

509

510if (workitem_private_segment_byte_size !=nullptr)

511OS.emitValue(workitem_private_segment_byte_size,/*Size=*/4);

512else

513OS.emitIntValue(0,/*Size=*/4);

514

515OS.emitIntValue(workgroup_group_segment_byte_size,/*Size=*/4);

516OS.emitIntValue(gds_segment_byte_size,/*Size=*/4);

517OS.emitIntValue(kernarg_segment_byte_size,/*Size=*/8);

518OS.emitIntValue(workgroup_fbarrier_count,/*Size=*/4);

519

520if (wavefront_sgpr_count !=nullptr)

521OS.emitValue(wavefront_sgpr_count,/*Size=*/2);

522else

523OS.emitIntValue(0,/*Size=*/2);

524

525if (workitem_vgpr_count !=nullptr)

526OS.emitValue(workitem_vgpr_count,/*Size=*/2);

527else

528OS.emitIntValue(0,/*Size=*/2);

529

530OS.emitIntValue(reserved_vgpr_first,/*Size=*/2);

531OS.emitIntValue(reserved_vgpr_count,/*Size=*/2);

532OS.emitIntValue(reserved_sgpr_first,/*Size=*/2);

533OS.emitIntValue(reserved_sgpr_count,/*Size=*/2);

534OS.emitIntValue(debug_wavefront_private_segment_offset_sgpr,

535/*Size=*/2);

536OS.emitIntValue(debug_private_segment_buffer_sgpr,/*Size=*/2);

537OS.emitIntValue(kernarg_segment_alignment,/*Size=*/1);

538OS.emitIntValue(group_segment_alignment,/*Size=*/1);

539OS.emitIntValue(private_segment_alignment,/*Size=*/1);

540OS.emitIntValue(wavefront_size,/*Size=*/1);

541

542OS.emitIntValue(call_convention,/*Size=*/4);

543OS.emitBytes(StringRef((constchar *)reserved3,/*Size=*/12));

544OS.emitIntValue(runtime_loader_kernel_symbol,/*Size=*/8);

545OS.emitBytes(StringRef((constchar *)control_directives,/*Size=*/16 * 8));

546}

AMDGPUBaseInfo.h

AMDKernelCodeTInfo.h

printBitField

static void printBitField(StringRef Name, const AMDGPUMCKernelCodeT &C, raw_ostream &OS, MCContext &, AMDGPUMCKernelCodeT::PrintHelper)

Definition:AMDKernelCodeTUtils.cpp:245

get_amd_kernel_code_t_FldNames

static ArrayRef< StringLiteral > get_amd_kernel_code_t_FldNames()

Definition:AMDKernelCodeTUtils.cpp:166

get_amd_kernel_code_t_FldAltNames

static ArrayRef< StringLiteral > get_amd_kernel_code_t_FldAltNames()

Definition:AMDKernelCodeTUtils.cpp:176

hasMCExprVersionTable

static ArrayRef< bool > hasMCExprVersionTable()

Definition:AMDKernelCodeTUtils.cpp:186

expectAbsExpression

static bool expectAbsExpression(MCAsmParser &MCParser, int64_t &Value, raw_ostream &Err)

Definition:AMDKernelCodeTUtils.cpp:285

PrintFx

void(*)(StringRef, const AMDGPUMCKernelCodeT &, raw_ostream &, MCContext &, AMDGPUMCKernelCodeT::PrintHelper Helper) PrintFx

Definition:AMDKernelCodeTUtils.cpp:253

parseExpr

static bool parseExpr(MCAsmParser &MCParser, const MCExpr *&Value, raw_ostream &Err)

Definition:AMDKernelCodeTUtils.cpp:323

parseField

static bool parseField(AMDGPUMCKernelCodeT &C, MCAsmParser &MCParser, raw_ostream &Err)

Definition:AMDKernelCodeTUtils.cpp:302

RetrieveFx

const MCExpr *&(*)(AMDGPUMCKernelCodeT &) RetrieveFx

Definition:AMDKernelCodeTUtils.cpp:195

getMCExprIndexTable

static ArrayRef< RetrieveFx > getMCExprIndexTable()

Definition:AMDKernelCodeTUtils.cpp:197

ParseFx

bool(*)(AMDGPUMCKernelCodeT &, MCAsmParser &, raw_ostream &) ParseFx

Definition:AMDKernelCodeTUtils.cpp:338

GEN_HAS_MEMBER

#define GEN_HAS_MEMBER(member)

Definition:AMDKernelCodeTUtils.cpp:41

parseBitField

static bool parseBitField(AMDGPUMCKernelCodeT &C, MCAsmParser &MCParser, raw_ostream &Err)

Definition:AMDKernelCodeTUtils.cpp:312

printAmdKernelCodeField

static void printAmdKernelCodeField(const AMDGPUMCKernelCodeT &C, int FldIndex, raw_ostream &OS, MCContext &Ctx, AMDGPUMCKernelCodeT::PrintHelper Helper)

Definition:AMDKernelCodeTUtils.cpp:376

getPrinterTable

static ArrayRef< PrintFx > getPrinterTable(AMDGPUMCKernelCodeT::PrintHelper Helper)

Definition:AMDKernelCodeTUtils.cpp:256

createIndexMap

static StringMap< int > createIndexMap(ArrayRef< StringLiteral > names, ArrayRef< StringLiteral > altNames)

Definition:AMDKernelCodeTUtils.cpp:206

getParserTable

static ArrayRef< ParseFx > getParserTable()

Definition:AMDKernelCodeTUtils.cpp:340

get_amd_kernel_code_t_FieldIndex

static int get_amd_kernel_code_t_FieldIndex(StringRef name)

Definition:AMDKernelCodeTUtils.cpp:217

AMDKernelCodeTUtils.h

MC layer struct for AMDGPUMCKernelCodeT, provides MCExpr functionality where required.

AMDKernelCodeT.h

AMD_CODE_PROPERTY_IS_DYNAMIC_CALLSTACK_SHIFT

@ AMD_CODE_PROPERTY_IS_DYNAMIC_CALLSTACK_SHIFT

Indicate if the generated ISA is using a dynamically sized call stack.

Definition:AMDKernelCodeT.h:182

AMD_CODE_PROPERTY_IS_DYNAMIC_CALLSTACK_WIDTH

@ AMD_CODE_PROPERTY_IS_DYNAMIC_CALLSTACK_WIDTH

Definition:AMDKernelCodeT.h:183

Printer

dxil pretty DXIL Metadata Pretty Printer

Definition:DXILPrettyPrinter.cpp:305

Idx

Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx

Definition:DeadArgumentElimination.cpp:353

Name

std::string Name

Definition:ELFObjHandler.cpp:77

Size

uint64_t Size

Definition:ELFObjHandler.cpp:81

G_00B848_FWD_PROGRESS

#define G_00B848_FWD_PROGRESS(x)

Definition:SIDefines.h:1197

G_00B848_MEM_ORDERED

#define G_00B848_MEM_ORDERED(x)

Definition:SIDefines.h:1194

G_00B848_IEEE_MODE

#define G_00B848_IEEE_MODE(x)

Definition:SIDefines.h:1188

G_00B848_DX10_CLAMP

#define G_00B848_DX10_CLAMP(x)

Definition:SIDefines.h:1179

G_00B848_WGP_MODE

#define G_00B848_WGP_MODE(x)

Definition:SIDefines.h:1191

assert

assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())

name

static const char * name

Definition:SMEABIPass.cpp:46

raw_pwrite_stream & OS

Definition:SampleProfWriter.cpp:51

StringRef.h

PrintField

Definition:AMDKernelCodeTUtils.cpp:223

PrintField::printField

static void printField(StringRef Name, const AMDGPUMCKernelCodeT &C, raw_ostream &OS, MCContext &Ctx, AMDGPUMCKernelCodeT::PrintHelper Helper)

Definition:AMDKernelCodeTUtils.cpp:227

PrintField::printField

static void printField(StringRef Name, const AMDGPUMCKernelCodeT &C, raw_ostream &OS, MCContext &, AMDGPUMCKernelCodeT::PrintHelper)

Definition:AMDKernelCodeTUtils.cpp:237

bool

llvm::ArrayRef

ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...

Definition:ArrayRef.h:41

llvm::ArrayRef::size

size_t size() const

size - Get the array size.

Definition:ArrayRef.h:168

llvm::AsmToken::Equal

@ Equal

Definition:MCAsmMacro.h:49

llvm::MCAsmLexer::isNot

bool isNot(AsmToken::TokenKind K) const

Check if the current token has kind K.

Definition:MCAsmLexer.h:144

llvm::MCAsmLexer::Lex

const AsmToken & Lex()

Consume the next token from the input stream and return it.

Definition:MCAsmLexer.h:79

llvm::MCAsmParser

Generic assembler parser interface, for use by target specific assembly parsers.

Definition:MCAsmParser.h:123

llvm::MCAsmParser::parseExpression

virtual bool parseExpression(const MCExpr *&Res, SMLoc &EndLoc)=0

Parse an arbitrary expression.

llvm::MCAsmParser::getLexer

virtual MCAsmLexer & getLexer()=0

llvm::MCAsmParser::parseAbsoluteExpression

virtual bool parseAbsoluteExpression(int64_t &Res)=0

Parse an expression which must evaluate to an absolute value.

llvm::MCBinaryExpr::createOr

static const MCBinaryExpr * createOr(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)

Definition:MCExpr.h:602

llvm::MCConstantExpr::create

static const MCConstantExpr * create(int64_t Value, MCContext &Ctx, bool PrintInHex=false, unsigned SizeInBytes=0)

Definition:MCExpr.cpp:222

llvm::MCContext

Context object for machine code objects.

Definition:MCContext.h:83

llvm::MCContext::getAsmInfo

const MCAsmInfo * getAsmInfo() const

Definition:MCContext.h:412

llvm::MCContext::reportError

void reportError(SMLoc L, const Twine &Msg)

Definition:MCContext.cpp:1072

llvm::MCExpr

Base class for the full range of assembler expressions which are needed for parsing.

Definition:MCExpr.h:34

llvm::MCStreamer

Streaming machine code generation interface.

Definition:MCStreamer.h:213

llvm::MCSubtargetInfo

Generic base class for all target subtargets.

Definition:MCSubtargetInfo.h:76

llvm::StringLiteral

A wrapper around a string literal that serves as a proxy for constructing global tables of StringRefs...

Definition:StringRef.h:853

llvm::StringMap

StringMap - This is an unconventional map that is specialized for handling keys that are "strings",...

Definition:StringMap.h:128

llvm::StringMap::insert

bool insert(MapEntryTy *KeyValue)

insert - Insert the specified key/value pair into the map.

Definition:StringMap.h:308

llvm::StringRef

StringRef - Represent a constant reference to a string, i.e.

Definition:StringRef.h:51

llvm::Value

LLVM Value Representation.

Definition:Value.h:74

llvm::function_ref

An efficient, type-erasing, non-owning reference to a callable.

Definition:STLFunctionalExtras.h:37

llvm::raw_ostream

This class implements an extremely fast bulk output stream that can only output to a stream.

Definition:raw_ostream.h:52

uint64_t

unsigned

llvm::AMDGPU

Definition:AMDGPUMetadataVerifier.h:33

llvm::AMDGPU::isGFX12Plus

bool isGFX12Plus(const MCSubtargetInfo &STI)

Definition:AMDGPUBaseInfo.cpp:2210

llvm::AMDGPU::maskShiftSet

const MCExpr * maskShiftSet(const MCExpr *Val, uint32_t Mask, uint32_t Shift, MCContext &Ctx)

Provided with the MCExpr * Val, uint32 Mask and Shift, will return the masked and left shifted,...

Definition:SIDefinesUtils.h:44

llvm::AMDGPU::isGFX10Plus

bool isGFX10Plus(const MCSubtargetInfo &STI)

Definition:AMDGPUBaseInfo.cpp:2194

llvm::AMDGPU::initDefaultAMDKernelCodeT

void initDefaultAMDKernelCodeT(AMDGPUMCKernelCodeT &KernelCode, const MCSubtargetInfo *STI)

Definition:AMDGPUBaseInfo.cpp:1279

llvm::CallingConv::C

@ C

The default llvm calling convention, compatible with C.

Definition:CallingConv.h:34

llvm::CallingConv::ID

unsigned ID

LLVM IR allows to use arbitrary numbers as calling convention identifiers.

Definition:CallingConv.h:24

llvm

This is an optimization pass for GlobalISel generic memory operations.

Definition:AddressRanges.h:18

llvm::Hi_32

constexpr uint32_t Hi_32(uint64_t Value)

Return the high 32 bits of a 64 bit value.

Definition:MathExtras.h:155

llvm::Lo_32

constexpr uint32_t Lo_32(uint64_t Value)

Return the low 32 bits of a 64 bit value.

Definition:MathExtras.h:160

raw_ostream.h

llvm::AMDGPU::AMDGPUMCKernelCodeT

Definition:AMDKernelCodeTUtils.h:33

llvm::AMDGPU::AMDGPUMCKernelCodeT::reserved_vgpr_first

uint16_t reserved_vgpr_first

Definition:AMDKernelCodeTUtils.h:54

llvm::AMDGPU::AMDGPUMCKernelCodeT::reserved_vgpr_count

uint16_t reserved_vgpr_count

Definition:AMDKernelCodeTUtils.h:55

llvm::AMDGPU::AMDGPUMCKernelCodeT::amd_machine_version_major

uint16_t amd_machine_version_major

Definition:AMDKernelCodeTUtils.h:41

llvm::AMDGPU::AMDGPUMCKernelCodeT::amd_machine_kind

uint16_t amd_machine_kind

Definition:AMDKernelCodeTUtils.h:40

llvm::AMDGPU::AMDGPUMCKernelCodeT::kernarg_segment_byte_size

uint64_t kernarg_segment_byte_size

Definition:AMDKernelCodeTUtils.h:52

llvm::AMDGPU::AMDGPUMCKernelCodeT::wavefront_size

uint8_t wavefront_size

Definition:AMDKernelCodeTUtils.h:63

llvm::AMDGPU::AMDGPUMCKernelCodeT::amd_machine_version_stepping

uint16_t amd_machine_version_stepping

Definition:AMDKernelCodeTUtils.h:43

llvm::AMDGPU::AMDGPUMCKernelCodeT::private_segment_alignment

uint8_t private_segment_alignment

Definition:AMDKernelCodeTUtils.h:62

llvm::AMDGPU::AMDGPUMCKernelCodeT::debug_wavefront_private_segment_offset_sgpr

uint16_t debug_wavefront_private_segment_offset_sgpr

Definition:AMDKernelCodeTUtils.h:58

llvm::AMDGPU::AMDGPUMCKernelCodeT::kernel_code_entry_byte_offset

int64_t kernel_code_entry_byte_offset

Definition:AMDKernelCodeTUtils.h:44

llvm::AMDGPU::AMDGPUMCKernelCodeT::control_directives

uint64_t control_directives[16]

Definition:AMDKernelCodeTUtils.h:67

llvm::AMDGPU::AMDGPUMCKernelCodeT::workitem_private_segment_byte_size

const MCExpr * workitem_private_segment_byte_size

Definition:AMDKernelCodeTUtils.h:75

llvm::AMDGPU::AMDGPUMCKernelCodeT::code_properties

uint32_t code_properties

Definition:AMDKernelCodeTUtils.h:49

llvm::AMDGPU::AMDGPUMCKernelCodeT::debug_private_segment_buffer_sgpr

uint16_t debug_private_segment_buffer_sgpr

Definition:AMDKernelCodeTUtils.h:59

llvm::AMDGPU::AMDGPUMCKernelCodeT::amd_kernel_code_version_major

uint32_t amd_kernel_code_version_major

Definition:AMDKernelCodeTUtils.h:38

llvm::AMDGPU::AMDGPUMCKernelCodeT::EmitKernelCodeT

void EmitKernelCodeT(raw_ostream &OS, MCContext &Ctx, PrintHelper Helper)

Definition:AMDKernelCodeTUtils.cpp:458

llvm::AMDGPU::AMDGPUMCKernelCodeT::compute_pgm_resource2_registers

const MCExpr * compute_pgm_resource2_registers

Definition:AMDKernelCodeTUtils.h:70

llvm::AMDGPU::AMDGPUMCKernelCodeT::amd_machine_version_minor

uint16_t amd_machine_version_minor

Definition:AMDKernelCodeTUtils.h:42

llvm::AMDGPU::AMDGPUMCKernelCodeT::gds_segment_byte_size

uint32_t gds_segment_byte_size

Definition:AMDKernelCodeTUtils.h:51

llvm::AMDGPU::AMDGPUMCKernelCodeT::group_segment_alignment

uint8_t group_segment_alignment

Definition:AMDKernelCodeTUtils.h:61

llvm::AMDGPU::AMDGPUMCKernelCodeT::reserved0

uint64_t reserved0

Definition:AMDKernelCodeTUtils.h:47

llvm::AMDGPU::AMDGPUMCKernelCodeT::workgroup_fbarrier_count

uint32_t workgroup_fbarrier_count

Definition:AMDKernelCodeTUtils.h:53

llvm::AMDGPU::AMDGPUMCKernelCodeT::kernarg_segment_alignment

uint8_t kernarg_segment_alignment

Definition:AMDKernelCodeTUtils.h:60

llvm::AMDGPU::AMDGPUMCKernelCodeT::reserved_sgpr_first

uint16_t reserved_sgpr_first

Definition:AMDKernelCodeTUtils.h:56

llvm::AMDGPU::AMDGPUMCKernelCodeT::validate

void validate(const MCSubtargetInfo *STI, MCContext &Ctx)

Definition:AMDKernelCodeTUtils.cpp:403

llvm::AMDGPU::AMDGPUMCKernelCodeT::AMDGPUMCKernelCodeT

AMDGPUMCKernelCodeT()=default

llvm::AMDGPU::AMDGPUMCKernelCodeT::amd_kernel_code_version_minor

uint32_t amd_kernel_code_version_minor

Definition:AMDKernelCodeTUtils.h:39

llvm::AMDGPU::AMDGPUMCKernelCodeT::wavefront_sgpr_count

const MCExpr * wavefront_sgpr_count

Definition:AMDKernelCodeTUtils.h:73

llvm::AMDGPU::AMDGPUMCKernelCodeT::initDefault

void initDefault(const MCSubtargetInfo *STI, MCContext &Ctx, bool InitMCExpr=true)

Definition:AMDKernelCodeTUtils.cpp:384

llvm::AMDGPU::AMDGPUMCKernelCodeT::reserved_sgpr_count

uint16_t reserved_sgpr_count

Definition:AMDKernelCodeTUtils.h:57

llvm::AMDGPU::AMDGPUMCKernelCodeT::kernel_code_prefetch_byte_size

uint64_t kernel_code_prefetch_byte_size

Definition:AMDKernelCodeTUtils.h:46

llvm::AMDGPU::AMDGPUMCKernelCodeT::workitem_vgpr_count

const MCExpr * workitem_vgpr_count

Definition:AMDKernelCodeTUtils.h:74

llvm::AMDGPU::AMDGPUMCKernelCodeT::call_convention

int32_t call_convention

Definition:AMDKernelCodeTUtils.h:64

llvm::AMDGPU::AMDGPUMCKernelCodeT::is_dynamic_callstack

const MCExpr * is_dynamic_callstack

Definition:AMDKernelCodeTUtils.h:72

llvm::AMDGPU::AMDGPUMCKernelCodeT::kernel_code_prefetch_byte_offset

int64_t kernel_code_prefetch_byte_offset

Definition:AMDKernelCodeTUtils.h:45

llvm::AMDGPU::AMDGPUMCKernelCodeT::workgroup_group_segment_byte_size

uint32_t workgroup_group_segment_byte_size

Definition:AMDKernelCodeTUtils.h:50

llvm::AMDGPU::AMDGPUMCKernelCodeT::ParseKernelCodeT

bool ParseKernelCodeT(StringRef ID, MCAsmParser &MCParser, raw_ostream &Err)

Definition:AMDKernelCodeTUtils.cpp:439

llvm::AMDGPU::AMDGPUMCKernelCodeT::runtime_loader_kernel_symbol

uint64_t runtime_loader_kernel_symbol

Definition:AMDKernelCodeTUtils.h:66

llvm::AMDGPU::AMDGPUMCKernelCodeT::reserved3

uint8_t reserved3[12]

Definition:AMDKernelCodeTUtils.h:65

llvm::AMDGPU::AMDGPUMCKernelCodeT::getMCExprForIndex

const MCExpr *& getMCExprForIndex(int Index)

Definition:AMDKernelCodeTUtils.cpp:434

llvm::AMDGPU::AMDGPUMCKernelCodeT::compute_pgm_resource1_registers

const MCExpr * compute_pgm_resource1_registers

Definition:AMDKernelCodeTUtils.h:69

llvm::AMDGPU::AMDGPUMCKernelCodeT::compute_pgm_resource_registers

uint64_t compute_pgm_resource_registers

Definition:AMDKernelCodeTUtils.h:48