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LLVM 20.0.0git
Classes |Macros |Typedefs |Functions |Variables
AMDGPUAsmParser.cpp File Reference
#include "AMDKernelCodeT.h"
#include "MCTargetDesc/AMDGPUInstPrinter.h"
#include "MCTargetDesc/AMDGPUMCExpr.h"
#include "MCTargetDesc/AMDGPUMCKernelDescriptor.h"
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
#include "MCTargetDesc/AMDGPUTargetStreamer.h"
#include "SIDefines.h"
#include "SIInstrInfo.h"
#include "TargetInfo/AMDGPUTargetInfo.h"
#include "Utils/AMDGPUAsmUtils.h"
#include "Utils/AMDGPUBaseInfo.h"
#include "Utils/AMDKernelCodeTUtils.h"
#include "llvm/ADT/APFloat.h"
#include "llvm/ADT/SmallBitVector.h"
#include "llvm/ADT/StringSet.h"
#include "llvm/ADT/Twine.h"
#include "llvm/BinaryFormat/ELF.h"
#include "llvm/CodeGenTypes/MachineValueType.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/MC/MCParser/MCAsmLexer.h"
#include "llvm/MC/MCParser/MCAsmParser.h"
#include "llvm/MC/MCParser/MCParsedAsmOperand.h"
#include "llvm/MC/MCParser/MCTargetAsmParser.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/AMDGPUMetadata.h"
#include "llvm/Support/AMDHSAKernelDescriptor.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/TargetParser/TargetParser.h"
#include <optional>
#include "AMDGPUGenAsmMatcher.inc"

Go to the source code of this file.

Classes

struct  RegInfo
 

Macros

#define PARSE_BITS_ENTRY(FIELD,ENTRY, VALUE, RANGE)
 
#define EXPR_RESOLVE_OR_ERROR(RESOLVED)
 
#define GET_REGISTER_MATCHER
 
#define GET_MATCHER_IMPLEMENTATION
 
#define GET_MNEMONIC_SPELL_CHECKER
 
#define GET_MNEMONIC_CHECKER
 
Auto-generated Match Functions

{

#define GET_ASSEMBLER_HEADER
 

Typedefs

using OperandIndices =SmallVector< int16_t,MAX_SRC_OPERANDS_NUM >
 

Functions

staticconstfltSemantics * getFltSemantics (unsignedSize)
 
staticconstfltSemantics * getFltSemantics (MVT VT)
 
staticconstfltSemantics * getOpFltSemantics (uint8_tOperandType)
 
staticbool canLosslesslyConvertToFPType (APFloat &FPLiteral,MVT VT)
 
staticbool isSafeTruncation (int64_t Val,unsignedSize)
 
staticbool isInlineableLiteralOp16 (int64_t Val,MVT VT,bool HasInv2Pi)
 
static int getRegClass (RegisterKind Is,unsigned RegWidth)
 
staticMCRegister getSpecialRegForName (StringRefRegName)
 
staticbool isRegularReg (RegisterKind Kind)
 
staticconstRegInfo * getRegularRegInfo (StringRef Str)
 
staticbool getRegNum (StringRef Str,unsigned &Num)
 
staticArrayRef<unsigned > getAllVariants ()
 
staticOperandIndices getSrcOperandIndices (unsigned Opcode,bool AddMandatoryLiterals=false)
 
staticbool checkWriteLane (constMCInst &Inst)
 
staticbool IsMovrelsSDWAOpcode (constunsigned Opcode)
 
staticbool IsRevOpcode (constunsigned Opcode)
 
static int IsAGPROperand (constMCInst &Inst,uint16_t NameIdx,constMCRegisterInfo *MRI)
 
static std::string AMDGPUMnemonicSpellCheck (StringRef S,constFeatureBitset &FBS,unsigned VariantID=0)
 
staticbool AMDGPUCheckMnemonic (StringRef Mnemonic,constFeatureBitset &AvailableFeatures,unsigned VariantID)
 
staticbool isInvalidVOPDY (constOperandVector &Operands,uint64_t InvalidOprIdx)
 
static void applyMnemonicAliases (StringRef &Mnemonic,constFeatureBitset &Features,unsigned VariantID)
 
static void addOptionalImmOperand (MCInst &Inst,constOperandVector &Operands, AMDGPUAsmParser::OptionalImmIndexMap &OptionalIdx, AMDGPUOperand::ImmTy ImmT, int64_tDefault=0)
 
staticbool encodeCnt (constAMDGPU::IsaVersion ISA, int64_t &IntVal, int64_t CntVal,bool Saturate,unsigned(*encode)(constIsaVersion &Version,unsigned,unsigned),unsigned(*decode)(constIsaVersion &Version,unsigned))
 
staticLLVM_READNONEunsigned encodeBitmaskPerm (constunsigned AndMask,constunsigned OrMask,constunsigned XorMask)
 
staticbool ConvertOmodMul (int64_t &Mul)
 
staticbool ConvertOmodDiv (int64_t &Div)
 
static void cvtVOP3DstOpSelOnly (MCInst &Inst,constMCRegisterInfo &MRI)
 
staticbool isRegOrImmWithInputMods (constMCInstrDesc &Desc,unsigned OpNum)
 
static void addSrcModifiersAndSrc (MCInst &Inst,constOperandVector &Operands,unsigned i,unsigned Opc,unsigned OpName)
 
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUAsmParser ()
 Force static initialization.
 

Variables

static constexprRegInfo RegularRegisters []
 
constexprunsigned MAX_SRC_OPERANDS_NUM = 6
 
constexpruint64_t MIMGFlags
 

Macro Definition Documentation

◆ EXPR_RESOLVE_OR_ERROR

#define EXPR_RESOLVE_OR_ERROR( RESOLVED)
Value:
if (!(RESOLVED)) \
returnError(IDRange.Start,"directive should have resolvable expression", \
IDRange);
Lightweight error class with error context and mandatory checking.
Definition:Error.h:160

◆ GET_ASSEMBLER_HEADER

#define GET_ASSEMBLER_HEADER

Definition at line1328 of fileAMDGPUAsmParser.cpp.

◆ GET_MATCHER_IMPLEMENTATION

#define GET_MATCHER_IMPLEMENTATION

Definition at line9688 of fileAMDGPUAsmParser.cpp.

◆ GET_MNEMONIC_CHECKER

#define GET_MNEMONIC_CHECKER

Definition at line9690 of fileAMDGPUAsmParser.cpp.

◆ GET_MNEMONIC_SPELL_CHECKER

#define GET_MNEMONIC_SPELL_CHECKER

Definition at line9689 of fileAMDGPUAsmParser.cpp.

◆ GET_REGISTER_MATCHER

#define GET_REGISTER_MATCHER

Definition at line9687 of fileAMDGPUAsmParser.cpp.

◆ PARSE_BITS_ENTRY

#define PARSE_BITS_ENTRY( FIELD,
 ENTRY,
 VALUE,
 RANGE 
)
Value:
if (!isUInt<ENTRY##_WIDTH>(Val)) \
return OutOfRangeError(RANGE); \
AMDGPU::MCKernelDescriptor::bits_set(FIELD, VALUE,ENTRY##_SHIFT,ENTRY, \
getContext());
#define FIELD(name)
#define ENTRY(ASMNAME, ENUM)

Typedef Documentation

◆ OperandIndices

usingOperandIndices =SmallVector<int16_t,MAX_SRC_OPERANDS_NUM>

Definition at line3687 of fileAMDGPUAsmParser.cpp.

Function Documentation

◆ addOptionalImmOperand()

static void addOptionalImmOperand(MCInst & Inst,
constOperandVector & Operands,
AMDGPUAsmParser::OptionalImmIndexMap & OptionalIdx,
AMDGPUOperand::ImmTy ImmT,
int64_t Default =0 
)
static

Definition at line6768 of fileAMDGPUAsmParser.cpp.

Referencesllvm::MCInst::addOperand(),llvm::MCOperand::createImm(),Default,Idx, andOperands.

◆ addSrcModifiersAndSrc()

static void addSrcModifiersAndSrc(MCInst & Inst,
constOperandVector & Operands,
unsigned i,
unsigned Opc,
unsigned OpName 
)
static

Definition at line8979 of fileAMDGPUAsmParser.cpp.

Referencesllvm::AMDGPU::getNamedOperandIdx(), andOperands.

◆ AMDGPUCheckMnemonic()

staticbool AMDGPUCheckMnemonic(StringRef Mnemonic,
constFeatureBitset & AvailableFeatures,
unsigned VariantID 
)
static

◆ AMDGPUMnemonicSpellCheck()

static std::string AMDGPUMnemonicSpellCheck(StringRef S,
constFeatureBitset & FBS,
unsigned VariantID =0 
)
static

◆ applyMnemonicAliases()

static void applyMnemonicAliases(StringRef & Mnemonic,
constFeatureBitset & Features,
unsigned VariantID 
)
static

◆ canLosslesslyConvertToFPType()

staticbool canLosslesslyConvertToFPType(APFloat & FPLiteral,
MVT VT 
)
static

Definition at line2001 of fileAMDGPUAsmParser.cpp.

Referencesllvm::APFloat::convert(), andgetFltSemantics().

◆ checkWriteLane()

staticbool checkWriteLane(constMCInst & Inst)
static

Definition at line3735 of fileAMDGPUAsmParser.cpp.

Referencesllvm::MCInst::getOpcode(),llvm::MCInst::getOperand(),llvm::MCOperand::getReg(),llvm::MCOperand::isReg(),llvm::M0(), andllvm::AMDGPU::mc2PseudoReg().

◆ ConvertOmodDiv()

staticbool ConvertOmodDiv(int64_t & Div)
static

Definition at line8527 of fileAMDGPUAsmParser.cpp.

◆ ConvertOmodMul()

staticbool ConvertOmodMul(int64_t & Mul)
static

Definition at line8519 of fileAMDGPUAsmParser.cpp.

ReferencesMul.

◆ cvtVOP3DstOpSelOnly()

static void cvtVOP3DstOpSelOnly(MCInst & Inst,
constMCRegisterInfo & MRI 
)
static

Definition at line8640 of fileAMDGPUAsmParser.cpp.

Referencesassert(),llvm::SISrcMods::DST_OP_SEL,llvm::MCOperand::getImm(),llvm::AMDGPU::getNamedOperandIdx(),llvm::MCInst::getOpcode(),llvm::MCInst::getOperand(),llvm::DstOp::getReg(),llvm::AMDGPU::hasNamedOperand(),llvm::AMDGPU::isHi16Reg(),MRI, andllvm::MCOperand::setImm().

◆ encodeBitmaskPerm()

staticLLVM_READNONEunsigned encodeBitmaskPerm(constunsigned AndMask,
constunsigned OrMask,
constunsigned XorMask 
)
static

Definition at line8031 of fileAMDGPUAsmParser.cpp.

◆ encodeCnt()

staticbool encodeCnt(constAMDGPU::IsaVersion ISA,
int64_t & IntVal,
int64_t CntVal,
bool Saturate,
unsigned(*)(constIsaVersion &Version,unsigned,unsigned) encode,
unsigned(*)(constIsaVersion &Version,unsigned) decode 
)
static

Definition at line7196 of fileAMDGPUAsmParser.cpp.

Referencesdecode(),llvm::encode(), andllvm::Failed().

◆ getAllVariants()

staticArrayRef<unsigned > getAllVariants()
static

Definition at line3518 of fileAMDGPUAsmParser.cpp.

Referencesllvm::AMDGPUAsmVariants::DEFAULT,llvm::AMDGPUAsmVariants::DPP,llvm::AMDGPUAsmVariants::SDWA,llvm::AMDGPUAsmVariants::SDWA9,llvm::AMDGPUAsmVariants::VOP3, andllvm::AMDGPUAsmVariants::VOP3_DPP.

◆ getFltSemantics()[1/2]

staticconstfltSemantics * getFltSemantics(MVT VT)
static

Definition at line1941 of fileAMDGPUAsmParser.cpp.

ReferencesgetFltSemantics(), andllvm::MVT::getSizeInBits().

◆ getFltSemantics()[2/2]

staticconstfltSemantics * getFltSemantics(unsigned Size)
static

Definition at line1928 of fileAMDGPUAsmParser.cpp.

Referencesllvm_unreachable, andSize.

Referenced bycanLosslesslyConvertToFPType(), andgetFltSemantics().

◆ getOpFltSemantics()

staticconstfltSemantics * getOpFltSemantics(uint8_t OperandType)
static

Definition at line1945 of fileAMDGPUAsmParser.cpp.

Referencesllvm_unreachable,llvm::AMDGPU::OPERAND_INLINE_SPLIT_BARRIER_INT32,llvm::AMDGPU::OPERAND_KIMM16,llvm::AMDGPU::OPERAND_KIMM32,llvm::AMDGPU::OPERAND_REG_IMM_BF16,llvm::AMDGPU::OPERAND_REG_IMM_BF16_DEFERRED,llvm::AMDGPU::OPERAND_REG_IMM_FP16,llvm::AMDGPU::OPERAND_REG_IMM_FP16_DEFERRED,llvm::AMDGPU::OPERAND_REG_IMM_FP32,llvm::AMDGPU::OPERAND_REG_IMM_FP32_DEFERRED,llvm::AMDGPU::OPERAND_REG_IMM_FP64,llvm::AMDGPU::OPERAND_REG_IMM_INT16,llvm::AMDGPU::OPERAND_REG_IMM_INT32,llvm::AMDGPU::OPERAND_REG_IMM_INT64,llvm::AMDGPU::OPERAND_REG_IMM_V2BF16,llvm::AMDGPU::OPERAND_REG_IMM_V2FP16,llvm::AMDGPU::OPERAND_REG_IMM_V2FP32,llvm::AMDGPU::OPERAND_REG_IMM_V2INT16,llvm::AMDGPU::OPERAND_REG_IMM_V2INT32,llvm::AMDGPU::OPERAND_REG_INLINE_AC_BF16,llvm::AMDGPU::OPERAND_REG_INLINE_AC_FP16,llvm::AMDGPU::OPERAND_REG_INLINE_AC_FP32,llvm::AMDGPU::OPERAND_REG_INLINE_AC_FP64,llvm::AMDGPU::OPERAND_REG_INLINE_AC_INT16,llvm::AMDGPU::OPERAND_REG_INLINE_AC_INT32,llvm::AMDGPU::OPERAND_REG_INLINE_AC_V2BF16,llvm::AMDGPU::OPERAND_REG_INLINE_AC_V2FP16,llvm::AMDGPU::OPERAND_REG_INLINE_AC_V2INT16,llvm::AMDGPU::OPERAND_REG_INLINE_C_BF16,llvm::AMDGPU::OPERAND_REG_INLINE_C_FP16,llvm::AMDGPU::OPERAND_REG_INLINE_C_FP32,llvm::AMDGPU::OPERAND_REG_INLINE_C_FP64,llvm::AMDGPU::OPERAND_REG_INLINE_C_INT16,llvm::AMDGPU::OPERAND_REG_INLINE_C_INT32,llvm::AMDGPU::OPERAND_REG_INLINE_C_INT64,llvm::AMDGPU::OPERAND_REG_INLINE_C_V2BF16,llvm::AMDGPU::OPERAND_REG_INLINE_C_V2FP16,llvm::AMDGPU::OPERAND_REG_INLINE_C_V2FP32,llvm::AMDGPU::OPERAND_REG_INLINE_C_V2INT16, andllvm::AMDGPU::OPERAND_REG_INLINE_C_V2INT32.

◆ getRegClass()

static int getRegClass(RegisterKind Is,
unsigned RegWidth 
)
static

Definition at line2533 of fileAMDGPUAsmParser.cpp.

◆ getRegNum()

staticbool getRegNum(StringRef Str,
unsigned & Num 
)
static

Definition at line2797 of fileAMDGPUAsmParser.cpp.

◆ getRegularRegInfo()

staticconstRegInfo * getRegularRegInfo(StringRef Str)
static

Definition at line2790 of fileAMDGPUAsmParser.cpp.

ReferencesRegularRegisters.

◆ getSpecialRegForName()

staticMCRegister getSpecialRegForName(StringRef RegName)
static

Definition at line2646 of fileAMDGPUAsmParser.cpp.

Referencesllvm::StringSwitch< T, R >::Case(),llvm::StringSwitch< T, R >::Default(), andRegName.

◆ getSrcOperandIndices()

staticOperandIndices getSrcOperandIndices(unsigned Opcode,
bool AddMandatoryLiterals =false 
)
static

Definition at line3691 of fileAMDGPUAsmParser.cpp.

Referencesllvm::AMDGPU::getNamedOperandIdx(), andllvm::AMDGPU::isVOPD().

◆ IsAGPROperand()

static int IsAGPROperand(constMCInst & Inst,
uint16_t NameIdx,
constMCRegisterInfo * MRI 
)
static

Definition at line4808 of fileAMDGPUAsmParser.cpp.

Referencesllvm::MCRegisterClass::contains(),llvm::AMDGPU::getNamedOperandIdx(),llvm::MCInst::getOpcode(),llvm::MCInst::getOperand(), andMRI.

Referenced bydecodeAVLdSt().

◆ isInlineableLiteralOp16()

staticbool isInlineableLiteralOp16(int64_t Val,
MVT VT,
bool HasInv2Pi 
)
static

Definition at line2023 of fileAMDGPUAsmParser.cpp.

Referencesassert(),llvm::MVT::getScalarType(),llvm::AMDGPU::isInlinableLiteral32(),llvm::AMDGPU::isInlinableLiteralBF16(), andllvm::AMDGPU::isInlinableLiteralFP16().

◆ isInvalidVOPDY()

staticbool isInvalidVOPDY(constOperandVector & Operands,
uint64_t InvalidOprIdx 
)
static

Definition at line5324 of fileAMDGPUAsmParser.cpp.

Referencesassert(), andOperands.

◆ IsMovrelsSDWAOpcode()

staticbool IsMovrelsSDWAOpcode(constunsigned Opcode)
static

Definition at line4097 of fileAMDGPUAsmParser.cpp.

◆ isRegOrImmWithInputMods()

staticbool isRegOrImmWithInputMods(constMCInstrDesc & Desc,
unsigned OpNum 
)
static

Definition at line8687 of fileAMDGPUAsmParser.cpp.

Referencesllvm::AMDGPU::OPERAND_INPUT_MODS.

◆ isRegularReg()

staticbool isRegularReg(RegisterKind Kind)
static

Definition at line2783 of fileAMDGPUAsmParser.cpp.

◆ IsRevOpcode()

staticbool IsRevOpcode(constunsigned Opcode)
static

Definition at line4299 of fileAMDGPUAsmParser.cpp.

◆ isSafeTruncation()

staticbool isSafeTruncation(int64_t Val,
unsigned Size 
)
static

Definition at line2019 of fileAMDGPUAsmParser.cpp.

Referencesllvm::isIntN(),llvm::isUIntN(), andSize.

◆ LLVMInitializeAMDGPUAsmParser()

LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUAsmParser()

Force static initialization.

Definition at line9682 of fileAMDGPUAsmParser.cpp.

ReferencesA,B,llvm::getTheGCNTarget(), andllvm::getTheR600Target().

Variable Documentation

◆ MAX_SRC_OPERANDS_NUM

constexprunsigned MAX_SRC_OPERANDS_NUM = 6
constexpr

Definition at line3686 of fileAMDGPUAsmParser.cpp.

◆ MIMGFlags

constexpruint64_t MIMGFlags
constexpr
Initial value:
=
SIInstrFlags::MIMG |SIInstrFlags::VIMAGE |SIInstrFlags::VSAMPLE
@ MIMG
Definition:SIDefines.h:83
@ VSAMPLE
Definition:SIDefines.h:85
@ VIMAGE
Definition:SIDefines.h:84

Definition at line3892 of fileAMDGPUAsmParser.cpp.

◆ RegularRegisters

constexprRegInfo RegularRegisters[]
staticconstexpr
Initial value:
= {
{{"v"}, IS_VGPR},
{{"s"}, IS_SGPR},
{{"ttmp"}, IS_TTMP},
{{"acc"},IS_AGPR},
{{"a"},IS_AGPR},
}
@ IS_AGPR
Definition:SIDefines.h:373

Definition at line2775 of fileAMDGPUAsmParser.cpp.

Referenced bygetRegularRegInfo().

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