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Optimizing Compiler Backend

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vxcc-backend/vxcc-old

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IMPORTANT: This is currently beeing completely rewritten and redesigned inhttp://github.com/vxcc-backend/vxcc-new

VXCC

optimizing, small, simple, compiler backend.

VXCC uses SSA IR with block arguments instead of the commonly used phi-nodes.

VXCC is licenced under thepermissive Apache 2.0 license with LLVM Exceptions

compilation stages

  • frontend generates non-SSA IR
  • backend converts it to SSA
  • backend applies optimizations
  • backend converts it to "LL IR" (non-SSA + labels) and performs some more optimizations
  • simple code generation

goals

  • easily modifyable and readable code
  • not much special knowladge required
  • easy to implement code generation for any architecture
  • make it easy for people to learn about compiler backends
  • good-ish optimizations
  • beat QBE in terms of generated code speed

non-goals

  • reach complexity of GCC or even LLVM
  • beat GCC or LLVM

frontends

current status

goalprogress
amd64 codegen#33cc33done (for now)
basic optimizations#33cc33done
rv32im codegen#ff9900in progress
proper register allocator & ISEL rework#ff9900planned
floating point numbers#cc0000planned

building

use the./build.sh build

compile dependencies

one ofclang,gcc, ortcc: automatically detected. different C compiler can be used by doingCC=someothercc ./build.sh [build|test] (test can be executed afterbuild to run all tests)

python3: it is recommended to create a venv in the repository root usingpython -m venv venv

including into projects

Link with all files returned by./build.sh libfiles (at time of writing, onlybuild/lib.a)

using VXCC in a compiler

this is meant to be extremely easy to do (for the frontend developer)

There is some documentation infrontend_dev_doc.md.You can also uselook at theC3C fork in thesrc/compiler/vxcc_* files.

If you have any questions, you can ask me on Discord (alex_s168) or send me anE-Mail

contributing

all contributions are welcome! Don't hesitate to ask me if you have any questions.

please do not currently change anything related to:

  • codegen system / isel & regalloc (because I want to re-do it in a specific way)

current optimizations

  • variable inlining
  • duplicate code removal
  • cmoves
  • tailcall
  • simplify loops and ifs
  • simple pattern replacement of bit extract and similar
  • compile time constant eval

code-gen example

input:

fnvoidstrcpy(char*dest,char*src) @export {for (uszi=0;src[i]!='\0';i++)dest[i]=src[i];}

output:

strcpy:xorr11d,r11d  .l0:movr9b, byte[rsi+1*r11]testr9b,r9bje .l1mov byte[rdi+1*r11],r9blear8,[r11+1]movr11,r8jmp .l0  .l1:ret

This will improve in the close future.

adding a target

You need to complete these tasks (in any order):

  • add your target to every place with the comment// add target.(you can usegit grep -Fn "// add target" to find them)
  • write a code generator (see ETC.A or X86 backend as reference) and add the file to thebuild.c
  • add support for it to frontends?

Contributors2

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