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1. Parallel-ProgrammingParallel-ProgrammingPublic

   ECE 563 Course at PURDUE.

   C

2. GPUGPUPublic

   ECE 695 Course at Purdue (CUDA)

   C++ 1

3. AES128AES128Public

   Hardware Accelerator for AES 128-bit Encryption and Decryption implemented (in Verilog) in Altera's FPGA board.

   Verilog 14 3

4. CRC32CRC32Public

   32-bit CRC Hardware Accelerator and Custom Instructions implemented (in Verilog) in Altera's FPGA board.

   C 8 1

5. SAT-solverSAT-solverPublic

   The SAT solver checks if the given CNF formula evaluates to true for some arbitrary input combinations.

   C++ 1 1