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Commit31bf4a1

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Updates for RPi for 2026.01-rc4:- rpi: Fix DRAM size reporting to show total RAM- rpi: Use the U-Boot control FDT for fdt_addr- pinctrl: bcm283x: Add GPIO pull-up/down control for BCM2835 and BCM2711- rpi: Fix compilation with larger configs
2 parents781e6e3 +5b702cf commit31bf4a1

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4 files changed

+139
-12
lines changed

4 files changed

+139
-12
lines changed

‎arch/arm/mach-bcm283x/include/mach/gpio.h‎

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -26,6 +26,16 @@
2626
#defineBCM2835_GPIO_FSEL_BANK(gpio)(gpio / 10)
2727
#defineBCM2835_GPIO_FSEL_SHIFT(gpio)((gpio % 10) * 3)
2828

29+
/* BCM2835 GPIO Pull-up/down register offsets */
30+
#defineBCM2835_GPPUD37
31+
#defineBCM2835_GPPUDCLK038
32+
33+
/* BCM2711 GPIO Pull-up/down control */
34+
#defineBCM2711_GPPUD_CNTRL_REG057
35+
#defineBCM2711_PUD_REG_OFFSET(gpio)((gpio) / 16)
36+
#defineBCM2711_PUD_REG_SHIFT(gpio)(((gpio) % 16) * 2)
37+
#defineBCM2711_PUD_2711_MASK0x3
38+
2939
structbcm2835_gpio_regs {
3040
u32gpfsel[6];
3141
u32reserved1;

‎board/raspberrypi/rpi/lowlevel_init.S‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,8 @@ save_boot_params:
1616

1717
/* The firmware provided ATAG/FDT address can be found in r2/x0 */
1818
#ifdef CONFIG_ARM64
19-
adrx8, fw_dtb_pointer
19+
adrpx8, fw_dtb_pointer
20+
add x8, x8,#:lo12:fw_dtb_pointer
2021
strx0, [x8]
2122
#else
2223
ldrr8, =fw_dtb_pointer

‎board/raspberrypi/rpi/rpi.c‎

Lines changed: 25 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -3,6 +3,8 @@
33
* (C) Copyright 2012-2016 Stephen Warren
44
*/
55

6+
#defineLOG_CATEGORYLOGC_BOARD
7+
68
#include<config.h>
79
#include<dm.h>
810
#include<env.h>
@@ -332,13 +334,27 @@ int dram_init(void)
332334
#ifdefCONFIG_OF_BOARD
333335
intdram_init_banksize(void)
334336
{
337+
phys_addr_ttotal_size=0;
338+
inti;
335339
intret;
336340

337341
ret=fdtdec_setup_memory_banksize();
338342
if (ret)
339343
returnret;
340344

341-
returnfdtdec_setup_mem_size_base();
345+
ret=fdtdec_setup_mem_size_base();
346+
if (ret)
347+
returnret;
348+
349+
/* Update gd->ram_size to reflect total RAM across all banks */
350+
for (i=0;i<CONFIG_NR_DRAM_BANKS;i++) {
351+
if (gd->bd->bi_dram[i].size==0)
352+
break;
353+
total_size+=gd->bd->bi_dram[i].size;
354+
}
355+
gd->ram_size=total_size;
356+
357+
return0;
342358
}
343359
#endif
344360

@@ -354,15 +370,13 @@ static void set_fdtfile(void)
354370
}
355371

356372
/*
357-
* If the firmware provided a valid FDT at boot time, let's expose it in
358-
* ${fdt_addr} so it may be passed unmodified to the kernel.
373+
* Allow U-Boot to use its control FDT with extlinux if one is not provided.
374+
* This will then go through the usual fixups that U-Boot does, before being
375+
* handed off to Linux
359376
*/
360377
staticvoidset_fdt_addr(void)
361378
{
362-
if (fdt_magic(fw_dtb_pointer)!=FDT_MAGIC)
363-
return;
364-
365-
env_set_hex("fdt_addr",fw_dtb_pointer);
379+
env_set_hex("fdt_addr", (ulong)gd->fdt_blob);
366380
}
367381

368382
/*
@@ -608,7 +622,10 @@ int ft_board_setup(void *blob, struct bd_info *bd)
608622
{
609623
intnode;
610624

611-
update_fdt_from_fw(blob, (void*)fw_dtb_pointer);
625+
if (blob==gd->fdt_blob)
626+
log_debug("Same FDT: nothing to do\n");
627+
else
628+
update_fdt_from_fw(blob, (void*)gd->fdt_blob);
612629

613630
if (CONFIG_IS_ENABLED(FDT_SIMPLEFB)) {
614631
node=fdt_node_offset_by_compatible(blob,-1,"simple-framebuffer");

‎drivers/pinctrl/broadcom/pinctrl-bcm283x.c‎

Lines changed: 102 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -21,6 +21,8 @@
2121
#include<asm/system.h>
2222
#include<asm/io.h>
2323
#include<asm/gpio.h>
24+
#include<dt-bindings/pinctrl/bcm2835.h>
25+
#include<linux/delay.h>
2426

2527
structbcm283x_pinctrl_priv {
2628
u32*base_reg;
@@ -54,16 +56,77 @@ static int bcm2835_gpio_get_func_id(struct udevice *dev, unsigned int gpio)
5456
}
5557

5658
/*
57-
* bcm283x_pinctrl_set_state: configure pin functions.
59+
* bcm2835_gpio_set_pull: Set GPIO pull-up/down resistor for BCM2835
60+
* @dev: the pinctrl device
61+
* @gpio: the GPIO pin number
62+
* @pull: pull setting (BCM2835_PUD_OFF, BCM2835_PUD_DOWN, BCM2835_PUD_UP)
63+
*/
64+
staticvoidbcm2835_gpio_set_pull(structudevice*dev,unsignedintgpio,intpull)
65+
{
66+
structbcm283x_pinctrl_priv*priv=dev_get_priv(dev);
67+
u32bank=BCM2835_GPPUDCLK0+BCM2835_GPIO_COMMON_BANK(gpio);
68+
u32bit=BCM2835_GPIO_COMMON_SHIFT(gpio);
69+
70+
/* Set required control signal */
71+
writel(pull&0x3,&priv->base_reg[BCM2835_GPPUD]);
72+
udelay(1);
73+
74+
/* Clock the control signal into the GPIO pads */
75+
writel(1 <<bit,&priv->base_reg[bank]);
76+
udelay(1);
77+
78+
/* Remove the control signal and clock */
79+
writel(0,&priv->base_reg[BCM2835_GPPUD]);
80+
writel(0,&priv->base_reg[bank]);
81+
}
82+
83+
/*
84+
* bcm2711_gpio_set_pull: Set GPIO pull-up/down resistor for BCM2711
85+
* @dev: the pinctrl device
86+
* @gpio: the GPIO pin number
87+
* @pull: pull setting (BCM2835_PUD_OFF, BCM2835_PUD_DOWN, BCM2835_PUD_UP)
88+
*/
89+
staticvoidbcm2711_gpio_set_pull(structudevice*dev,unsignedintgpio,intpull)
90+
{
91+
structbcm283x_pinctrl_priv*priv=dev_get_priv(dev);
92+
u32reg_offset;
93+
u32bit_shift;
94+
u32pull_bits;
95+
96+
/* Findout which GPIO_PUP_PDN_CNTRL register to use */
97+
reg_offset=BCM2711_GPPUD_CNTRL_REG0+BCM2711_PUD_REG_OFFSET(gpio);
98+
99+
/* Findout the bit position */
100+
bit_shift=BCM2711_PUD_REG_SHIFT(gpio);
101+
102+
/* Update the 2-bit field for this GPIO */
103+
pull_bits=pull&BCM2711_PUD_2711_MASK;
104+
clrsetbits_le32(&priv->base_reg[reg_offset],
105+
BCM2711_PUD_2711_MASK <<bit_shift,
106+
pull_bits <<bit_shift);
107+
}
108+
109+
staticvoidbcm283x_gpio_set_pull(structudevice*dev,unsignedintgpio,intpull)
110+
{
111+
if (device_is_compatible(dev,"brcm,bcm2835-gpio"))
112+
bcm2835_gpio_set_pull(dev,gpio,pull);
113+
else
114+
bcm2711_gpio_set_pull(dev,gpio,pull);
115+
}
116+
117+
/*
118+
* bcm283x_pinctrl_set_state: configure pin functions and pull states.
58119
* @dev: the pinctrl device to be configured.
59120
* @config: the state to be configured.
60121
* @return: 0 in success
61122
*/
62123
intbcm283x_pinctrl_set_state(structudevice*dev,structudevice*config)
63124
{
64125
u32pin_arr[MAX_PINS_PER_BANK];
126+
u32pull_arr[MAX_PINS_PER_BANK];
65127
intfunction;
66-
inti,len,pin_count=0;
128+
inti,len,pin_count=0,pull_len=0,pull_count=0;
129+
intpull_value;
67130

68131
if (!dev_read_prop(config,"brcm,pins",&len)|| !len||
69132
len&0x3||dev_read_u32_array(config,"brcm,pins",pin_arr,
@@ -82,8 +145,44 @@ int bcm283x_pinctrl_set_state(struct udevice *dev, struct udevice *config)
82145
return-EINVAL;
83146
}
84147

85-
for (i=0;i<pin_count;i++)
148+
/* Check if brcm,pull property exists */
149+
if (dev_read_prop(config,"brcm,pull",&pull_len)&&pull_len>0) {
150+
if (pull_len&0x3) {
151+
debug("Invalid pull array length for pinconfig %s (%d)\n",
152+
config->name,pull_len);
153+
return-EINVAL;
154+
}
155+
156+
pull_count=pull_len /sizeof(u32);
157+
158+
if (pull_count!=1&&pull_count!=pin_count) {
159+
debug("Pull array count (%d) must be 1 or match pin count (%d) for pinconfig %s\n",
160+
pull_count,pin_count,config->name);
161+
return-EINVAL;
162+
}
163+
164+
if (dev_read_u32_array(config,"brcm,pull",pull_arr,pull_count)) {
165+
debug("Failed reading pull array for pinconfig %s\n",config->name);
166+
return-EINVAL;
167+
}
168+
169+
/* Validate pull values */
170+
for (i=0;i<pull_count;i++) {
171+
if (pull_arr[i]>2) {
172+
debug("Invalid pull value %d for pin %d in pinconfig %s\n",
173+
pull_arr[i],pin_arr[i],config->name);
174+
return-EINVAL;
175+
}
176+
}
177+
}
178+
179+
for (i=0;i<pin_count;i++) {
86180
bcm2835_gpio_set_func_id(dev,pin_arr[i],function);
181+
if (pull_count>0) {
182+
pull_value= (pull_count==1) ?pull_arr[0] :pull_arr[i];
183+
bcm283x_gpio_set_pull(dev,pin_arr[i],pull_value);
184+
}
185+
}
87186

88187
return0;
89188
}

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