Implementation and test of reusable sigma-delta A/D converters written in SystemVerilog on a MAX10 FPGA with minimal external components

• UpdatedApr 11, 2022
• SystemVerilog

Intel Quartus Prime Synthesis Engine for Docker

• UpdatedFeb 19, 2024
• Dockerfile

Fork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm

• UpdatedOct 15, 2018
• Verilog

Music Light Cube | 音樂全彩光立方（主倉庫）

• UpdatedJan 4, 2022

Simple SoC in VHDL with full toolchain and custom board.

• UpdatedJun 4, 2018
• VHDL

Pong game on FPGA Max 10 DE10-Lite, written in VHDL.

• UpdatedOct 14, 2021
• VHDL

Tutorial and example projects for the Arrow MAX1000 FPGA board

• UpdatedSep 13, 2018
• Verilog

Reference designs and firmware for open-source RISC-V core implementation on MX10 and SpiderSoM

• UpdatedNov 11, 2022
• C

Projects and labs from the courses dictated inhttps://www.coursera.org/specializations/fpga-design. Projects are sometimes simulated, and implemented in either a MAX10-Lite or an Arrow MAX1000 board.-

• UpdatedMar 22, 2021
• Verilog

NeoPixel LED Controller | NeoPixel LED 控制器 | 基於MAX10 FPGA的音樂全彩光立方LED控制器

• UpdatedJan 4, 2022
• Verilog

Clock Data Recovery | 時鐘數據恢復

• UpdatedAug 9, 2020
• Verilog

Automatically create a NIOS II Eclipse Project with the latest FreeRTOS Version, the Intel hwlib and more...

• UpdatedJun 27, 2021
• C

ADC demo on the Terasic DE10-Lite board with MAX10 FPGA

• UpdatedFeb 7, 2021

SiFive's Freedom e300 for the DECA Max10 FPGA

• UpdatedSep 4, 2021
• Verilog

Tool that removes lines in .svf files to preserve the security key stored in Intel® MAX® 10 devices.

• UpdatedApr 13, 2023
• Makefile

JH_Advanced Haasoscope

• UpdatedNov 3, 2022
• Verilog

Source codes of examples from the book Verilog by Examples

• UpdatedMar 19, 2024
• Verilog

Golden Hardware Reference Designs (GHRD) for System On Chips in FPGA (SOCFPGA)

• UpdatedAug 24, 2021
• Verilog

a simple blinky project for Intel MAX10 - 10M08 Evaluation Kit

• UpdatedFeb 7, 2024
• VHDL

Indicar direcciones correctas para obtener MicroFPGAs CYC1000 MAX1000

• UpdatedMay 27, 2023