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#

litex

Here are 42 public repositories matching this topic...

hBPF = eBPF in hardware

  • UpdatedJan 27, 2023
  • Python
f4pga-examples

Example designs showing different ways to use F4PGA toolchains.

  • UpdatedMar 27, 2024
  • Verilog
fomu-workshop

Support files for participating in a Fomu workshop

  • UpdatedMar 17, 2024
  • Verilog

Generic CNC firmware and driver for FPGA cards which are supported by LiteX

  • UpdatedFeb 12, 2025
  • Verilog

MicroPython port to litex FPGA platforms

  • UpdatedApr 7, 2020
  • C

RISC-V soft core running on Colorlight 5B-74B.

  • UpdatedFeb 14, 2021
  • C

LinuxCNC FPGA board port to LiteX

  • UpdatedJan 24, 2025
  • VHDL

Open source Logic Analyzer based on LiteX SoC

  • UpdatedDec 21, 2024
  • C
LiteXStorage

LiteXStorage is simple yet powerful and very high-performance storage mechanism and incorporating both synchronous and asynchronous usage with some advanced usage of cloud storage which can help us to handle storage more easier!

  • UpdatedMay 17, 2022

Template project for LiteX-based SoCs

  • UpdatedJul 11, 2024
  • Python

CRUVI Standard Specifications

  • UpdatedMay 6, 2024
  • Verilog

Prebuilt images for Linux for the Pano Logic G2

  • UpdatedJun 24, 2023
  • Makefile

Running Rust on the (Linux) Litex VexRiscv FPGA SOC

  • UpdatedFeb 8, 2020
  • Python

Audio DSP on an FPGA using eurorack-pmod + LiteX with firmware in Rust.

  • UpdatedApr 10, 2024
  • Python
LiteXCache

LiteXCache is simple yet powerful and very high performance cache mechanism and incorporating both synchronous and asynchronous usage with some advanced usages of caching which can help us to handle caching more easier!

  • UpdatedJan 6, 2023
LiteXEmail

LiteXEmail is simple yet powerful and very high-performance sms mechanism and incorporating both synchronous and asynchronous usage with some advanced usages which can help us to handle sending email more easier!

  • UpdatedMay 17, 2022

CI/CD for RISC-V Cores

  • UpdatedDec 11, 2023
  • Verilog

How to run RISCV64 Debian linux on an FPGA with Litex

  • UpdatedMay 24, 2023

LiteX CVA6 - Fixed integration of the CPU into LiteX SoC generator

  • UpdatedAug 1, 2023
  • C++

Mirror ofhttps://git.sr.ht/~lschuermann/nix-litex. Viewhttps://hub.sr.ht/~lschuermann/nix-litex for more information and the respective mailing lists.

  • UpdatedJan 10, 2024
  • Nix

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