fpga-accelerator

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doonny /PipeCNN

Star1.3k

An OpenCL-based FPGA Accelerator for Convolutional Neural Networks

deep-neural-networks fpga deep-learning hls hardware opencl altera-opencl-sdk fpga-accelerator

UpdatedFeb 14, 2022
C

google /qkeras

Star566

QKeras: a quantization deep learning library for Tensorflow Keras

machine-learning fpga deep-learning tensorflow accelerator keras quantization hardware-acceleration fpga-accelerator quantized-neural-networks asic-design quantized-networks

UpdatedJun 13, 2025
Python

jofrfu /tinyTPU

Star484

Implementation of a Tensor Processing Unit for embedded systems and the IoT.

linux iot fpga zynq tensorflow assembly vhdl embedded-systems internet-of-things hardware-architectures verilog xilinx vivado tensor hardware-designs hardware-acceleration fpga-accelerator hardware-description-language ip-core tpu

UpdatedJan 5, 2019
VHDL

aliemo /transfomers-silicon-research

Star268

Research and Materials on Hardware implementation of Transformer Model

natural-language-processing fpga accelerator transformer gpu-acceleration pretrained-models hardware-designs research-paper bert fpga-accelerator systolic-arrays processing-in-memory vision-transformer video-transformer

UpdatedFeb 28, 2025
Jupyter Notebook

lirui-shanghaitech /CNN-Accelerator-VLSI

Star217

Convolutional accelerator kernel, target ASIC & FPGA

fpga accelerator cnn fpga-accelerator cnn-digital cnn-accelerator asic-design

UpdatedApr 10, 2023
Verilog

hsharma35 /dnnweaver2

Star216

Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.

deep-neural-networks fpga fpga-accelerator

UpdatedApr 22, 2019
Jupyter Notebook

cameronshinn /tiny-tpu

Star191

Small-scale Tensor Processing Unit built on an FPGA

fpga neural-network convolutional-neural-networks fpga-accelerator tpu tpu-acceleration

UpdatedAug 4, 2019
Verilog

Er1cZ /Deploying_CNN_on_FPGA_using_OpenCL

Star111

Squeezenet V1.1 on Cyclone V SoC-FPGA at 450ms/image, 20x faster than ARM A9 processor alone. A project for 2017 Innovate FPGA design contest.

opencl fpga-accelerator cnn-classification

UpdatedJun 27, 2018
Objective-C

ToNi3141 /RasterIX

Star92

OpenGL 1.x implementation for FPGAs

opengl fpga renderer 3d 3d-graphics fpga-accelerator

UpdatedJul 12, 2025
C++

hossein1387 /BARVINN

Star90

BARVINN: A Barrel RISC-V Neural Network Accelerator:https://barvinn.readthedocs.io/en/latest/

machine-learning deep-neural-networks quantization risc-v fpga-accelerator

UpdatedJan 5, 2025
Tcl

tirumalnaidu /opencl-hls-cnn-accelerator

Star79

OpenCL HLS based CNN Accelerator on Intel DE10 Nano FPGA.

fpga opencl altera-opencl-sdk fpga-accelerator darknet-image-classification de10-nano cnn-acceleration neural-network-accelerator intel-fpga-opencl

UpdatedOct 3, 2023
C

ToNi3141 /RasteriCEr

Star39

Basic OpenGL 1.x implementation for small FPGAs (like iCE40UP5K)

arduino fpga 3d 3d-graphics fpga-accelerator

UpdatedNov 14, 2021
C++

RSPwFPGAs /opae-xilinx

Star39

OPAE porting to Xilinx FPGA devices.

fpga xilinx pcie fpga-accelerator axi partial-reconfiguration opae platform-reuse

UpdatedAug 5, 2020
Coq

lirui-shanghaitech /A-convolution-kernel-implemented-by-Vivado-HLS

Star37

This project implements a convolution kernel based on vivado HLS on zcu104

hls convolution fpga-accelerator vivado-hls

UpdatedMar 15, 2020
C++

FloyedShen /mnist_hls

Star37

Lenet for MNIST handwritten digit recognition using Vivado hls tool

zynq hls vivado zedboard fpga-accelerator vivado-hls mnist-hls

UpdatedJul 22, 2020
Objective-C

hibagus /64pointFFTProcessor

Star30

Synthesizeable VHDL and Verilog implementation of 64-point FFT/IFFT Processor with Q4.12 Fixed Point Data Format.

signal-processing fast-fourier-transform digital-signal-processing vlsi-physical-design fpga-accelerator vlsi-design vlsi-project

UpdatedMay 20, 2020
Verilog

os-hxfan /BayesNN_FPGA

Star24

FPGA-based hardware acceleration for dropout-based Bayesian Neural Networks.

deep-learning bayesian-neural-networks fpga-accelerator

UpdatedAug 15, 2023
Python

dpretet /bster

Sponsor

Star19

Implementation of a binary search tree algorithm in a FPGA/ASIC IP

asic fpga ip verilog binary-tree systemverilog binary-trees bst fpga-accelerator bstree asic-design svut

UpdatedSep 5, 2021
SystemVerilog

akzare /HardORB

Star18

TCP/IP and UDP/IP protocol stack off-loading

fpga-accelerator tcpip-offloading soc-verification

UpdatedAug 9, 2020
Verilog

leos313 /DOOM_FPGA

Star18

Accelerating a Classic 3D Video Game (The DOOM) on Heterogeneous Reconfigurable MPSoCs

linux fpga doom accelerate vivado fpga-soc-linux fpga-game hardware-acceleration mpsoc fpga-accelerator 3d-video-game chocolate-doom heterogeneous-reconfigurable-mpsocs

UpdatedJun 4, 2020
C

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