digital-logic
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Digital logic design tool and simulator
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Mar 18, 2025 - Java
Teaching-focused digital circuit simulator
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May 8, 2024 - JavaScript
IceChips is a library of all common discrete logic devices in Verilog
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Nov 20, 2024 - Verilog
Here are my GATE CSE 2021 Resources
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Feb 26, 2021
A digital logic simulator inspired by Logisim.
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May 20, 2021 - Python
here the notes provided by the seniors who already cracked IITs as well as how much I'll cover for my exams I'll provide my notes as well. If you want you can access the course by these links also
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Jan 24, 2025
Labs for Computer Science: C, Assembly, Data Structure, CSAPP, HSI, MATLAB, Digital Logic, Verilog, Compilers, Operating Systems
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Dec 10, 2024 - C
Simple Java application for simulating digital circuits
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Mar 15, 2023 - Java
A simple 8 bit UART implementation in Verilog, with tests and timing diagrams
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May 28, 2023 - Verilog
VHDL code examples for a digital design course
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Jan 29, 2020 - VHDL
32bit Simplifier of Boolean functions
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Dec 4, 2018 - C
透過數位邏輯結合VHDL與Verilog的過程,作為從基礎數位邏輯到計算機系統結構,並實作出一顆CPU的教學書籍,希望未來可以成為教學範例檔案。目前將開發轉移到GitLab,因為可以呈現數學與MUL圖。
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Oct 25, 2023 - Verilog
This is the mirror for gitee in github for project assignment of cs202 / 214 Computer Organization course of Southern University of Science and Technology, which is to manufacture a CPU. 这是南方科技大学CS202/214计算机组成原理课程的大作业——实现一个CPU。
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Jun 6, 2022 - Verilog
Compiling finite generators to digital logic. WIP
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Aug 24, 2020 - Haskell
An experimental package manager and development tool for Hardware Description Languages (HDL).
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Apr 10, 2022 - Python
WIP open source tooling for the XC9500 / XC9500XL series of CPLDs from Xilinx.
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Nov 5, 2021 - Python
The design and implementation of simple computer by quartus.
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Jun 22, 2017 - VHDL
A powerful tool for minimizing Boolean functions
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Aug 19, 2024 - Python
Formal verification engine for Verilog with built-in support for simulating flip-flop metastability
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Jun 8, 2017 - Java
This repository contains the codes for various type of circuits simulated in VHDL in Xilinx ISE Design.
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Mar 11, 2014 - VHDL
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