@@ -47,11 +47,16 @@ PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static uint8_t
4747HciAclDataBuffer[sizeof(TL_PacketHeader_t) + 5 + 251];
4848
4949
50+ uint8_t _rxbuff[BLE_MODULE_SHARED_MEM_BUFFER_SIZE];
51+ uint16_t _read_index;
52+ uint16_t _write_index;
53+ uint16_t _write_index_initial;
54+
5055HCISharedMemTransportClass::HCISharedMemTransportClass (BLEChip_t ble_chip) :
5156 _ble_chip(ble_chip)
5257{
53- _read_index =0 ;
54- _write_index =0 ;
58+ _read_index =0 ;/* fifo position when reading */
59+ _write_index =0 ;/* fifo position when receiving */
5560 _write_index_initial =0 ;
5661
5762 sys_event =false ;
@@ -67,12 +72,19 @@ static void evt_received(TL_EvtPacket_t *hcievt)
6772switch (hcievt->evtserial .type ) {
6873case TL_BLEEVT_PKT_TYPE:
6974 len = hcievt->evtserial .evt .plen + TL_EVT_HDR_SIZE;
70- // TODO: on_data_received((uint8_t *)&hcievt->evtserial, len);
75+ /* store received data in the _rxbuff buffer*/
76+ memcpy ((uint8_t *)&_rxbuff, (uint8_t *)&hcievt->evtserial , len);
77+ /* move index*/
78+ _write_index += len;
79+ // TODO: control the _rxbuff cannot overflow
7180break ;
7281case TL_ACL_DATA_PKT_TYPE: {
7382 TL_AclDataSerial_t *acl = &(((TL_AclDataPacket_t *)hcievt)->AclDataSerial );
7483 len = acl->length +5 ;
75- // TODO: on_data_received((uint8_t *)acl, len);
84+ memcpy ((uint8_t *)&_rxbuff, (uint8_t *)&acl, len);
85+ /* move index*/
86+ _write_index += len;
87+ // TODO: control the _rxbuff cannot overflow
7688 }
7789break ;
7890default :
@@ -703,10 +715,6 @@ size_t HCISharedMemTransportClass::write(const uint8_t* data, size_t length)
703715 {
704716 TL_CmdPacket_t *bleCmdBuf = &BleCmdBuffer;
705717
706- /* this WA will clear the IPCC C1TOC2CSR 0x58000C0C else the next TX irq is not triggered
707- LL_C2_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_SYSTEM_CMD_RSP_CHANNEL );*/
708-
709-
710718// Note: Until enum is avalable
711719// type 01 Command
712720// type 02 ACL DATA