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variant(f4): add the DISCO_F411VE (STM32F411E-DISCO) board#2805

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Merged
fpistm merged 1 commit intostm32duino:mainfromotac0n:main
Sep 9, 2025
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2 changes: 2 additions & 0 deletionsREADME.md
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Expand Up@@ -191,6 +191,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
| :green_heart: | STM32F100RB | [STM32VLDISCOVERY](https://www.st.com/en/evaluation-tools/stm32vldiscovery.html) | 0.2.1 | |
| :green_heart: | STM32F303VC | [STM32F3DISCOVERY](https://www.st.com/en/evaluation-tools/stm32f3discovery.html) | *2.0.0* | |
| :green_heart: | STM32F407VG | [STM32F407G-DISC1](http://www.st.com/en/evaluation-tools/stm32f4discovery.html) | *0.1.0* | |
| :yellow_heart: | STM32F411VE | [STM32F411E-DISCO](https://www.st.com/en/evaluation-tools/32f411ediscovery.html) | **2.12.0** | |
| :green_heart: | STM32F413ZH | [32F413HDISCOVERY](https://www.st.com/en/evaluation-tools/32f413hdiscovery.html) | *1.9.0* | |
| :green_heart: | STM32F746NG | [STM32F746G-DISCOVERY](http://www.st.com/en/evaluation-tools/32f746gdiscovery.html) | *0.1.0* | |
| :green_heart: | STM32G031J6 | [STM32G0316-DISCO](https://www.st.com/en/evaluation-tools/stm32g0316-disco.html) | *1.9.0* | |
Expand DownExpand Up@@ -389,6 +390,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
| :green_heart: | STM32F410T8<br>STM32F410TB | Generic Board | *2.4.0* | |
| :green_heart: | STM32F411CC<br>STM32F411CE | Generic Board | *1.9.0* | |
| :green_heart: | STM32F411RC<br>STM32F411RE | Generic Board | *1.9.0* | |
| :yellow_heart: | STM32F411VC<br>STM32F411VE | Generic Board | **2.12.0** | |
| :green_heart: | STM32F412CE<br>STM32F412CG | Generic Board | *1.9.0* | |
| :green_heart: | STM32F412RE<br>STM32F412RG | Generic Board | *1.9.0* | |
| :green_heart: | STM32F412ZE<br>STM32F412ZG | Generic Board | *2.6.0* | |
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32 changes: 32 additions & 0 deletionsboards.txt
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Expand Up@@ -1421,6 +1421,20 @@ Disco.menu.pnum.DISCO_F407VG.build.variant=STM32F4xx/F407V(E-G)T_F417V(E-G)T
Disco.menu.pnum.DISCO_F407VG.openocd.target=stm32f4x
Disco.menu.pnum.DISCO_F407VG.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F4xx/STM32F407.svd

# DISCO_F411VE board
Disco.menu.pnum.DISCO_F411VE=STM32F411E-DISCO
Disco.menu.pnum.DISCO_F411VE.upload.maximum_size=524288
Disco.menu.pnum.DISCO_F411VE.upload.maximum_data_size=131072
Disco.menu.pnum.DISCO_F411VE.build.mcu=cortex-m4
Disco.menu.pnum.DISCO_F411VE.build.fpu=-mfpu=fpv4-sp-d16
Disco.menu.pnum.DISCO_F411VE.build.float-abi=-mfloat-abi=hard
Disco.menu.pnum.DISCO_F411VE.build.board=DISCO_F411VE
Disco.menu.pnum.DISCO_F411VE.build.series=STM32F4xx
Disco.menu.pnum.DISCO_F411VE.build.product_line=STM32F411xE
Disco.menu.pnum.DISCO_F411VE.build.variant=STM32F4xx/F411V(C-E)T
Disco.menu.pnum.DISCO_F411VE.openocd.target=stm32f4x
Disco.menu.pnum.DISCO_F411VE.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F4xx/STM32F411.svd

# DISCO_F413ZH board
Disco.menu.pnum.DISCO_F413ZH=STM32F413H-DISCO
Disco.menu.pnum.DISCO_F413ZH.node=DIS_F413ZH
Expand DownExpand Up@@ -5258,6 +5272,24 @@ GenF4.menu.pnum.GENERIC_F411RETX.build.product_line=STM32F411xE
GenF4.menu.pnum.GENERIC_F411RETX.build.variant=STM32F4xx/F411R(C-E)T
GenF4.menu.pnum.GENERIC_F411RETX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F4xx/STM32F411.svd

# Generic F411VCTx
GenF4.menu.pnum.GENERIC_F411VCTX=Generic F411VCTx
GenF4.menu.pnum.GENERIC_F411VCTX.upload.maximum_size=262144
GenF4.menu.pnum.GENERIC_F411VCTX.upload.maximum_data_size=131072
GenF4.menu.pnum.GENERIC_F411VCTX.build.board=GENERIC_F411VCTX
GenF4.menu.pnum.GENERIC_F411VCTX.build.product_line=STM32F411xE
GenF4.menu.pnum.GENERIC_F411VCTX.build.variant=STM32F4xx/F411V(C-E)T
GenF4.menu.pnum.GENERIC_F411VCTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F4xx/STM32F411.svd

# Generic F411VETx
GenF4.menu.pnum.GENERIC_F411VETX=Generic F411VETx
GenF4.menu.pnum.GENERIC_F411VETX.upload.maximum_size=524288
GenF4.menu.pnum.GENERIC_F411VETX.upload.maximum_data_size=131072
GenF4.menu.pnum.GENERIC_F411VETX.build.board=GENERIC_F411VETX
GenF4.menu.pnum.GENERIC_F411VETX.build.product_line=STM32F411xE
GenF4.menu.pnum.GENERIC_F411VETX.build.variant=STM32F4xx/F411V(C-E)T
GenF4.menu.pnum.GENERIC_F411VETX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F4xx/STM32F411.svd

# Generic F412CEUx
GenF4.menu.pnum.GENERIC_F412CEUX=Generic F412CEUx
GenF4.menu.pnum.GENERIC_F412CEUX.upload.maximum_size=524288
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1 change: 1 addition & 0 deletionsvariants/STM32F4xx/F411V(C-E)T/CMakeLists.txt
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Expand Up@@ -22,6 +22,7 @@ add_library(variant_bin STATIC EXCLUDE_FROM_ALL
generic_clock.c
PeripheralPins.c
variant_generic.cpp
variant_DISCO_F411VE.cpp
)
target_link_libraries(variant_bin PUBLIC variant_usage)

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38 changes: 36 additions & 2 deletionsvariants/STM32F4xx/F411V(C-E)T/generic_clock.c
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Expand Up@@ -20,8 +20,42 @@
*/
WEAK void SystemClock_Config(void)
{
/* SystemClock_Config can be generated by STM32CubeMX */
#warning "SystemClock_Config() is empty. Default clock at reset is used."
RCC_OscInitTypeDef RCC_OscInitStruct = {};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};

/** Configure the main internal regulator output voltage
*/
__HAL_RCC_PWR_CLK_ENABLE();
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);

/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLM = 16;
RCC_OscInitStruct.PLL.PLLN = 192;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = 4;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
Error_Handler();
}

/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;

if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) {
Error_Handler();
}
}

#endif /* ARDUINO_GENERIC_* */
188 changes: 188 additions & 0 deletionsvariants/STM32F4xx/F411V(C-E)T/ldscript.ld
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@@ -0,0 +1,188 @@
/*
******************************************************************************
**
** @file : LinkerScript.ld
**
** @author : Auto-generated by STM32CubeIDE
**
** @brief : Linker script for STM32F411VETx Device from STM32F4 series
** 512KBytes FLASH
** 128KBytes RAM
**
** Set heap size, stack size and stack location according
** to application requirements.
**
** Set memory bank area and size if external memory is used
**
** Target : STMicroelectronics STM32
**
** Distribution: The file is distributed as is, without any warranty
** of any kind.
**
******************************************************************************
** @attention
**
** Copyright (c) 2025 STMicroelectronics.
** All rights reserved.
**
** This software is licensed under terms that can be found in the LICENSE file
** in the root directory of this software component.
** If no LICENSE file comes with this software, it is provided AS-IS.
**
******************************************************************************
*/

/* Entry Point */
ENTRY(Reset_Handler)

/* Highest address of the user mode stack */
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */

_Min_Heap_Size = 0x200; /* required amount of heap */
_Min_Stack_Size = 0x400; /* required amount of stack */

/* Memories definition */
MEMORY
{
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
}

/* Sections */
SECTIONS
{

/* The startup code into "FLASH" Rom type memory */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
} >FLASH

/* The program code and other data into "FLASH" Rom type memory */
.text :
{
. = ALIGN(4);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.glue_7) /* glue arm to thumb code */
*(.glue_7t) /* glue thumb to arm code */
*(.eh_frame)

KEEP (*(.init))
KEEP (*(.fini))

. = ALIGN(4);
_etext = .; /* define a global symbols at end of code */
} >FLASH

/* Constant data into "FLASH" Rom type memory */
.rodata :
{
. = ALIGN(4);
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
. = ALIGN(4);
} >FLASH

.ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH

.ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
. = ALIGN(4);
} >FLASH

.preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
} >FLASH

.init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
} >FLASH

.fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT(.fini_array.*)))
KEEP (*(.fini_array*))
PROVIDE_HIDDEN (__fini_array_end = .);
. = ALIGN(4);
} >FLASH

/* Used by the startup to initialize data */
_sidata = LOADADDR(.data);

/* Initialized data sections into "RAM" Ram type memory */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start */
*(.data) /* .data sections */
*(.data*) /* .data* sections */
*(.RamFunc) /* .RamFunc sections */
*(.RamFunc*) /* .RamFunc* sections */

. = ALIGN(4);
_edata = .; /* define a global symbol at data end */

} >RAM AT> FLASH

/* Uninitialized data section into "RAM" Ram type memory */
. = ALIGN(4);
.bss :
{
/* This is used by the startup in order to initialize the .bss section */
_sbss = .; /* define a global symbol at bss start */
__bss_start__ = _sbss;
*(.bss)
*(.bss*)
*(COMMON)

. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end */
__bss_end__ = _ebss;
} >RAM

/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
._user_heap_stack :
{
. = ALIGN(8);
PROVIDE ( end = . );
PROVIDE ( _end = . );
. = . + _Min_Heap_Size;
. = . + _Min_Stack_Size;
. = ALIGN(8);
} >RAM

/* Remove information from the compiler libraries */
/DISCARD/ :
{
libc.a ( * )
libm.a ( * )
libgcc.a ( * )
}

.ARM.attributes 0 : { *(.ARM.attributes) }
}
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