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Tidying up clock config of H5.#2695

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Merged
fpistm merged 1 commit intostm32duino:mainfromdojyorin:chore-unify-h5-clock
Mar 31, 2025

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@dojyorin
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Summary

The generic clock config for STM32H5 series will be made as common as possible.
As a result, only differences will be the number of peripherals that vary by part number, clock source and peripherals used by each variant, etc.

We have also tidied up the writing style, such as commenting out.

This fixesH503KBU which was not included in#2598 fix.

Common changes

  • Common to all
    • USB usesHSI48
  • Common inH503
    • Peripherals:RCC_PERIPHCLK_ADCDACRCC_PERIPHCLK_LPUART1RCC_PERIPHCLK_USBRCC_PERIPHCLK_SPI1RCC_PERIPHCLK_SPI2RCC_PERIPHCLK_SPI3
  • Common inH562H563H573
    • SDMMC1 operates at 50MHz.
    • Peripherals:RCC_PERIPHCLK_SDMMC1RCC_PERIPHCLK_ADCDACRCC_PERIPHCLK_LPUART1RCC_PERIPHCLK_USBRCC_PERIPHCLK_SPI1RCC_PERIPHCLK_SPI2RCC_PERIPHCLK_SPI3RCC_PERIPHCLK_SPI4RCC_PERIPHCLK_SPI5RCC_PERIPHCLK_SPI6
      • RCC_PERIPHCLK_SPI4 andRCC_PERIPHCLK_SPI5 is only for models with high pin count.

Variant-specific changes

  • H503CB(T-U)
    • Writing style has been improved.
  • H503KBU
  • H503RBT
    • Writing style has been improved.
  • variant:NUCLEO_H503RB
    • FollowH503RBT.
  • H562R(G-I)T
    • Writing style has been improved.
    • PLL2R andUSB value has been made consistent withH563R(G-I)T,H563IIKxQ_H573IIKxQ andH563Z(G-I)T values.
  • variant:WEACT_H562RG
    • FollowH562R(G-I)T.
  • H563IIKxQ_H573IIKxQ
    • Writing style has been improved.
    • OSPI removed.
  • variant:STM32H573I_DK
    • FollowH563IIKxQ_H573IIKxQ.
    • SinceSAI is enabled, I have not touchedPLL2 multiplex.
  • H563R(G-I)T
    • Writing style has been improved.
    • PLL2R andSDMMC1 value has been made consistent withH562R(G-I)T,H563IIKxQ_H573IIKxQ andH563Z(G-I)T values.
  • H563Z(G-I)T
    • Writing style has been improved.
    • SDMMC1 value has been made consistent withH562R(G-I)T,H563IIKxQ_H573IIKxQ andH563R(G-I)T values.
  • variant:NUCLEO_H563ZI
    • FollowH563Z(G-I)T.
    • Since PLL is HSE, adjust multiplex so that final frequency is same asH563Z(G-I)T.

@dojyorin
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Ah, I'm stupid.
I forgot to add HSI48 and CSI to the clock sources for NUCLEO_H563ZI.
Sorry.

@fpistm
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Hi@dojyorin
I don't see any benefits from this PR except for the H503K.

@dojyorin
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@fpistm
I've been working on a project that uses H5 continuously for some time, and I thought that if I could tidy up the code base, I'd be able to comfortably expand future H5 variants.
If this PR increases the likelihood of serious issues, I think you should withdraw it, but if it's OK from the perspective of tidying up the code base, would you consider merging it?

@dojyorin
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For example, by organizing things in this PR, it will be easier to visually distinguish the differences in a diff editor, making it easier to add new variants and apply patches.

I'm currently developing several custom H5 boards, and when I was referencing the code of existing variants to add a variant, I was a little confused by the subtle variations in numbers and notation.

I submitted a PR to reduce experiences like this.

@dojyorindojyorin changed the titleUnify clock config of H5.Tidying up clock config of H5.Mar 19, 2025
@dojyorin
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@fpistm
Thank you for understanding the purpose.
And thank you for correcting my work.

I'll fix the corrections this weekend.

fpistm reacted with thumbs up emoji

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Honestly, I understand your point to change config order will help ton compare anyway changing several values just to have less difference is risky and probably add regressions.
Current config is know to work and I have no time to test this PR on each target to ensure it is correct.

Please revert to CSI the Nucleo H503RB config as the one you set is not correct.

@dojyorin
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dojyorin commentedMar 27, 2025•
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I thought I had checked datasheets, but it seems I still didn't fully understand it.
I'm sorry for bothering you repeatedly.
Thank you for your detailed explanation.
I will fix it soon.

@fpistmfpistm added the enhancementNew feature or request labelMar 28, 2025
@fpistmfpistm added this to the2.11.0 milestoneMar 28, 2025
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I've updated the PR. Honestly, anytime a new H5 board will be added the clock config will not be aligned with your reordering.
Cube MX generate config in different order and ofeten with different values.
I have some doubt about the disco but as said would not like spent too much time on this kind of PR.
For me it is ok like this.

@fpistmfpistm self-requested a reviewMarch 28, 2025 14:15
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LGTM. No test performed.

@github-project-automationgithub-project-automationbot moved this fromIn progress toReviewer approved inSTM32 core based on ST HALMar 28, 2025
@dojyorin
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dojyorin commentedMar 28, 2025•
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I understood that code cleanup does not make much sense.
As this project is largely founded on your contribution, I have decided to follow your opinion.

@fpistm
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Not agreed. I understand your point about diff but you changed some configurations for specific hardware which could bring some regressions. And as stated above cube mx does not follow this rules. Anyway any contributions are welcome. I'd like to have more contributions and hope to find new maintainers. Moreover some of your changes seems go to have a better configurations. 😉

Signed-off-by: dojyorin <ota_droid@live.jp>
@fpistmfpistm merged commit06547a2 intostm32duino:mainMar 31, 2025
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@github-project-automationgithub-project-automationbot moved this fromReviewer approved toDone inSTM32 core based on ST HALMar 31, 2025
@dojyorindojyorin deleted the chore-unify-h5-clock branchMarch 31, 2025 17:57
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