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chore(l4): update to latest STM32CubeL4 v1.18.1#2488

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Merged
fpistm merged 3 commits intostm32duino:mainfromfpistm:STM32CubeL4_update
Aug 20, 2024
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Original file line numberDiff line numberDiff line change
Expand Up@@ -821,7 +821,7 @@ typedef struct
#define SRAM1_SIZE_MAX (0x00008000UL) /*!< maximum SRAM1 size (up to 32 KBytes) */
#define SRAM2_SIZE (0x00002000UL) /*!< SRAM2 size (8 KBytes) */

#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)

#define FLASH_SIZE (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x80U << 10U) : \
(((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
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Expand Up@@ -854,7 +854,7 @@ typedef struct
#define SRAM1_SIZE_MAX (0x00008000UL) /*!< maximum SRAM1 size (up to 32 KBytes) */
#define SRAM2_SIZE (0x00002000UL) /*!< SRAM2 size (8 KBytes) */

#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)

#define FLASH_SIZE (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x80U << 10U) : \
(((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
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Expand Up@@ -934,7 +934,7 @@ typedef struct
#define SRAM1_SIZE_MAX (0x0000C000UL) /*!< maximum SRAM1 size (up to 48 KBytes) */
#define SRAM2_SIZE (0x00004000UL) /*!< SRAM2 size (16 KBytes) */

#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)

#define FLASH_SIZE (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x100U << 10U) : \
(((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
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Expand Up@@ -930,7 +930,7 @@ typedef struct
#define SRAM1_SIZE_MAX (0x0000C000UL) /*!< maximum SRAM1 size (up to 48 KBytes) */
#define SRAM2_SIZE (0x00004000UL) /*!< SRAM2 size (16 KBytes) */

#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)

#define FLASH_SIZE (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x100U << 10U) : \
(((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
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Expand Up@@ -988,7 +988,7 @@ typedef struct
#define SRAM1_SIZE_MAX (0x0000C000UL) /*!< maximum SRAM1 size (up to 48 KBytes) */
#define SRAM2_SIZE (0x00004000UL) /*!< SRAM2 size (16 KBytes) */

#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)

#define FLASH_SIZE (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x100U << 10U) : \
(((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
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Expand Up@@ -963,7 +963,7 @@ typedef struct
#define SRAM1_SIZE_MAX (0x0000C000UL) /*!< maximum SRAM1 size (up to 48 KBytes) */
#define SRAM2_SIZE (0x00004000UL) /*!< SRAM2 size (16 KBytes) */

#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)

#define FLASH_SIZE (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x100U << 10U) : \
(((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
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Expand Up@@ -1021,7 +1021,7 @@ typedef struct
#define SRAM1_SIZE_MAX (0x0000C000UL) /*!< maximum SRAM1 size (up to 48 KBytes) */
#define SRAM2_SIZE (0x00004000UL) /*!< SRAM2 size (16 KBytes) */

#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)

#define FLASH_SIZE (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x100U << 10U) : \
(((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
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Expand Up@@ -954,7 +954,7 @@ typedef struct
#define SRAM1_SIZE_MAX (0x00020000UL) /*!< maximum SRAM1 size (up to 128 KBytes) */
#define SRAM2_SIZE (0x00008000UL) /*!< SRAM2 size (32 KBytes) */

#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)

#define FLASH_SIZE (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x200U << 10U) : \
(((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
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Expand Up@@ -993,7 +993,7 @@ typedef struct
#define SRAM1_SIZE_MAX (0x00020000UL) /*!< maximum SRAM1 size (up to 128 KBytes) */
#define SRAM2_SIZE (0x00008000UL) /*!< SRAM2 size (32 KBytes) */

#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)

#define FLASH_SIZE (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x200U << 10U) : \
(((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
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Expand Up@@ -1026,7 +1026,7 @@ typedef struct
#define SRAM1_SIZE_MAX (0x00020000UL) /*!< maximum SRAM1 size (up to 128 KBytes) */
#define SRAM2_SIZE (0x00008000UL) /*!< SRAM2 size (32 KBytes) */

#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)

#define FLASH_SIZE (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x200U << 10U) : \
(((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
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Expand Up@@ -1011,7 +1011,7 @@ typedef struct
#define SRAM1_SIZE_MAX (0x00018000UL) /*!< maximum SRAM1 size (up to 96 KBytes) */
#define SRAM2_SIZE (0x00008000UL) /*!< SRAM2 size (32 KBytes) */

#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)

#define FLASH_SIZE (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU))== 0x0000FFFFU)) ? (0x400U << 10U) : \
(((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
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Expand Up@@ -1130,7 +1130,7 @@ typedef struct
#define SRAM1_SIZE_MAX (0x00018000UL) /*!< maximum SRAM1 size (up to 96 KBytes) */
#define SRAM2_SIZE (0x00008000UL) /*!< SRAM2 size (32 KBytes) */

#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)

#define FLASH_SIZE (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU))== 0x0000FFFFU)) ? (0x400U << 10U) : \
(((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
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Expand Up@@ -1145,7 +1145,7 @@ typedef struct
#define SRAM1_SIZE_MAX (0x00018000UL) /*!< maximum SRAM1 size (up to 96 KBytes) */
#define SRAM2_SIZE (0x00008000UL) /*!< SRAM2 size (32 KBytes) */

#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)

#define FLASH_SIZE (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU))== 0x0000FFFFU)) ? (0x400U << 10U) : \
(((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
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Expand Up@@ -1163,7 +1163,7 @@ typedef struct
#define SRAM1_SIZE_MAX (0x00018000UL) /*!< maximum SRAM1 size (up to 96 KBytes) */
#define SRAM2_SIZE (0x00008000UL) /*!< SRAM2 size (32 KBytes) */

#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)

#define FLASH_SIZE (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU))== 0x0000FFFFU)) ? (0x400U << 10U) : \
(((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
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Expand Up@@ -1178,7 +1178,7 @@ typedef struct
#define SRAM1_SIZE_MAX (0x00018000UL) /*!< maximum SRAM1 size (up to 96 KBytes) */
#define SRAM2_SIZE (0x00008000UL) /*!< SRAM2 size (32 KBytes) */

#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)

#define FLASH_SIZE (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU))== 0x0000FFFFU)) ? (0x400U << 10U) : \
(((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
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Expand Up@@ -1218,7 +1218,7 @@ typedef struct
#define SRAM1_SIZE_MAX (0x00040000UL) /*!< maximum SRAM1 size (up to 256 KBytes) */
#define SRAM2_SIZE (0x00010000UL) /*!< SRAM2 size (64 KBytes) */

#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)

#define FLASH_SIZE (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU))== 0x0000FFFFU)) ? (0x400U << 10U) : \
(((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
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Expand Up@@ -1276,7 +1276,7 @@ typedef struct
#define SRAM1_SIZE_MAX (0x00040000UL) /*!< maximum SRAM1 size (up to 256 KBytes) */
#define SRAM2_SIZE (0x00010000UL) /*!< SRAM2 size (64 KBytes) */

#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)

#define FLASH_SIZE (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU))== 0x0000FFFFU)) ? (0x400U << 10U) : \
(((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
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Expand Up@@ -1375,7 +1375,7 @@ typedef struct
#define SRAM2_SIZE (0x00010000UL) /*!< SRAM2 size (64 KBytes) */
#define SRAM3_SIZE (0x00020000UL) /*!< SRAM3 size (128 KBytes) */

#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)

#define FLASH_SIZE (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU))== 0x0000FFFFU)) ? (0x400U << 10U) : \
(((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
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Expand Up@@ -1422,7 +1422,7 @@ typedef struct
#define SRAM2_SIZE (0x00010000UL) /*!< SRAM2 size (64 KBytes) */
#define SRAM3_SIZE (0x00020000UL) /*!< SRAM3 size (128 KBytes) */

#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)

#define FLASH_SIZE (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU))== 0x0000FFFFU)) ? (0x400U << 10U) : \
(((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
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Expand Up@@ -1249,7 +1249,7 @@ typedef struct
#define SRAM2_SIZE (0x00010000UL) /*!< SRAM2 size (64 KBytes) */
#define SRAM3_SIZE (0x00060000UL) /*!< SRAM3 size (384 KBytes) */

#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)

#define FLASH_SIZE (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x800U << 10U) : \
(((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
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Expand Up@@ -1326,7 +1326,7 @@ typedef struct
#define SRAM2_SIZE (0x00010000UL) /*!< SRAM2 size (64 KBytes) */
#define SRAM3_SIZE (0x00060000UL) /*!< SRAM3 size (384 KBytes) */

#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)

#define FLASH_SIZE (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x800U << 10U) : \
(((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
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Expand Up@@ -567,7 +567,7 @@ typedef struct
uint32_t RESERVED7[7]; /*!< Reserved, 0x11C - 0x137 */
__IO uint32_t VMCCR; /*!< DSI Host Video Mode Current Configuration Register, Address offset: 0x138 */
__IO uint32_t VPCCR; /*!< DSI Host Video Packet Current Configuration Register, Address offset: 0x13C */
__IO uint32_t VCCCR; /*!< DSI Host VideoChunksCurrent Configuration Register, Address offset: 0x140 */
__IO uint32_t VCCCR; /*!< DSI Host VideoChunks Current Configuration Register, Address offset: 0x140 */
__IO uint32_t VNPCCR; /*!< DSI Host Video Null Packet Current Configuration Register, Address offset: 0x144 */
__IO uint32_t VHSACCR; /*!< DSI Host Video HSA Current Configuration Register, Address offset: 0x148 */
__IO uint32_t VHBPCCR; /*!< DSI Host Video HBP Current Configuration Register, Address offset: 0x14C */
Expand DownExpand Up@@ -1406,7 +1406,7 @@ typedef struct
#define SRAM2_SIZE (0x00010000UL) /*!< SRAM2 size (64 KBytes) */
#define SRAM3_SIZE (0x00060000UL) /*!< SRAM3 size (384 KBytes) */

#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)

#define FLASH_SIZE (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x800U << 10U) : \
(((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
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Expand Up@@ -1307,7 +1307,7 @@ typedef struct
#define SRAM2_SIZE (0x00010000UL) /*!< SRAM2 size (64 KBytes) */
#define SRAM3_SIZE (0x00060000UL) /*!< SRAM3 size (384 KBytes) */

#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)

#define FLASH_SIZE (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x800U << 10U) : \
(((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
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Expand Up@@ -1384,7 +1384,7 @@ typedef struct
#define SRAM2_SIZE (0x00010000UL) /*!< SRAM2 size (64 KBytes) */
#define SRAM3_SIZE (0x00060000UL) /*!< SRAM3 size (384 KBytes) */

#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)

#define FLASH_SIZE (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x800U << 10U) : \
(((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
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Expand Up@@ -568,7 +568,7 @@ typedef struct
uint32_t RESERVED7[7]; /*!< Reserved, 0x11C - 0x137 */
__IO uint32_t VMCCR; /*!< DSI Host Video Mode Current Configuration Register, Address offset: 0x138 */
__IO uint32_t VPCCR; /*!< DSI Host Video Packet Current Configuration Register, Address offset: 0x13C */
__IO uint32_t VCCCR; /*!< DSI Host VideoChunksCurrent Configuration Register, Address offset: 0x140 */
__IO uint32_t VCCCR; /*!< DSI Host VideoChunks Current Configuration Register, Address offset: 0x140 */
__IO uint32_t VNPCCR; /*!< DSI Host Video Null Packet Current Configuration Register, Address offset: 0x144 */
__IO uint32_t VHSACCR; /*!< DSI Host Video HSA Current Configuration Register, Address offset: 0x148 */
__IO uint32_t VHBPCCR; /*!< DSI Host Video HBP Current Configuration Register, Address offset: 0x14C */
Expand DownExpand Up@@ -1464,7 +1464,7 @@ typedef struct
#define SRAM2_SIZE (0x00010000UL) /*!< SRAM2 size (64 KBytes) */
#define SRAM3_SIZE (0x00060000UL) /*!< SRAM3 size (384 KBytes) */

#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)

#define FLASH_SIZE (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x800U << 10U) : \
(((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
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Expand Up@@ -106,7 +106,7 @@
*/
#define __STM32L4_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */
#define __STM32L4_CMSIS_VERSION_SUB1 (0x07) /*!< [23:16] sub1 version */
#define __STM32L4_CMSIS_VERSION_SUB2 (0x03) /*!< [15:8] sub2 version */
#define __STM32L4_CMSIS_VERSION_SUB2 (0x04) /*!< [15:8] sub2 version */
#define __STM32L4_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32L4_CMSIS_VERSION ((__STM32L4_CMSIS_VERSION_MAIN << 24)\
|(__STM32L4_CMSIS_VERSION_SUB1 << 16)\
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11 changes: 10 additions & 1 deletionsystem/Drivers/CMSIS/Device/ST/STM32L4xx/README.md
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Expand Up@@ -27,7 +27,16 @@ Details about the content of this release are available in the release note [her

## Compatibility information

It is **crucial** that you use a consistent set of versions for the CMSIS Core - CMSIS Device, as mentioned in [this](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/STM32CubeL4/blob/master/Release_Notes.html) release note.
In this table, you can find the successive versions of this CMSIS Device component, in-line with the corresponding versions of the full MCU package:

CMSIS Device L4 | CMSIS Core | Was delivered in the full MCU package
--------------- | ---------- | -------------------------------------
Tag v1.5.1 | Tag v5.4.0_cm4 | Tag v1.14.0 (and following, if any, till next CMSIS tag)
Tag v1.6.0 | Tag v5.4.0_cm4 | Tag v1.15.0 (and following, if any, till next CMSIS tag)
Tag v1.6.1 | Tag v5.4.0_cm4 | Tag v1.15.1 (and following, if any, till next CMSIS tag)
Tag v1.7.0 | Tag v5.6.0_cm4 | Tag v1.16.0 (and following, if any, till next CMSIS tag)
Tag v1.7.1 | Tag v5.6.0_cm4 | Tag v1.17.0 (and following, if any, till next CMSIS tag)
Tag v1.7.2 | Tag v5.6.0_cm4 | Tag v1.17.1 (and following, if any, till next CMSIS tag)

The full **STM32CubeL4** MCU package is available [here](https://github.com/STMicroelectronics/STM32CubeL4).

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