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Update to latest STM32CubeF3 v1.11.4#1968

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Merged
fpistm merged 2 commits intostm32duino:mainfromfpistm:CbeF3_Update
Mar 9, 2023
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43 changes: 22 additions & 21 deletionssystem/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f301x8.h
View file
Open in desktop
Original file line numberDiff line numberDiff line change
Expand Up@@ -12,13 +12,12 @@
******************************************************************************
* @attention
*
*<h2><center>&copy;Copyright (c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
Expand DownExpand Up@@ -571,6 +570,10 @@ typedef struct
__IO uint32_t SR; /*!< WWDG Status register, Address offset: 0x08 */
} WWDG_TypeDef;

/**
* @}
*/

/** @addtogroup Peripheral_memory_map
* @{
*/
Expand DownExpand Up@@ -746,7 +749,7 @@ typedef struct
#define ADC5_V1_1 /*!< ADC IP version */

/*
* @brief Specific device feature definitions (not present on all devices in the STM32F3serie)
* @brief Specific device feature definitions (not present on all devices in the STM32F3series)
*/
/* Note: No specific macro feature on this device */

Expand DownExpand Up@@ -883,7 +886,7 @@ typedef struct

#define ADC_CFGR_ALIGN_Pos (5U)
#define ADC_CFGR_ALIGN_Msk (0x1UL << ADC_CFGR_ALIGN_Pos) /*!< 0x00000020 */
#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC dataalignement */
#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC dataalignment */

#define ADC_CFGR_EXTSEL_Pos (6U)
#define ADC_CFGR_EXTSEL_Msk (0xFUL << ADC_CFGR_EXTSEL_Pos) /*!< 0x000003C0 */
Expand DownExpand Up@@ -2241,7 +2244,7 @@ typedef struct
#define OPAMP2_CSR_TSTREF OPAMP2_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */
#define OPAMP2_CSR_OUTCAL_Pos (30U)
#define OPAMP2_CSR_OUTCAL_Msk (0x1UL << OPAMP2_CSR_OUTCAL_Pos) /*!< 0x40000000 */
#define OPAMP2_CSR_OUTCAL OPAMP2_CSR_OUTCAL_Msk /*!< OPAMPouput status flag */
#define OPAMP2_CSR_OUTCAL OPAMP2_CSR_OUTCAL_Msk /*!< OPAMPoutput status flag */
#define OPAMP2_CSR_LOCK_Pos (31U)
#define OPAMP2_CSR_LOCK_Msk (0x1UL << OPAMP2_CSR_LOCK_Pos) /*!< 0x80000000 */
#define OPAMP2_CSR_LOCK OPAMP2_CSR_LOCK_Msk /*!< OPAMP lock */
Expand DownExpand Up@@ -2303,7 +2306,7 @@ typedef struct
#define OPAMP_CSR_TSTREF OPAMP_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */
#define OPAMP_CSR_OUTCAL_Pos (30U)
#define OPAMP_CSR_OUTCAL_Msk (0x1UL << OPAMP_CSR_OUTCAL_Pos) /*!< 0x40000000 */
#define OPAMP_CSR_OUTCAL OPAMP_CSR_OUTCAL_Msk /*!< OPAMPouput status flag */
#define OPAMP_CSR_OUTCAL OPAMP_CSR_OUTCAL_Msk /*!< OPAMPoutput status flag */
#define OPAMP_CSR_LOCK_Pos (31U)
#define OPAMP_CSR_LOCK_Msk (0x1UL << OPAMP_CSR_LOCK_Pos) /*!< 0x80000000 */
#define OPAMP_CSR_LOCK OPAMP_CSR_LOCK_Msk /*!< OPAMP lock */
Expand DownExpand Up@@ -2356,7 +2359,7 @@ typedef struct
/******************************************************************************/

/*
* @brief Specific device feature definitions (not present on all devices in the STM32F3serie)
* @brief Specific device feature definitions (not present on all devices in the STM32F3series)
*/
/* Note: No specific macro feature on this device */

Expand DownExpand Up@@ -5348,7 +5351,7 @@ typedef struct
/* */
/******************************************************************************/
/*
* @brief Specific device feature definitions (not present on all devices in the STM32F3serie)
* @brief Specific device feature definitions (not present on all devices in the STM32F3series)
*/
#define RTC_TAMPER1_SUPPORT /*!< TAMPER 1 feature support */
#define RTC_TAMPER2_SUPPORT /*!< TAMPER 2 feature support */
Expand DownExpand Up@@ -6030,7 +6033,7 @@ typedef struct
/******************************************************************************/

/*
* @brief Specific device feature definitions (not present on all devices in the STM32F3serie)
* @brief Specific device feature definitions (not present on all devices in the STM32F3series)
*/
#define SPI_I2S_SUPPORT /*!< I2S support */
#define SPI_I2S_FULLDUPLEX_SUPPORT /*!< I2S Full-Duplex support */
Expand DownExpand Up@@ -7138,11 +7141,11 @@ typedef struct
#define TIM_DMAR_DMAB TIM_DMAR_DMAB_Msk /*!<DMA register for burst accesses */

/******************* Bit definition for TIM16_OR register *********************/
#define TIM16_OR_TI1_RMP_Pos (6U)
#define TIM16_OR_TI1_RMP_Msk (0x3UL << TIM16_OR_TI1_RMP_Pos) /*!<0x000000C0 */
#define TIM16_OR_TI1_RMP_Pos (0U)
#define TIM16_OR_TI1_RMP_Msk (0x3UL << TIM16_OR_TI1_RMP_Pos) /*!<0x00000003 */
#define TIM16_OR_TI1_RMP TIM16_OR_TI1_RMP_Msk /*!<TI1_RMP[1:0] bits (TIM16 Input 1 remap) */
#define TIM16_OR_TI1_RMP_0 (0x1UL << TIM16_OR_TI1_RMP_Pos) /*!<0x00000040 */
#define TIM16_OR_TI1_RMP_1 (0x2UL << TIM16_OR_TI1_RMP_Pos) /*!<0x00000080 */
#define TIM16_OR_TI1_RMP_0 (0x1UL << TIM16_OR_TI1_RMP_Pos) /*!<0x00000001 */
#define TIM16_OR_TI1_RMP_1 (0x2UL << TIM16_OR_TI1_RMP_Pos) /*!<0x00000002 */

/******************* Bit definition for TIM1_OR register *********************/
#define TIM1_OR_ETR_RMP_Pos (0U)
Expand DownExpand Up@@ -7740,7 +7743,7 @@ typedef struct
/******************************************************************************/

/*
* @brief Specific device feature definitions (not present on all devices in the STM32F3serie)
* @brief Specific device feature definitions (not present on all devices in the STM32F3series)
*/

/* Support of 7 bits data length feature */
Expand DownExpand Up@@ -8612,8 +8615,6 @@ typedef struct
* @}
*/

/**
/**
* @}
*/

/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
35 changes: 18 additions & 17 deletionssystem/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h
View file
Open in desktop
Original file line numberDiff line numberDiff line change
Expand Up@@ -12,13 +12,12 @@
******************************************************************************
* @attention
*
*<h2><center>&copy;Copyright (c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
Expand DownExpand Up@@ -675,6 +674,10 @@ typedef struct
__IO uint32_t SR; /*!< WWDG Status register, Address offset: 0x08 */
} WWDG_TypeDef;

/**
* @}
*/

/** @addtogroup Peripheral_memory_map
* @{
*/
Expand DownExpand Up@@ -855,7 +858,7 @@ typedef struct
#define ADC5_V1_1 /*!< ADC IP version */

/*
* @brief Specific device feature definitions (not present on all devices in the STM32F3serie)
* @brief Specific device feature definitions (not present on all devices in the STM32F3series)
*/
/* Note: No specific macro feature on this device */

Expand DownExpand Up@@ -992,7 +995,7 @@ typedef struct

#define ADC_CFGR_ALIGN_Pos (5U)
#define ADC_CFGR_ALIGN_Msk (0x1UL << ADC_CFGR_ALIGN_Pos) /*!< 0x00000020 */
#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC dataalignement */
#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC dataalignment */

#define ADC_CFGR_EXTSEL_Pos (6U)
#define ADC_CFGR_EXTSEL_Msk (0xFUL << ADC_CFGR_EXTSEL_Pos) /*!< 0x000003C0 */
Expand DownExpand Up@@ -2350,7 +2353,7 @@ typedef struct
#define OPAMP2_CSR_TSTREF OPAMP2_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */
#define OPAMP2_CSR_OUTCAL_Pos (30U)
#define OPAMP2_CSR_OUTCAL_Msk (0x1UL << OPAMP2_CSR_OUTCAL_Pos) /*!< 0x40000000 */
#define OPAMP2_CSR_OUTCAL OPAMP2_CSR_OUTCAL_Msk /*!< OPAMPouput status flag */
#define OPAMP2_CSR_OUTCAL OPAMP2_CSR_OUTCAL_Msk /*!< OPAMPoutput status flag */
#define OPAMP2_CSR_LOCK_Pos (31U)
#define OPAMP2_CSR_LOCK_Msk (0x1UL << OPAMP2_CSR_LOCK_Pos) /*!< 0x80000000 */
#define OPAMP2_CSR_LOCK OPAMP2_CSR_LOCK_Msk /*!< OPAMP lock */
Expand DownExpand Up@@ -2412,7 +2415,7 @@ typedef struct
#define OPAMP_CSR_TSTREF OPAMP_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */
#define OPAMP_CSR_OUTCAL_Pos (30U)
#define OPAMP_CSR_OUTCAL_Msk (0x1UL << OPAMP_CSR_OUTCAL_Pos) /*!< 0x40000000 */
#define OPAMP_CSR_OUTCAL OPAMP_CSR_OUTCAL_Msk /*!< OPAMPouput status flag */
#define OPAMP_CSR_OUTCAL OPAMP_CSR_OUTCAL_Msk /*!< OPAMPoutput status flag */
#define OPAMP_CSR_LOCK_Pos (31U)
#define OPAMP_CSR_LOCK_Msk (0x1UL << OPAMP_CSR_LOCK_Pos) /*!< 0x80000000 */
#define OPAMP_CSR_LOCK OPAMP_CSR_LOCK_Msk /*!< OPAMP lock */
Expand DownExpand Up@@ -5943,7 +5946,7 @@ typedef struct
/******************************************************************************/

/*
* @brief Specific device feature definitions (not present on all devices in the STM32F3serie)
* @brief Specific device feature definitions (not present on all devices in the STM32F3series)
*/
/* Note: No specific macro feature on this device */

Expand DownExpand Up@@ -8976,7 +8979,7 @@ typedef struct
/* */
/******************************************************************************/
/*
* @brief Specific device feature definitions (not present on all devices in the STM32F3serie)
* @brief Specific device feature definitions (not present on all devices in the STM32F3series)
*/
#define RTC_TAMPER1_SUPPORT /*!< TAMPER 1 feature support */
#define RTC_TAMPER2_SUPPORT /*!< TAMPER 2 feature support */
Expand DownExpand Up@@ -9658,7 +9661,7 @@ typedef struct
/******************************************************************************/

/*
* @brief Specific device feature definitions (not present on all devices in the STM32F3serie)
* @brief Specific device feature definitions (not present on all devices in the STM32F3series)
*/
#define SPI_I2S_SUPPORT /*!< I2S support */
#define SPI_I2S_FULLDUPLEX_SUPPORT /*!< I2S Full-Duplex support */
Expand DownExpand Up@@ -11371,7 +11374,7 @@ typedef struct
/******************************************************************************/

/*
* @brief Specific device feature definitions (not present on all devices in the STM32F3serie)
* @brief Specific device feature definitions (not present on all devices in the STM32F3series)
*/

/* Support of 7 bits data length feature */
Expand DownExpand Up@@ -12385,8 +12388,6 @@ typedef struct
* @}
*/

/**
/**
* @}
*/

/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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