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Commitf5ebdaf

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[L5] new system cortex M33 Device Peripheral Access Layer
Signed-off-by: Francois Ramu <francois.ramu@st.com>
1 parentd0c4ac4 commitf5ebdaf

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‎system/STM32L5xx/stm32l5xx_hal_conf.h

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/* STM32L5xx specific HAL configuration options. */
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#if__has_include("hal_conf_custom.h")
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#include"hal_conf_custom.h"
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#include"hal_conf_custom.h"
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#else
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#if__has_include("hal_conf_extra.h")
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#include"hal_conf_extra.h"
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#endif
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#include"stm32l5xx_hal_conf_default.h"
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#if__has_include("hal_conf_extra.h")
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#include"hal_conf_extra.h"
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#endif
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#include"stm32l5xx_hal_conf_default.h"
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#endif
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#endif/* __STM32L5xx_HAL_CONF_H */

‎system/STM32L5xx/system_stm32l5xx.c

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/**
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******************************************************************************
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* @file system_stm32l5xx_ns.c
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* @author MCD Application Team
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* @brief CMSIS Cortex-M33 Device Peripheral Access Layer System Source File
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* to be used in non-secure application when the system implements
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* the TrustZone-M security.
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*
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* This file provides two functions and one global variable to be called from
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* user application:
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* - SystemInit(): This function is called at non-secure startup before
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* branch to non-secure main program.
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* This call is made inside the "startup_stm32l5xx.s" file.
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*
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* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
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* by the user application to setup the SysTick
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* timer or configure other parameters.
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*
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* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
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* be called whenever the core clock is changed
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* during program execution.
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*
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* After each device reset the MSI (4 MHz) is used as system clock source.
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* Then SystemInit() function is called, in "startup_stm32l5xx.s" file, to
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* configure the system clock before to branch to main secure program.
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* Later, when non-secure SystemInit() function is called, in "startup_stm32l5xx.s"
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* file, the system clock may have been updated from reset value by the main
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* secure program.
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*
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******************************************************************************
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* @attention
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*
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* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under Apache License, Version 2.0,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/Apache-2.0
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*
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******************************************************************************
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*/
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/** @addtogroup CMSIS
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* @{
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*/
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/** @addtogroup STM32L5xx_System
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* @{
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*/
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/** @addtogroup STM32L5xx_System_Private_Includes
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* @{
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*/
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#include"stm32l5xx.h"
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/**
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* @}
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*/
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/** @addtogroup STM32L5xx_System_Private_TypesDefinitions
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* @{
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*/
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/**
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* @}
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*/
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/** @addtogroup STM32L5xx_System_Private_Defines
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* @{
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*/
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#if !defined (HSE_VALUE)
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#defineHSE_VALUE 16000000U/*!< Value of the External oscillator in Hz */
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#endif/* HSE_VALUE */
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#if !defined (MSI_VALUE)
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#defineMSI_VALUE 4000000U/*!< Value of the Internal oscillator in Hz*/
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#endif/* MSI_VALUE */
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#if !defined (HSI_VALUE)
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#defineHSI_VALUE 16000000U/*!< Value of the Internal oscillator in Hz*/
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#endif/* HSI_VALUE */
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#if !defined (LSI_VALUE)
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#defineLSI_VALUE 32000U/*!< Value of the Internal oscillator in Hz*/
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#endif/* LSI_VALUE */
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/* Note: Following vector table addresses must be defined in line with linker
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configuration. */
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/*!< Uncomment the following line if you need to relocate the vector table
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anywhere in Flash or Sram, else the vector table is kept at the automatic
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remap of boot address selected */
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/* #define USER_VECT_TAB_ADDRESS */
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#if defined(USER_VECT_TAB_ADDRESS)
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/*!< Uncomment the following line if you need to relocate your vector Table
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in Sram else user remap will be done in Flash. */
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/* #define VECT_TAB_SRAM */
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#if defined(VECT_TAB_SRAM)
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#defineVECT_TAB_BASE_ADDRESS SRAM1_BASE_NS/*!< Vector Table base address field.
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This value must be a multiple of 0x200. */
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#defineVECT_TAB_OFFSET 0x00018000U/*!< Vector Table base offset field.
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This value must be a multiple of 0x200. */
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#else
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#defineVECT_TAB_BASE_ADDRESS FLASH_BASE_NS/*!< Vector Table base address field.
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This value must be a multiple of 0x200. */
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#defineVECT_TAB_OFFSET 0x00040000U/*!< Vector Table base offset field.
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This value must be a multiple of 0x200. */
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#endif/* VECT_TAB_SRAM */
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#endif/* USER_VECT_TAB_ADDRESS */
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/******************************************************************************/
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/**
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* @}
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*/
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/** @addtogroup STM32L5xx_System_Private_Macros
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* @{
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*/
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/**
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* @}
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*/
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/** @addtogroup STM32L5xx_System_Private_Variables
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* @{
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*/
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/* The SystemCoreClock variable is updated in three ways:
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1) by calling CMSIS function SystemCoreClockUpdate()
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2) by calling HAL API function HAL_RCC_GetHCLKFreq()
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3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
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Note: If you use this function to configure the system clock; then there
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is no need to call the 2 first functions listed above, since SystemCoreClock
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variable is updated automatically.
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*/
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uint32_tSystemCoreClock=4000000U;
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constuint8_tAHBPrescTable[16]= {0U,0U,0U,0U,0U,0U,0U,0U,1U,2U,3U,4U,6U,7U,8U,9U};
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constuint8_tAPBPrescTable[8]= {0U,0U,0U,0U,1U,2U,3U,4U};
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constuint32_tMSIRangeTable[16]= {100000U,200000U,400000U,800000U,1000000U,2000000U, \
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4000000U,8000000U,16000000U,24000000U,32000000U,48000000U, \
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0U,0U,0U,0U};/* MISRAC-2012: 0U for unexpected value */
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/**
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* @}
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*/
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/** @addtogroup STM32L5xx_System_Private_FunctionPrototypes
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* @{
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*/
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/**
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* @}
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*/
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/** @addtogroup STM32L5xx_System_Private_Functions
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* @{
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*/
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/**
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* @brief Setup the microcontroller system.
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* @retval None
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*/
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voidSystemInit(void)
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{
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/* Vector table location and FPU setup done by secure application */
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/* Configure the Vector Table location -------------------------------------*/
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#if defined(USER_VECT_TAB_ADDRESS)
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SCB->VTOR=VECT_TAB_BASE_ADDRESS |VECT_TAB_OFFSET;
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#endif
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/* Non-secure main application shall call SystemCoreClockUpdate() to update */
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/* the SystemCoreClock variable to insure non-secure application relies on */
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/* the initial clock reference set by secure application. */
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}
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/**
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* @brief Update SystemCoreClock variable according to Clock Register Values.
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* The SystemCoreClock variable contains the core clock (HCLK), it can
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* be used by the user application to setup the SysTick timer or configure
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* other parameters.
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*
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* @note From the non-secure application, the SystemCoreClock value is
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* retrieved from the secure domain via a Non-Secure Callable function
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* since the RCC peripheral may be protected with security attributes
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* that prevent to compute the SystemCoreClock variable from the RCC
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* peripheral registers.
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*
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* @note Each time the core clock (HCLK) changes, this function must be called
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* to update SystemCoreClock variable value. Otherwise, any configuration
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* based on this variable will be incorrect.
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*
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* @note - The system frequency computed by this function is not the real
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* frequency in the chip. It is calculated based on the predefined
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* constant and the selected clock source:
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*
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* - If SYSCLK source is MSI, SystemCoreClock will contain the MSI_VALUE(*)
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*
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* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
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*
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* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
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*
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* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
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* or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL factors.
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*
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* (*) MSI_VALUE is a constant defined in stm32l5xx_hal.h file (default value
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* 4 MHz) but the real value may vary depending on the variations
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* in voltage and temperature.
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*
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* (**) HSI_VALUE is a constant defined in stm32l5xx_hal.h file (default value
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* 16 MHz) but the real value may vary depending on the variations
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* in voltage and temperature.
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*
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* (***) HSE_VALUE is a constant defined in stm32l5xx_hal.h file (default value
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* 8 MHz), user has to ensure that HSE_VALUE is same as the real
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* frequency of the crystal used. Otherwise, this function may
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* have wrong result.
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*
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* - The result of this function could be not correct when using fractional
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* value for HSE crystal.
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*
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* @retval None
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*/
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voidSystemCoreClockUpdate(void)
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{
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/* Get the SystemCoreClock value from the secure domain */
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SystemCoreClock=SECURE_SystemCoreClockUpdate();
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}
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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