|
| 1 | +/* |
| 2 | +****************************************************************************** |
| 3 | +** |
| 4 | +** @file : LinkerScript.ld |
| 5 | +** |
| 6 | +** @author : Auto-generated by STM32CubeIDE |
| 7 | +** |
| 8 | +** @brief : Linker script for F722R(C-E)T/F730R8T/F732RET Device from |
| 9 | +** STM32F7 series |
| 10 | +** |
| 11 | +** Set heap size, stack size and stack location according |
| 12 | +** to application requirements. |
| 13 | +** |
| 14 | +** Set memory bank area and size if external memory is used |
| 15 | +** |
| 16 | +** Target : STMicroelectronics STM32 |
| 17 | +** |
| 18 | +** Distribution: The file is distributed as is, without any warranty |
| 19 | +** of any kind. |
| 20 | +** |
| 21 | +****************************************************************************** |
| 22 | +** @attention |
| 23 | +** |
| 24 | +** Copyright (c) 2022 STMicroelectronics. |
| 25 | +** All rights reserved. |
| 26 | +** |
| 27 | +** This software is licensed under terms that can be found in the LICENSE file |
| 28 | +** in the root directory of this software component. |
| 29 | +** If no LICENSE file comes with this software, it is provided AS-IS. |
| 30 | +** |
| 31 | +****************************************************************************** |
| 32 | +*/ |
| 33 | + |
| 34 | +/* Entry Point */ |
| 35 | +ENTRY(Reset_Handler) |
| 36 | + |
| 37 | +/* Highest address of the user mode stack */ |
| 38 | +_estack =ORIGIN(RAM) +LENGTH(RAM); /* end of "RAM" Ram type memory */ |
| 39 | + |
| 40 | +_Min_Heap_Size = 0x200; /* required amount of heap */ |
| 41 | +_Min_Stack_Size = 0x400; /* required amount of stack */ |
| 42 | + |
| 43 | +/* Memories definition */ |
| 44 | +MEMORY |
| 45 | +{ |
| 46 | +RAM (xrw) :ORIGIN = 0x20000000,LENGTH = LD_MAX_DATA_SIZE |
| 47 | +FLASH (rx) :ORIGIN = 0x8000000 + LD_FLASH_OFFSET,LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET |
| 48 | +} |
| 49 | + |
| 50 | +/* Sections */ |
| 51 | +SECTIONS |
| 52 | +{ |
| 53 | + /* The startup code into "FLASH" Rom type memory */ |
| 54 | + .isr_vector : |
| 55 | + { |
| 56 | + . =ALIGN(4); |
| 57 | + KEEP(*(.isr_vector)) /* Startup code */ |
| 58 | + . =ALIGN(4); |
| 59 | + } >FLASH |
| 60 | + |
| 61 | + /* The program code and other data into "FLASH" Rom type memory */ |
| 62 | + .text : |
| 63 | + { |
| 64 | + . =ALIGN(4); |
| 65 | + *(.text) /* .text sections (code) */ |
| 66 | + *(.text*) /* .text* sections (code) */ |
| 67 | + *(.glue_7) /* glue arm to thumb code */ |
| 68 | + *(.glue_7t) /* glue thumb to arm code */ |
| 69 | + *(.eh_frame) |
| 70 | + |
| 71 | + KEEP (*(.init)) |
| 72 | + KEEP (*(.fini)) |
| 73 | + |
| 74 | + . =ALIGN(4); |
| 75 | + _etext = .; /* define a global symbols at end of code */ |
| 76 | + } >FLASH |
| 77 | + |
| 78 | + /* Constant data into "FLASH" Rom type memory */ |
| 79 | + .rodata : |
| 80 | + { |
| 81 | + . =ALIGN(4); |
| 82 | + *(.rodata) /* .rodata sections (constants, strings, etc.) */ |
| 83 | + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ |
| 84 | + . =ALIGN(4); |
| 85 | + } >FLASH |
| 86 | + |
| 87 | + .ARM.extab : { |
| 88 | + . =ALIGN(4); |
| 89 | + *(.ARM.extab* .gnu.linkonce.armextab.*) |
| 90 | + . =ALIGN(4); |
| 91 | + } >FLASH |
| 92 | + |
| 93 | + .ARM : { |
| 94 | + . =ALIGN(4); |
| 95 | + __exidx_start = .; |
| 96 | + *(.ARM.exidx*) |
| 97 | + __exidx_end = .; |
| 98 | + . =ALIGN(4); |
| 99 | + } >FLASH |
| 100 | + |
| 101 | + .preinit_array : |
| 102 | + { |
| 103 | + . =ALIGN(4); |
| 104 | +PROVIDE_HIDDEN (__preinit_array_start = .); |
| 105 | + KEEP (*(.preinit_array*)) |
| 106 | +PROVIDE_HIDDEN (__preinit_array_end = .); |
| 107 | + . =ALIGN(4); |
| 108 | + } >FLASH |
| 109 | + |
| 110 | + .init_array : |
| 111 | + { |
| 112 | + . =ALIGN(4); |
| 113 | +PROVIDE_HIDDEN (__init_array_start = .); |
| 114 | + KEEP (*(SORT(.init_array.*))) |
| 115 | + KEEP (*(.init_array*)) |
| 116 | +PROVIDE_HIDDEN (__init_array_end = .); |
| 117 | + . =ALIGN(4); |
| 118 | + } >FLASH |
| 119 | + |
| 120 | + .fini_array : |
| 121 | + { |
| 122 | + . =ALIGN(4); |
| 123 | +PROVIDE_HIDDEN (__fini_array_start = .); |
| 124 | + KEEP (*(SORT(.fini_array.*))) |
| 125 | + KEEP (*(.fini_array*)) |
| 126 | +PROVIDE_HIDDEN (__fini_array_end = .); |
| 127 | + . =ALIGN(4); |
| 128 | + } >FLASH |
| 129 | + |
| 130 | + /* Used by the startup to initialize data */ |
| 131 | + _sidata =LOADADDR(.data); |
| 132 | + |
| 133 | + /* Initialized data sections into "RAM" Ram type memory */ |
| 134 | + .data : |
| 135 | + { |
| 136 | + . =ALIGN(4); |
| 137 | + _sdata = .; /* create a global symbol at data start */ |
| 138 | + *(.data) /* .data sections */ |
| 139 | + *(.data*) /* .data* sections */ |
| 140 | + *(.RamFunc) /* .RamFunc sections */ |
| 141 | + *(.RamFunc*) /* .RamFunc* sections */ |
| 142 | + |
| 143 | + . =ALIGN(4); |
| 144 | + _edata = .; /* define a global symbol at data end */ |
| 145 | + |
| 146 | + } >RAM AT> FLASH |
| 147 | + |
| 148 | + /* Uninitialized data section into "RAM" Ram type memory */ |
| 149 | + . =ALIGN(4); |
| 150 | + .bss : |
| 151 | + { |
| 152 | + /* This is used by the startup in order to initialize the .bss section */ |
| 153 | + _sbss = .; /* define a global symbol at bss start */ |
| 154 | + __bss_start__ = _sbss; |
| 155 | + *(.bss) |
| 156 | + *(.bss*) |
| 157 | + *(COMMON) |
| 158 | + |
| 159 | + . =ALIGN(4); |
| 160 | + _ebss = .; /* define a global symbol at bss end */ |
| 161 | + __bss_end__ = _ebss; |
| 162 | + } >RAM |
| 163 | + |
| 164 | + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ |
| 165 | + ._user_heap_stack : |
| 166 | + { |
| 167 | + . =ALIGN(8); |
| 168 | +PROVIDE ( end = . ); |
| 169 | +PROVIDE ( _end = . ); |
| 170 | + . = . + _Min_Heap_Size; |
| 171 | + . = . + _Min_Stack_Size; |
| 172 | + . =ALIGN(8); |
| 173 | + } >RAM |
| 174 | + |
| 175 | + /* Remove information from the compiler libraries */ |
| 176 | + /DISCARD/ : |
| 177 | + { |
| 178 | + libc.a ( * ) |
| 179 | + libm.a ( * ) |
| 180 | + libgcc.a ( * ) |
| 181 | + } |
| 182 | + |
| 183 | +.ARM.attributes 0 : { *(.ARM.attributes) } |
| 184 | +} |