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Commitb73d349

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system(WBA) update STM32WBAxx HAL Drivers to v1.3.0
Included in STM32CubeWBA FW v1.3.1Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
1 parent4782f07 commitb73d349

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45 files changed

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‎system/Drivers/STM32WBAxx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h‎

Lines changed: 35 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -548,6 +548,16 @@ extern "C" {
548548
#defineOB_SRAM134_RST_ERASE OB_SRAM_RST_ERASE
549549
#defineOB_SRAM134_RST_NOT_ERASE OB_SRAM_RST_NOT_ERASE
550550
#endif/* STM32U5 */
551+
#if defined(STM32U0)
552+
#defineOB_USER_nRST_STOP OB_USER_NRST_STOP
553+
#defineOB_USER_nRST_STDBY OB_USER_NRST_STDBY
554+
#defineOB_USER_nRST_SHDW OB_USER_NRST_SHDW
555+
#defineOB_USER_nBOOT_SEL OB_USER_NBOOT_SEL
556+
#defineOB_USER_nBOOT0 OB_USER_NBOOT0
557+
#defineOB_USER_nBOOT1 OB_USER_NBOOT1
558+
#defineOB_nBOOT0_RESET OB_NBOOT0_RESET
559+
#defineOB_nBOOT0_SET OB_NBOOT0_SET
560+
#endif/* STM32U0 */
551561

552562
/**
553563
* @}
@@ -1239,10 +1249,10 @@ extern "C" {
12391249
#defineRTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1
12401250
#defineRTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1
12411251

1242-
#if defined(STM32H5)
1252+
#if defined(STM32H5)|| defined(STM32H7RS)
12431253
#defineTAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
12441254
#defineTAMP_SECRETDEVICE_ERASE_BKP_SRAM TAMP_DEVICESECRETS_ERASE_BKPSRAM
1245-
#endif/* STM32H5 */
1255+
#endif/* STM32H5|| STM32H7RS*/
12461256

12471257
#if defined(STM32WBA)
12481258
#defineTAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
@@ -1254,10 +1264,10 @@ extern "C" {
12541264
#defineTAMP_SECRETDEVICE_ERASE_ALL TAMP_DEVICESECRETS_ERASE_ALL
12551265
#endif/* STM32WBA */
12561266

1257-
#if defined(STM32H5)|| defined(STM32WBA)
1267+
#if defined(STM32H5)|| defined(STM32WBA)|| defined(STM32H7RS)
12581268
#defineTAMP_SECRETDEVICE_ERASE_DISABLE TAMP_DEVICESECRETS_ERASE_NONE
12591269
#defineTAMP_SECRETDEVICE_ERASE_ENABLE TAMP_SECRETDEVICE_ERASE_ALL
1260-
#endif/* STM32H5 || STM32WBA */
1270+
#endif/* STM32H5 || STM32WBA|| STM32H7RS*/
12611271

12621272
#if defined(STM32F7)
12631273
#defineRTC_TAMPCR_TAMPXE RTC_TAMPER_ENABLE_BITS_MASK
@@ -1595,7 +1605,7 @@ extern "C" {
15951605
#defineETH_MAC_SMALL_FIFO_RW_ACTIVE 0x00000006U/* MAC small FIFO read / write controllers active */
15961606
#defineETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE 0x00000001U/* MAC MII receive protocol engine active */
15971607

1598-
#defineETH_TxPacketConfig ETH_TxPacketConfig_t/* Transmit Packet Configuration structure definition */
1608+
#defineETH_TxPacketConfigETH_TxPacketConfigTypeDef/* Transmit Packet Configuration structure definition */
15991609

16001610
/**
16011611
* @}
@@ -1989,12 +1999,12 @@ extern "C" {
19891999
/** @defgroup HAL_RTC_Aliased_Functions HAL RTC Aliased Functions maintained for legacy purpose
19902000
* @{
19912001
*/
1992-
#if defined(STM32H5)|| defined(STM32WBA)
2002+
#if defined(STM32H5)|| defined(STM32WBA)|| defined(STM32H7RS)
19932003
#defineHAL_RTCEx_SetBoothardwareKey HAL_RTCEx_LockBootHardwareKey
19942004
#defineHAL_RTCEx_BKUPBlock_Enable HAL_RTCEx_BKUPBlock
19952005
#defineHAL_RTCEx_BKUPBlock_Disable HAL_RTCEx_BKUPUnblock
19962006
#defineHAL_RTCEx_Erase_SecretDev_Conf HAL_RTCEx_ConfigEraseDeviceSecrets
1997-
#endif/* STM32H5 || STM32WBA */
2007+
#endif/* STM32H5 || STM32WBA|| STM32H7RS*/
19982008

19992009
/**
20002010
* @}
@@ -2309,8 +2319,8 @@ extern "C" {
23092319
#define__HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
23102320
((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
23112321
__HAL_COMP_COMP6_EXTI_CLEAR_FLAG())
2312-
#endif
2313-
#if defined(STM32F302xE)|| defined(STM32F302xC)
2322+
#endif
2323+
#if defined(STM32F302xE)|| defined(STM32F302xC)
23142324
#define__HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
23152325
((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
23162326
((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
@@ -2343,8 +2353,8 @@ extern "C" {
23432353
((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
23442354
((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
23452355
__HAL_COMP_COMP6_EXTI_CLEAR_FLAG())
2346-
#endif
2347-
#if defined(STM32F303xE)|| defined(STM32F398xx)|| defined(STM32F303xC)|| defined(STM32F358xx)
2356+
#endif
2357+
#if defined(STM32F303xE)|| defined(STM32F398xx)|| defined(STM32F303xC)|| defined(STM32F358xx)
23482358
#define__HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
23492359
((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
23502360
((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() : \
@@ -2401,8 +2411,8 @@ extern "C" {
24012411
((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() : \
24022412
((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() : \
24032413
__HAL_COMP_COMP7_EXTI_CLEAR_FLAG())
2404-
#endif
2405-
#if defined(STM32F373xC)||defined(STM32F378xx)
2414+
#endif
2415+
#if defined(STM32F373xC)||defined(STM32F378xx)
24062416
#define__HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
24072417
__HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
24082418
#define__HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
@@ -2419,7 +2429,7 @@ extern "C" {
24192429
__HAL_COMP_COMP2_EXTI_GET_FLAG())
24202430
#define__HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
24212431
__HAL_COMP_COMP2_EXTI_CLEAR_FLAG())
2422-
#endif
2432+
#endif
24232433
#else
24242434
#define__HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
24252435
__HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
@@ -3644,8 +3654,12 @@ extern "C" {
36443654
#defineRCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK
36453655
#defineRCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2
36463656

3657+
#if defined(STM32U0)
3658+
#defineRCC_SYSCLKSOURCE_STATUS_PLLR RCC_SYSCLKSOURCE_STATUS_PLLCLK
3659+
#endif
3660+
36473661
#if defined(STM32L4)|| defined(STM32WB)|| defined(STM32G0)|| defined(STM32G4)|| defined(STM32L5)|| \
3648-
defined(STM32WL)|| defined(STM32C0)
3662+
defined(STM32WL)|| defined(STM32C0)|| defined(STM32H7RS)|| defined(STM32U0)
36493663
#defineRCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE
36503664
#else
36513665
#defineRCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
@@ -3747,8 +3761,10 @@ extern "C" {
37473761
#define__HAL_RCC_GET_DFSDM_SOURCE __HAL_RCC_GET_DFSDM1_SOURCE
37483762
#defineRCC_DFSDM1CLKSOURCE_PCLK RCC_DFSDM1CLKSOURCE_PCLK2
37493763
#defineRCC_SWPMI1CLKSOURCE_PCLK RCC_SWPMI1CLKSOURCE_PCLK1
3764+
#if !defined(STM32U0)
37503765
#defineRCC_LPTIM1CLKSOURCE_PCLK RCC_LPTIM1CLKSOURCE_PCLK1
37513766
#defineRCC_LPTIM2CLKSOURCE_PCLK RCC_LPTIM2CLKSOURCE_PCLK1
3767+
#endif
37523768

37533769
#defineRCC_DFSDM1AUDIOCLKSOURCE_I2SAPB1 RCC_DFSDM1AUDIOCLKSOURCE_I2S1
37543770
#defineRCC_DFSDM1AUDIOCLKSOURCE_I2SAPB2 RCC_DFSDM1AUDIOCLKSOURCE_I2S2
@@ -3894,7 +3910,7 @@ extern "C" {
38943910
*/
38953911
#if defined (STM32G0)|| defined (STM32L5)|| defined (STM32L412xx)|| defined (STM32L422xx)|| \
38963912
defined (STM32L4P5xx)|| defined (STM32L4Q5xx)|| defined (STM32G4)|| defined (STM32WL)|| defined (STM32U5)|| \
3897-
defined (STM32WBA)|| defined (STM32H5)|| defined (STM32C0)
3913+
defined (STM32WBA)|| defined (STM32H5)|| defined (STM32C0)|| defined (STM32H7RS)|| defined (STM32U0)
38983914
#else
38993915
#define__HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
39003916
#endif
@@ -4217,6 +4233,9 @@ extern "C" {
42174233
#define__HAL_TIM_GetCompare __HAL_TIM_GET_COMPARE
42184234

42194235
#defineTIM_BREAKINPUTSOURCE_DFSDM TIM_BREAKINPUTSOURCE_DFSDM1
4236+
4237+
#defineTIM_OCMODE_ASSYMETRIC_PWM1 TIM_OCMODE_ASYMMETRIC_PWM1
4238+
#defineTIM_OCMODE_ASSYMETRIC_PWM2 TIM_OCMODE_ASYMMETRIC_PWM2
42204239
/**
42214240
* @}
42224241
*/

‎system/Drivers/STM32WBAxx_HAL_Driver/Inc/stm32wbaxx_hal.h‎

Lines changed: 2 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -79,7 +79,7 @@ extern HAL_TickFreqTypeDef uwTickFreq;
7979
* @brief STM32WBAxx HAL Driver version number
8080
*/
8181
#define__STM32WBAxx_HAL_VERSION_MAIN (0x01U)/*!< [31:24] main version */
82-
#define__STM32WBAxx_HAL_VERSION_SUB1 (0x02U)/*!< [23:16] sub1 version */
82+
#define__STM32WBAxx_HAL_VERSION_SUB1 (0x03U)/*!< [23:16] sub1 version */
8383
#define__STM32WBAxx_HAL_VERSION_SUB2 (0x00U)/*!< [15:8] sub2 version */
8484
#define__STM32WBAxx_HAL_VERSION_RC (0x00U)/*!< [7:0] release candidate */
8585
#define__STM32WBAxx_HAL_VERSION ((__STM32WBAxx_HAL_VERSION_MAIN << 24U)\
@@ -423,15 +423,6 @@ extern HAL_TickFreqTypeDef uwTickFreq;
423423
* @}
424424
*/
425425

426-
/** @defgroup HAL_Private_Macros HAL Private Macros
427-
* @{
428-
*/
429-
#defineIS_TICKFREQ(FREQ) (((FREQ) == HAL_TICK_FREQ_10HZ) || \
430-
((FREQ) == HAL_TICK_FREQ_100HZ) || \
431-
((FREQ) == HAL_TICK_FREQ_1KHZ))
432-
/**
433-
* @}
434-
*/
435426
/* Exported functions --------------------------------------------------------*/
436427

437428
/** @addtogroup HAL_Exported_Functions
@@ -516,7 +507,6 @@ HAL_StatusTypeDef HAL_SYSCFG_GetLock(uint32_t *pItem);
516507
* @}
517508
*/
518509

519-
520510
/** @addtogroup HAL_Exported_Functions_Group6
521511
* @{
522512
*/
@@ -533,6 +523,7 @@ HAL_StatusTypeDef HAL_SYSCFG_GetConfigAttributes(uint32_t Item, uint32_t *pAttri
533523
* @}
534524
*/
535525

526+
536527
/**
537528
* @}
538529
*/

‎system/Drivers/STM32WBAxx_HAL_Driver/Inc/stm32wbaxx_hal_cortex.h‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -282,11 +282,15 @@ void HAL_SYSTICK_Callback(void);
282282

283283
voidHAL_MPU_Enable(uint32_tMPU_Control);
284284
voidHAL_MPU_Disable(void);
285+
voidHAL_MPU_EnableRegion(uint32_tRegionNumber);
286+
voidHAL_MPU_DisableRegion(uint32_tRegionNumber);
285287
voidHAL_MPU_ConfigRegion(MPU_Region_InitTypeDef*MPU_RegionInit);
286288
voidHAL_MPU_ConfigMemoryAttributes(MPU_Attributes_InitTypeDef*MPU_AttributesInit);
287289
#ifdefMPU_NS
288290
voidHAL_MPU_Enable_NS(uint32_tMPU_Control);
289291
voidHAL_MPU_Disable_NS(void);
292+
voidHAL_MPU_EnableRegion_NS(uint32_tRegionNumber);
293+
voidHAL_MPU_DisableRegion_NS(uint32_tRegionNumber);
290294
voidHAL_MPU_ConfigRegion_NS(MPU_Region_InitTypeDef*MPU_RegionInit);
291295
voidHAL_MPU_ConfigMemoryAttributes_NS(MPU_Attributes_InitTypeDef*MPU_AttributesInit);
292296
#endif/* MPU_NS */

‎system/Drivers/STM32WBAxx_HAL_Driver/Inc/stm32wbaxx_hal_flash.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1017,7 +1017,7 @@ HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
10171017
#if defined (__ARM_FEATURE_CMSE)&& (__ARM_FEATURE_CMSE==3U)
10181018
#defineIS_OB_BOOT_LOCK(VALUE) (((VALUE) == OB_BOOT_LOCK_DISABLE) || ((VALUE) == OB_BOOT_LOCK_ENABLE))
10191019

1020-
#defineIS_OB_WMSEC_CONFIG(CFG) ((((CFG) &0x7F1U) != 0U) && (((CFG) &0x1U) != 0U) && (((CFG) &0xFFFFF80EU) == 0U))
1020+
#defineIS_OB_WMSEC_CONFIG(CFG) ((((CFG) &0x1B4U) != 0U) && (((CFG) &0x4U) != 0U) && (((CFG) &0xFFFFFE4BU) == 0U))
10211021

10221022
#defineIS_OB_WMSEC_AREA_EXCLUSIVE(WMSEC) (((WMSEC) & OB_WMSEC_AREA1) != 0U)
10231023
#endif/* __ARM_FEATURE_CMSE */

‎system/Drivers/STM32WBAxx_HAL_Driver/Inc/stm32wbaxx_hal_i2c_ex.h‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -100,9 +100,9 @@ typedef struct
100100
* @{
101101
*/
102102
#if defined(I2C1)
103-
#defineI2C_TRIG_GRP1 (0x10000000U)/*!< Trigger Group for I2C1 */
104-
#endif/* I2C1 */
105-
#defineI2C_TRIG_GRP2 (0x20000000U)/*!< Trigger Group for I2C3 */
103+
#defineI2C_TRIG_GRP1 (0x10000000U)/*!< Trigger Group for I2C1, I2C2 */
104+
#endif/* I2C1, I2C2 */
105+
#defineI2C_TRIG_GRP2 (0x20000000U)/*!< Trigger Group for I2C3, I2C4 */
106106

107107
#if defined(I2C_TRIG_GRP1)
108108
#defineI2C_GRP1_GPDMA_CH0_TCF_TRG (uint32_t)(I2C_TRIG_GRP1 | (0x00000000U))

‎system/Drivers/STM32WBAxx_HAL_Driver/Inc/stm32wbaxx_hal_lptim.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -220,6 +220,7 @@ typedef struct
220220
__IOHAL_LPTIM_StateTypeDefState;/*!< LPTIM peripheral state */
221221

222222
__IOHAL_LPTIM_ChannelStateTypeDefChannelState[2];/*!< LPTIM channel operation state */
223+
223224
#if (USE_HAL_LPTIM_REGISTER_CALLBACKS==1)
224225
void (*MspInitCallback)(struct__LPTIM_HandleTypeDef*hlptim);/*!< LPTIM Base Msp Init Callback */
225226
void (*MspDeInitCallback)(struct__LPTIM_HandleTypeDef*hlptim);/*!< LPTIM Base Msp DeInit Callback */

‎system/Drivers/STM32WBAxx_HAL_Driver/Inc/stm32wbaxx_hal_pwr.h‎

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -375,7 +375,7 @@ typedef struct
375375
* (*) Feature not available on all devices of the family
376376
* @retval The state of __FLAG__ (TRUE or FALSE).
377377
*/
378-
#if defined(PWR_FLAG_REGPARDYV11)
378+
#if defined(PWR_WUCR1_WUPEN2)&& defined(PWR_WUCR1_WUPEN5)
379379
#if defined(PWR_FLAG_REGS)
380380
#define__HAL_PWR_GET_FLAG(__FLAG__)( \
381381
((__FLAG__) == PWR_FLAG_VOSRDY) ? (READ_BIT(PWR->VOSR, PWR_VOSR_VOSRDY)== \
@@ -423,8 +423,6 @@ typedef struct
423423
PWR_SVMSR_PVDO) : \
424424
((__FLAG__) == PWR_FLAG_REGPARDYVDDRFPA) ?(READ_BIT(PWR->RADIOSCR, PWR_RADIOSCR_REGPARDYVDDRFPA)== \
425425
PWR_RADIOSCR_REGPARDYVDDRFPA) : \
426-
((__FLAG__) == PWR_FLAG_REGPARDYV11) ?(READ_BIT(PWR->RADIOSCR, PWR_RADIOSCR_REGPARDYV11)== \
427-
PWR_RADIOSCR_REGPARDYV11) : \
428426
((__FLAG__) == PWR_WAKEUP_FLAG1) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF1) == \
429427
PWR_WUSR_WUF1) : \
430428
((__FLAG__) == PWR_WAKEUP_FLAG2) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF2) == \
@@ -466,7 +464,7 @@ typedef struct
466464
((__FLAG__) == PWR_WAKEUP_FLAG7) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF7) == \
467465
PWR_WUSR_WUF7) : \
468466
(READ_BIT(PWR->WUSR, PWR_WUSR_WUF8) == PWR_WUSR_WUF8))
469-
#endif/*defined(PWR_FLAG_REGPARDYV11) */
467+
#endif/*defined(PWR_WUCR1_WUPEN2) &&defined(PWR_WUCR1_WUPEN5) */
470468

471469
/** @brief Clear PWR flags.
472470
* @param __FLAG__ : Specifies the flag to clear.

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