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Commitb24801b

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dojyorinfpistm
andauthored
chore(variant): add generic H563RGT, H563RIT and H573RIT (#2424)
Co-authored-by: Frederic Pillon <frederic.pillon@st.com>Signed-off-by: Kazuki Ota <ota_droid@live.jp>
1 parent0f1ee4d commitb24801b

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4 files changed

+260
-2
lines changed

4 files changed

+260
-2
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‎README.md

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Original file line numberDiff line numberDiff line change
@@ -543,8 +543,10 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
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|:yellow_heart:| STM32H503KB| Generic Board|**2.8.1**||
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|:green_heart:| STM32H503RB| Generic Board|*2.7.0*||
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|:green_heart:| STM32H563IIKxQ| Generic Board|*2.6.0*||
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|:yellow_heart:| STM32H563RG<br>STM32H563RI| Generic Board|**2.8.1**||
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|:green_heart:| STM32H563ZG<br>STM32H563ZI| Generic Board|*2.6.0*||
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|:green_heart:| STM32H573IIKxQ| Generic Board|*2.6.0*||
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|:yellow_heart:| STM32H573RI| Generic Board|**2.8.1**||
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|:green_heart:| STM32H573ZI| Generic Board|*2.6.0*||
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###Generic STM32H7 boards

‎boards.txt

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@@ -8432,6 +8432,24 @@ GenH5.menu.pnum.GENERIC_H563IIKXQ.build.product_line=STM32H563xx
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GenH5.menu.pnum.GENERIC_H563IIKXQ.build.variant=STM32H5xx/H563IIKxQ_H573IIKxQ
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GenH5.menu.pnum.GENERIC_H563IIKXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H5xx/STM32H563.svd
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# Generic H563RGTx
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GenH5.menu.pnum.GENERIC_H563RGTX=Generic H563RGTx
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GenH5.menu.pnum.GENERIC_H563RGTX.upload.maximum_size=1048576
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GenH5.menu.pnum.GENERIC_H563RGTX.upload.maximum_data_size=655360
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GenH5.menu.pnum.GENERIC_H563RGTX.build.board=GENERIC_H563RGTX
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GenH5.menu.pnum.GENERIC_H563RGTX.build.product_line=STM32H563xx
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GenH5.menu.pnum.GENERIC_H563RGTX.build.variant=STM32H5xx/H563R(G-I)T_H573RIT
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GenH5.menu.pnum.GENERIC_H563RGTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H5xx/STM32H563.svd
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# Generic H563RITx
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GenH5.menu.pnum.GENERIC_H563RITX=Generic H563RITx
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GenH5.menu.pnum.GENERIC_H563RITX.upload.maximum_size=2097152
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GenH5.menu.pnum.GENERIC_H563RITX.upload.maximum_data_size=655360
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GenH5.menu.pnum.GENERIC_H563RITX.build.board=GENERIC_H563RITX
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GenH5.menu.pnum.GENERIC_H563RITX.build.product_line=STM32H563xx
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GenH5.menu.pnum.GENERIC_H563RITX.build.variant=STM32H5xx/H563R(G-I)T_H573RIT
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GenH5.menu.pnum.GENERIC_H563RITX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H5xx/STM32H563.svd
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# Generic H563ZGTx
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GenH5.menu.pnum.GENERIC_H563ZGTX=Generic H563ZGTx
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GenH5.menu.pnum.GENERIC_H563ZGTX.upload.maximum_size=1048576
@@ -8459,6 +8477,15 @@ GenH5.menu.pnum.GENERIC_H573IIKXQ.build.product_line=STM32H573xx
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GenH5.menu.pnum.GENERIC_H573IIKXQ.build.variant=STM32H5xx/H563IIKxQ_H573IIKxQ
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GenH5.menu.pnum.GENERIC_H573IIKXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H5xx/STM32H573.svd
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# Generic H573RITx
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GenH5.menu.pnum.GENERIC_H573RITX=Generic H573RITx
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GenH5.menu.pnum.GENERIC_H573RITX.upload.maximum_size=2097152
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GenH5.menu.pnum.GENERIC_H573RITX.upload.maximum_data_size=655360
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GenH5.menu.pnum.GENERIC_H573RITX.build.board=GENERIC_H573RITX
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GenH5.menu.pnum.GENERIC_H573RITX.build.product_line=STM32H573xx
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GenH5.menu.pnum.GENERIC_H573RITX.build.variant=STM32H5xx/H563R(G-I)T_H573RIT
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GenH5.menu.pnum.GENERIC_H573RITX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H5xx/STM32H573.svd
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# Generic H573ZITx
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GenH5.menu.pnum.GENERIC_H573ZITX=Generic H573ZITx
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GenH5.menu.pnum.GENERIC_H573ZITX.upload.maximum_size=2097152

‎variants/STM32H5xx/H563R(G-I)T_H573RIT/generic_clock.c

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@@ -21,8 +21,50 @@
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*/
2222
WEAKvoidSystemClock_Config(void)
2323
{
24-
/* SystemClock_Config can be generated by STM32CubeMX */
25-
#warning "SystemClock_Config() is empty. Default clock at reset is used."
24+
RCC_OscInitTypeDefRCC_OscInitStruct= {};
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RCC_ClkInitTypeDefRCC_ClkInitStruct= {};
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/** Configure the main internal regulator output voltage
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*/
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
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while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
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33+
/** Initializes the RCC Oscillators according to the specified parameters
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* in the RCC_OscInitTypeDef structure.
35+
*/
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RCC_OscInitStruct.OscillatorType=RCC_OSCILLATORTYPE_HSI48 |RCC_OSCILLATORTYPE_CSI;
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RCC_OscInitStruct.HSI48State=RCC_HSI48_ON;
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RCC_OscInitStruct.CSIState=RCC_CSI_ON;
39+
RCC_OscInitStruct.CSICalibrationValue=RCC_CSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.PLL.PLLState=RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource=RCC_PLL1_SOURCE_CSI;
42+
RCC_OscInitStruct.PLL.PLLM=1;
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RCC_OscInitStruct.PLL.PLLN=125;
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RCC_OscInitStruct.PLL.PLLP=2;
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RCC_OscInitStruct.PLL.PLLQ=2;
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RCC_OscInitStruct.PLL.PLLR=2;
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RCC_OscInitStruct.PLL.PLLRGE=RCC_PLL1_VCIRANGE_2;
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RCC_OscInitStruct.PLL.PLLVCOSEL=RCC_PLL1_VCORANGE_WIDE;
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RCC_OscInitStruct.PLL.PLLFRACN=0;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct)!=HAL_OK) {
51+
Error_Handler();
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}
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54+
/** Initializes the CPU, AHB and APB buses clocks
55+
*/
56+
RCC_ClkInitStruct.ClockType=RCC_CLOCKTYPE_HCLK |RCC_CLOCKTYPE_SYSCLK
57+
|RCC_CLOCKTYPE_PCLK1 |RCC_CLOCKTYPE_PCLK2
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|RCC_CLOCKTYPE_PCLK3;
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RCC_ClkInitStruct.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider=RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider=RCC_HCLK_DIV1;
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RCC_ClkInitStruct.APB2CLKDivider=RCC_HCLK_DIV1;
63+
RCC_ClkInitStruct.APB3CLKDivider=RCC_HCLK_DIV1;
64+
65+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct,FLASH_LATENCY_5)!=HAL_OK) {
66+
Error_Handler();
67+
}
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}
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#endif/* ARDUINO_GENERIC_* */
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/*
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******************************************************************************
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**
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** @file : LinkerScript.ld
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**
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** @author : Auto-generated by STM32CubeIDE
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**
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** @brief : Linker script for STM32H573RITx Device from STM32H5 series
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** 2048KBytes FLASH
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** 640KBytes RAM
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**
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** Set heap size, stack size and stack location according
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** to application requirements.
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**
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** Set memory bank area and size if external memory is used
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**
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** Target : STMicroelectronics STM32
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**
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** Distribution: The file is distributed as is, without any warranty
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** of any kind.
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**
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******************************************************************************
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** @attention
24+
**
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** Copyright (c) 2024 STMicroelectronics.
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** All rights reserved.
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**
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** This software is licensed under terms that can be found in the LICENSE file
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** in the root directory of this software component.
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** If no LICENSE file comes with this software, it is provided AS-IS.
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**
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******************************************************************************
33+
*/
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/* Entry Point */
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ENTRY(Reset_Handler)
37+
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/* Highest address of the user mode stack */
39+
_estack =ORIGIN(RAM) +LENGTH(RAM); /* end of "RAM" Ram type memory */
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_Min_Heap_Size = 0x200; /* required amount of heap */
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_Min_Stack_Size = 0x400; /* required amount of stack */
43+
44+
/* Memories definition */
45+
MEMORY
46+
{
47+
RAM (xrw) :ORIGIN = 0x20000000,LENGTH = LD_MAX_DATA_SIZE
48+
FLASH (rx) :ORIGIN = 0x08000000 + LD_FLASH_OFFSET,LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
49+
}
50+
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/* Sections */
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SECTIONS
53+
{
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/* The startup code into "FLASH" Rom type memory */
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.isr_vector :
56+
{
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. =ALIGN(4);
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KEEP(*(.isr_vector)) /* Startup code */
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. =ALIGN(4);
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} >FLASH
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/* The program code and other data into "FLASH" Rom type memory */
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.text :
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{
65+
. =ALIGN(4);
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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*(.glue_7) /* glue arm to thumb code */
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*(.glue_7t) /* glue thumb to arm code */
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*(.eh_frame)
71+
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KEEP (*(.init))
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KEEP (*(.fini))
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. =ALIGN(4);
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_etext = .; /* define a global symbols at end of code */
77+
} >FLASH
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79+
/* Constant data into "FLASH" Rom type memory */
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.rodata :
81+
{
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. =ALIGN(4);
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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. =ALIGN(4);
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} >FLASH
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.ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
89+
{
90+
. =ALIGN(4);
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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. =ALIGN(4);
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} >FLASH
94+
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.ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
96+
{
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. =ALIGN(4);
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__exidx_start = .;
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*(.ARM.exidx*)
100+
__exidx_end = .;
101+
. =ALIGN(4);
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} >FLASH
103+
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.preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
105+
{
106+
. =ALIGN(4);
107+
PROVIDE_HIDDEN (__preinit_array_start = .);
108+
KEEP (*(.preinit_array*))
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PROVIDE_HIDDEN (__preinit_array_end = .);
110+
. =ALIGN(4);
111+
} >FLASH
112+
113+
.init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
114+
{
115+
. =ALIGN(4);
116+
PROVIDE_HIDDEN (__init_array_start = .);
117+
KEEP (*(SORT(.init_array.*)))
118+
KEEP (*(.init_array*))
119+
PROVIDE_HIDDEN (__init_array_end = .);
120+
. =ALIGN(4);
121+
} >FLASH
122+
123+
.fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
124+
{
125+
. =ALIGN(4);
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PROVIDE_HIDDEN (__fini_array_start = .);
127+
KEEP (*(SORT(.fini_array.*)))
128+
KEEP (*(.fini_array*))
129+
PROVIDE_HIDDEN (__fini_array_end = .);
130+
. =ALIGN(4);
131+
} >FLASH
132+
133+
/* Used by the startup to initialize data */
134+
_sidata =LOADADDR(.data);
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/* Initialized data sections into "RAM" Ram type memory */
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.data :
138+
{
139+
. =ALIGN(4);
140+
_sdata = .; /* create a global symbol at data start */
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*(.data) /* .data sections */
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*(.data*) /* .data* sections */
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*(.RamFunc) /* .RamFunc sections */
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*(.RamFunc*) /* .RamFunc* sections */
145+
146+
. =ALIGN(4);
147+
_edata = .; /* define a global symbol at data end */
148+
149+
} >RAM AT> FLASH
150+
151+
/* Uninitialized data section into "RAM" Ram type memory */
152+
. =ALIGN(4);
153+
.bss :
154+
{
155+
/* This is used by the startup in order to initialize the .bss section */
156+
_sbss = .; /* define a global symbol at bss start */
157+
__bss_start__ = _sbss;
158+
*(.bss)
159+
*(.bss*)
160+
*(COMMON)
161+
162+
. =ALIGN(4);
163+
_ebss = .; /* define a global symbol at bss end */
164+
__bss_end__ = _ebss;
165+
} >RAM
166+
167+
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
168+
._user_heap_stack :
169+
{
170+
. =ALIGN(8);
171+
PROVIDE ( end = . );
172+
PROVIDE ( _end = . );
173+
. = . + _Min_Heap_Size;
174+
. = . + _Min_Stack_Size;
175+
. =ALIGN(8);
176+
} >RAM
177+
178+
/* Remove information from the compiler libraries */
179+
/DISCARD/ :
180+
{
181+
libc.a ( * )
182+
libm.a ( * )
183+
libgcc.a ( * )
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}
185+
186+
.ARM.attributes 0 : { *(.ARM.attributes) }
187+
}

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