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Commitaed76aa

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variant(WL): add LoRa-E5 mini
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
1 parent6e3f991 commitaed76aa

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5 files changed

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‎README.md

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@@ -748,6 +748,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
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| :----:| :-------:| ----| :-----:| :----|
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|:green_heart:| STM32L073RZ|[AcSIP S76S](https://www.acsip.com.tw)|*2.3.0*||
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|:green_heart:| STM32F072C8<br>STM32F072CB|[Elektor LoRa Node](https://github.com/ElektorLabs/180516-Elektor_LoRa_Node)|*1.8.0*|[More info](https://www.elektormagazine.com/labs/lorawan-node-experimental-platform)|
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|:yellow_heart:| STM32WLE5JC|[LoRa-E5 mini](https://wiki.seeedstudio.com/LoRa_E5_mini/)|**2.6.0**||
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|:green_heart:| STM32L151CB|[RAK811 LoRa Tracker](https://www.rakwireless.com/en/)|*1.4.0*|[Wiki](https://github.com/stm32duino/Arduino_Core_STM32/wiki/Connectivities#lora)|
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|:green_heart:| STM32L051C8|[RHF76-052](https://lora-alliance.org/lora_products/rhf76-052/)|*1.7.0*| Basic support|
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‎boards.txt

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@@ -10465,6 +10465,20 @@ LoRa.menu.pnum.ACSIP_S76S.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
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LoRa.menu.pnum.ACSIP_S76S.build.cmsis_lib_gcc=arm_cortexM0l_math
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LoRa.menu.pnum.ACSIP_S76S.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial} -D__CORTEX_SC=0
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# LORA_E5_MINI board
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LoRa.menu.pnum.LORA_E5_MINI=LoRa-E5 mini
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LoRa.menu.pnum.LORA_E5_MINI.upload.maximum_size=262144
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LoRa.menu.pnum.LORA_E5_MINI.upload.maximum_data_size=65536
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LoRa.menu.pnum.LORA_E5_MINI.build.mcu=cortex-m4
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LoRa.menu.pnum.LORA_E5_MINI.build.board=LORA_E5_MINI
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LoRa.menu.pnum.LORA_E5_MINI.build.series=STM32WLxx
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LoRa.menu.pnum.LORA_E5_MINI.build.product_line=STM32WLE5xx
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LoRa.menu.pnum.LORA_E5_MINI.build.variant=STM32WLxx/WL54JCI_WL55JCI_WLE4J(8-B-C)I_WLE5J(8-B-C)I
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LoRa.menu.pnum.LORA_E5_MINI.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
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LoRa.menu.pnum.LORA_E5_MINI.build.variant_h=variant_LORA_E5_MINI.h
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LoRa.menu.pnum.LORA_E5_MINI.build.cmsis_lib_gcc=arm_cortexM4l_math
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# RAK811_TRACKER board
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LoRa.menu.pnum.RAK811_TRACKER=RAK811 LoRa Tracker (16kb RAM)
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LoRa.menu.pnum.RAK811_TRACKER.upload.maximum_size=131072
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/*
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*******************************************************************************
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* Copyright (c) 2023, STMicroelectronics
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* All rights reserved.
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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*******************************************************************************
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*/
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/*
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* Automatically generated from STM32WL54JCIx.xml, STM32WL55JCIx.xml
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* STM32WLE4J8Ix.xml, STM32WLE4JBIx.xml
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* STM32WLE4JCIx.xml, STM32WLE5J8Ix.xml
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* STM32WLE5JBIx.xml, STM32WLE5JCIx.xml
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* CubeMX DB release 6.0.80
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*/
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#if defined(ARDUINO_LORA_E5_MINI)
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#include"Arduino.h"
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#include"PeripheralPins.h"
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/* =====
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* Notes:
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* - The pins mentioned Px_y_ALTz are alternative possibilities which use other
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* HW peripheral instances. You can use them the same way as any other "normal"
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* pin (i.e. analogWrite(PA7_ALT1, 128);).
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*
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* - Commented lines are alternative possibilities which are not used per default.
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* If you change them, you will have to know what you do
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* =====
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*/
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//*** ADC ***
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#ifdefHAL_ADC_MODULE_ENABLED
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WEAKconstPinMapPinMap_ADC[]= {
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{PA_10,ADC1,STM_PIN_DATA_EXT(STM_MODE_ANALOG,GPIO_NOPULL,0,6,0)},// ADC_IN6
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// {PA_11, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC_IN7
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// {PA_12, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC_IN8
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{PA_13,ADC1,STM_PIN_DATA_EXT(STM_MODE_ANALOG,GPIO_NOPULL,0,9,0)},// ADC_IN9
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{PA_14,ADC1,STM_PIN_DATA_EXT(STM_MODE_ANALOG,GPIO_NOPULL,0,10,0)},// ADC_IN10
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{PA_15,ADC1,STM_PIN_DATA_EXT(STM_MODE_ANALOG,GPIO_NOPULL,0,11,0)},// ADC_IN11
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// {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC_IN5
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// {PB_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC_IN4
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{PB_3,ADC1,STM_PIN_DATA_EXT(STM_MODE_ANALOG,GPIO_NOPULL,0,2,0)},// ADC_IN2
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{PB_4,ADC1,STM_PIN_DATA_EXT(STM_MODE_ANALOG,GPIO_NOPULL,0,3,0)},// ADC_IN3
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{PB_13,ADC1,STM_PIN_DATA_EXT(STM_MODE_ANALOG,GPIO_NOPULL,0,0,0)},// ADC_IN0
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{PB_14,ADC1,STM_PIN_DATA_EXT(STM_MODE_ANALOG,GPIO_NOPULL,0,1,0)},// ADC_IN1
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{NC,NP,0}
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};
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#endif
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//*** DAC ***
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#ifdefHAL_DAC_MODULE_ENABLED
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WEAKconstPinMapPinMap_DAC[]= {
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{PA_10,DAC1,STM_PIN_DATA_EXT(STM_MODE_ANALOG,GPIO_NOPULL,0,1,0)},// DAC_OUT1
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{NC,NP,0}
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};
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#endif
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//*** I2C ***
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#ifdefHAL_I2C_MODULE_ENABLED
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WEAKconstPinMapPinMap_I2C_SDA[]= {
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{PA_10,I2C1,STM_PIN_DATA(STM_MODE_AF_OD,GPIO_NOPULL,GPIO_AF4_I2C1)},
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// {PA_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
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{PA_15,I2C2,STM_PIN_DATA(STM_MODE_AF_OD,GPIO_NOPULL,GPIO_AF4_I2C2)},
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{PB_4,I2C3,STM_PIN_DATA(STM_MODE_AF_OD,GPIO_NOPULL,GPIO_AF4_I2C3)},
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{PB_7,I2C1,STM_PIN_DATA(STM_MODE_AF_OD,GPIO_NOPULL,GPIO_AF4_I2C1)},
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{PB_9,I2C1,STM_PIN_DATA(STM_MODE_AF_OD,GPIO_NOPULL,GPIO_AF4_I2C1)},
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// {PB_11, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
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{PB_14,I2C3,STM_PIN_DATA(STM_MODE_AF_OD,GPIO_NOPULL,GPIO_AF4_I2C3)},
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{PC_1,I2C3,STM_PIN_DATA(STM_MODE_AF_OD,GPIO_NOPULL,GPIO_AF4_I2C3)},
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{NC,NP,0}
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};
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#endif
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#ifdefHAL_I2C_MODULE_ENABLED
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WEAKconstPinMapPinMap_I2C_SCL[]= {
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// {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
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{PA_9,I2C1,STM_PIN_DATA(STM_MODE_AF_OD,GPIO_NOPULL,GPIO_AF4_I2C1)},
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// {PA_12, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
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{PB_6,I2C1,STM_PIN_DATA(STM_MODE_AF_OD,GPIO_NOPULL,GPIO_AF4_I2C1)},
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// {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
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{PB_10,I2C3,STM_PIN_DATA(STM_MODE_AF_OD,GPIO_NOPULL,GPIO_AF4_I2C3)},
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{PB_13,I2C3,STM_PIN_DATA(STM_MODE_AF_OD,GPIO_NOPULL,GPIO_AF4_I2C3)},
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{PB_15,I2C2,STM_PIN_DATA(STM_MODE_AF_OD,GPIO_NOPULL,GPIO_AF4_I2C2)},
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{PC_0,I2C3,STM_PIN_DATA(STM_MODE_AF_OD,GPIO_NOPULL,GPIO_AF4_I2C3)},
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{NC,NP,0}
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};
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#endif
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//*** TIM ***
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#ifdefHAL_TIM_MODULE_ENABLED
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WEAKconstPinMapPinMap_TIM[]= {
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{PA_0,TIM2,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF1_TIM2,1,0)},// TIM2_CH1
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// {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
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{PA_2,TIM2,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF1_TIM2,3,0)},// TIM2_CH3
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{PA_3,TIM2,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF1_TIM2,4,0)},// TIM2_CH4
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// {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
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// {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1
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// {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
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// {PA_7_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1
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// {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
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{PA_9,TIM1,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF1_TIM1,2,0)},// TIM1_CH2
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{PA_10,TIM1,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF1_TIM1,3,0)},// TIM1_CH3
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// {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
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{PA_15,TIM2,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF1_TIM2,1,0)},// TIM2_CH1
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{PB_3,TIM2,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF1_TIM2,2,0)},// TIM2_CH2
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{PB_6,TIM16,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF14_TIM16,1,1)},// TIM16_CH1N
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{PB_7,TIM17,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF14_TIM17,1,1)},// TIM17_CH1N
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// {PB_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
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// {PB_8_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1
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{PB_9,TIM1,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF1_TIM1,3,1)},// TIM1_CH3N
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{PB_9_ALT1,TIM17,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF14_TIM17,1,0)},// TIM17_CH1
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{PB_10,TIM2,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF1_TIM2,3,0)},// TIM2_CH3
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// {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
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{PB_13,TIM1,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF1_TIM1,1,1)},// TIM1_CH1N
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{PB_14,TIM1,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF1_TIM1,2,1)},// TIM1_CH2N
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{PB_15,TIM1,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF1_TIM1,3,1)},// TIM1_CH3N
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{NC,NP,0}
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};
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#endif
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//*** UART ***
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#ifdefHAL_UART_MODULE_ENABLED
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WEAKconstPinMapPinMap_UART_TX[]= {
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{PA_2,LPUART1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF8_LPUART1)},
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{PA_2_ALT1,USART2,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF7_USART2)},
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{PA_9,USART1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF7_USART1)},
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{PB_6,USART1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF7_USART1)},
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// {PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
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{PC_1,LPUART1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF8_LPUART1)},
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{NC,NP,0}
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};
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#endif
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#ifdefHAL_UART_MODULE_ENABLED
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WEAKconstPinMapPinMap_UART_RX[]= {
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{PA_3,LPUART1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF8_LPUART1)},
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{PA_3_ALT1,USART2,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF7_USART2)},
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{PA_10,USART1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF7_USART1)},
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{PB_7,USART1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF7_USART1)},
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{PB_10,LPUART1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF8_LPUART1)},
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{PC_0,LPUART1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF8_LPUART1)},
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{NC,NP,0}
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};
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#endif
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#ifdefHAL_UART_MODULE_ENABLED
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WEAKconstPinMapPinMap_UART_RTS[]= {
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// {PA_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
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// {PA_1_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
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// {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
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// {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
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{PB_3,USART1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF7_USART1)},
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// {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
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{NC,NP,0}
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};
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#endif
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#ifdefHAL_UART_MODULE_ENABLED
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WEAKconstPinMapPinMap_UART_CTS[]= {
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// {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
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// {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
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// {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
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{PB_4,USART1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF7_USART1)},
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// {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
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{NC,NP,0}
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};
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#endif
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//*** SPI ***
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#ifdefHAL_SPI_MODULE_ENABLED
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WEAKconstPinMapPinMap_SPI_MOSI[]= {
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// {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
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{PA_7,SUBGHZSPI,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_NOPULL,GPIO_AF13_DEBUG_SUBGHZSPI)},
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{PA_10,SPI2,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF5_SPI2)},
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// {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
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// {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
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{PB_15,SPI2,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF5_SPI2)},
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{PC_1,SPI2,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF3_SPI2)},
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// {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
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{NC,NP,0}
191+
};
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#endif
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#ifdefHAL_SPI_MODULE_ENABLED
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WEAKconstPinMapPinMap_SPI_MISO[]= {
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// {PA_5, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)},
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// {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
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{PA_6,SUBGHZSPI,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_NOPULL,GPIO_AF13_DEBUG_SUBGHZSPI)},
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// {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
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{PB_4,SPI1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF5_SPI1)},
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{PB_14,SPI2,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF5_SPI2)},
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// {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
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{NC,NP,0}
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};
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#endif
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#ifdefHAL_SPI_MODULE_ENABLED
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WEAKconstPinMapPinMap_SPI_SCLK[]= {
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// {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
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// {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
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{PA_5,SUBGHZSPI,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_NOPULL,GPIO_AF13_DEBUG_SUBGHZSPI)},
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// {PA_8, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
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{PA_9,SPI2,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF5_SPI2)},
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{PB_3,SPI1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF5_SPI1)},
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{PB_10,SPI2,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF5_SPI2)},
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{PB_13,SPI2,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF5_SPI2)},
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{NC,NP,0}
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};
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#endif
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#ifdefHAL_SPI_MODULE_ENABLED
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WEAKconstPinMapPinMap_SPI_SSEL[]= {
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// {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
224+
{PA_4,SUBGHZSPI,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_NOPULL,GPIO_AF13_DEBUG_SUBGHZSPI)},
225+
{PA_9,SPI2,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF3_SPI2)},
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{PA_15,SPI1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF5_SPI1)},
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// {PB_2, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
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{PB_9,SPI2,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF5_SPI2)},
229+
// {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
230+
{NC,NP,0}
231+
};
232+
#endif
233+
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//*** No CAN ***
235+
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//*** No ETHERNET ***
237+
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//*** No QUADSPI ***
239+
240+
//*** No USB ***
241+
242+
//*** No SD ***
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#endif/* ARDUINO_LORA_E5_MINI */
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/*
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*******************************************************************************
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* Copyright (c) 2023, STMicroelectronics
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* All rights reserved.
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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*******************************************************************************
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*/
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#if defined(ARDUINO_LORA_E5_MINI)
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#include"pins_arduino.h"
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// Digital PinName array
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const PinName digitalPin[] = {
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PA_0,// D0
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PA_2,// D1
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PA_3,// D2
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PC_1,// D3
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PC_0,// D4
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PB_6,// D5
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PB_7,// D6
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PA_15,// D7/A0
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PB_15,// D8
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PA_9,// D9
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PB_10,// D10
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PB_13,// D11/A1
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PB_9,// D12
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PB_14,// D13/A2
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PA_10,// D14/A5
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PA_14,// D15/A6
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PA_13,// D16/A7
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PB_3,// D17/A3
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PB_4,// D18/A4
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PB_5,// D19
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PA_4,// D20
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PA_5,// D21
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PB_0,// D22
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PC_15,// D23
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PC_14,// D24
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PA_7,// D25
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PA_6// D26
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};
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// Analog (Ax) pin number array
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constuint32_t analogInputPin[] = {
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7,// A0, PA15
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11,// A1, PB13
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13,// A2, PB14
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17,// A3, PB3
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18,// A4, PB4
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14,// A5, PA10
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15,// A6, PA14
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16// A7, PA13
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};
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// ----------------------------------------------------------------------------
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#ifdef __cplusplus
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extern"C" {
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#endif
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/**
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* @brief System Clock Configuration
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* @param None
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* @retval None
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*/
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WEAKvoidSystemClock_Config(void)
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{
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RCC_OscInitTypeDef RCC_OscInitStruct = {};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
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/** Configure LSE Drive Capability
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*/
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HAL_PWR_EnableBkUpAccess();
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__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
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/** Configure the main internal regulator output voltage
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*/
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
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/** Initializes the CPU, AHB and APB busses clocks
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_MSI;
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RCC_OscInitStruct.LSEState = RCC_LSE_ON;
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RCC_OscInitStruct.MSIState = RCC_MSI_ON;
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RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
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Error_Handler();
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}
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/** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers
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*/
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK3 | RCC_CLOCKTYPE_HCLK
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| RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1
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| RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.AHBCLK3Divider = RCC_SYSCLK_DIV1;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
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Error_Handler();
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}
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}
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#ifdef __cplusplus
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}
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#endif
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#endif/* ARDUINO_LORA_E5_MINI*/

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