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Commit89e2f09

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[WB] Add hardware semaphore management for RCC
WB serie will require more semaphore management forlow power and flash.Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
1 parent5bc2384 commit89e2f09

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4 files changed

+43
-74
lines changed

4 files changed

+43
-74
lines changed

‎libraries/SrcWrapper/src/stm32/analog.cpp

Lines changed: 17 additions & 39 deletions
Original file line numberDiff line numberDiff line change
@@ -1,44 +1,20 @@
1-
/**
2-
******************************************************************************
3-
* @file analog.c
4-
* @author WI6LABS
5-
* @version V1.0.0
6-
* @date 01-August-2016
7-
* @brief provide analog services (ADC + PWM)
8-
*
9-
******************************************************************************
10-
* @attention
11-
*
12-
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
13-
*
14-
* Redistribution and use in source and binary forms, with or without modification,
15-
* are permitted provided that the following conditions are met:
16-
* 1. Redistributions of source code must retain the above copyright notice,
17-
* this list of conditions and the following disclaimer.
18-
* 2. Redistributions in binary form must reproduce the above copyright notice,
19-
* this list of conditions and the following disclaimer in the documentation
20-
* and/or other materials provided with the distribution.
21-
* 3. Neither the name of STMicroelectronics nor the names of its contributors
22-
* may be used to endorse or promote products derived from this software
23-
* without specific prior written permission.
24-
*
25-
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26-
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27-
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
28-
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
29-
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30-
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31-
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
32-
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
33-
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34-
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35-
*
36-
******************************************************************************
37-
*/
38-
#include"stm32_def.h"
1+
/*
2+
*******************************************************************************
3+
* Copyright (c) 2016-2021, STMicroelectronics
4+
* All rights reserved.
5+
*
6+
* This software component is licensed by ST under BSD 3-Clause license,
7+
* the "License"; You may not use this file except in compliance with the
8+
* License. You may obtain a copy of the License at:
9+
* opensource.org/licenses/BSD-3-Clause
10+
*
11+
*******************************************************************************
12+
*/
3913
#include"analog.h"
40-
#include"PinAF_STM32F1.h"
14+
#include"lock_resource.h"
4115
#include"stm32yyxx_ll_adc.h"
16+
#include"PinAF_STM32F1.h"
17+
4218

4319
#ifdef __cplusplus
4420
extern"C" {
@@ -628,8 +604,10 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef *hadc)
628604
SystemClock_Config (variant.cpp)*/
629605
#if defined(__HAL_RCC_ADC_CONFIG) && !defined(STM32F1xx) && \
630606
!defined(STM32H7xx) && !defined(STM32MP1xx)
607+
hsem_lock(CFG_HW_RCC_CRRCR_CCIPR_SEMID, HSEM_LOCK_DEFAULT_RETRY);
631608
/* ADC Periph interface clock configuration*/
632609
__HAL_RCC_ADC_CONFIG(RCC_ADCCLKSOURCE_SYSCLK);
610+
hsem_unlock(CFG_HW_RCC_CRRCR_CCIPR_SEMID);
633611
#endif
634612

635613
/* Configure ADC GPIO pin*/

‎libraries/SrcWrapper/src/stm32/clock.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,7 @@
1212
*/
1313
#include"backup.h"
1414
#include"clock.h"
15+
#include"lock_resource.h"
1516
#include"otp.h"
1617
#include"stm32yyxx_ll_cortex.h"
1718
#include"stm32yyxx_ll_rcc.h"
@@ -131,9 +132,11 @@ void enableClock(sourceClock_t source)
131132
break;
132133
}
133134
if (RCC_OscInitStruct.OscillatorType!=RCC_OSCILLATORTYPE_NONE) {
135+
hsem_lock(CFG_HW_RCC_SEMID,HSEM_LOCK_DEFAULT_RETRY);
134136
if (HAL_RCC_OscConfig(&RCC_OscInitStruct)!=HAL_OK) {
135137
Error_Handler();
136138
}
139+
hsem_unlock(CFG_HW_RCC_SEMID);
137140
}
138141
}
139142

‎libraries/SrcWrapper/src/stm32/uart.c

Lines changed: 15 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -1,39 +1,17 @@
1-
/**
2-
******************************************************************************
3-
* @file uart.c
4-
* @author WI6LABS, fpistm
5-
* @brief provide the UART interface
6-
*
7-
******************************************************************************
8-
* @attention
9-
*
10-
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
11-
*
12-
* Redistribution and use in source and binary forms, with or without modification,
13-
* are permitted provided that the following conditions are met:
14-
* 1. Redistributions of source code must retain the above copyright notice,
15-
* this list of conditions and the following disclaimer.
16-
* 2. Redistributions in binary form must reproduce the above copyright notice,
17-
* this list of conditions and the following disclaimer in the documentation
18-
* and/or other materials provided with the distribution.
19-
* 3. Neither the name of STMicroelectronics nor the names of its contributors
20-
* may be used to endorse or promote products derived from this software
21-
* without specific prior written permission.
22-
*
23-
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24-
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25-
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26-
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
27-
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28-
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29-
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
30-
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
31-
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32-
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33-
*
34-
******************************************************************************
35-
*/
1+
/*
2+
*******************************************************************************
3+
* Copyright (c) 2016-2021, STMicroelectronics
4+
* All rights reserved.
5+
*
6+
* This software component is licensed by ST under BSD 3-Clause license,
7+
* the "License"; You may not use this file except in compliance with the
8+
* License. You may obtain a copy of the License at:
9+
* opensource.org/licenses/BSD-3-Clause
10+
*
11+
*******************************************************************************
12+
*/
3613
#include"core_debug.h"
14+
#include"lock_resource.h"
3715
#include"uart.h"
3816
#include"Arduino.h"
3917
#include"PinAF_STM32F1.h"
@@ -528,6 +506,7 @@ void uart_config_lowpower(serial_t *obj)
528506
/* Ensure HSI clock is enable */
529507
enableClock(HSI_CLOCK);
530508

509+
hsem_lock(CFG_HW_RCC_CRRCR_CCIPR_SEMID,HSEM_LOCK_DEFAULT_RETRY);
531510
/* Configure HSI as source clock for low power wakeup clock */
532511
switch (obj->index) {
533512
#if defined(USART1_BASE)
@@ -573,6 +552,7 @@ void uart_config_lowpower(serial_t *obj)
573552
break;
574553
#endif
575554
}
555+
hsem_unlock(CFG_HW_RCC_CRRCR_CCIPR_SEMID);
576556
}
577557
#endif
578558

‎variants/PNUCLEO_WB55RG/variant.cpp

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,7 @@
1717
*/
1818

1919
#include"pins_arduino.h"
20+
#include"lock_resource.h"
2021

2122
#ifdef __cplusplus
2223
extern"C" {
@@ -99,9 +100,15 @@ WEAK void SystemClock_Config(void)
99100
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
100101
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {};
101102

103+
/* This prevents concurrent access to RCC registers by CPU2 (M0+)*/
104+
hsem_lock(CFG_HW_RCC_SEMID, HSEM_LOCK_DEFAULT_RETRY);
105+
102106
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
103107
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
104108

109+
/* This prevents the CPU2 (M0+) to disable the HSI48 oscillator*/
110+
hsem_lock(CFG_HW_CLK48_CONFIG_SEMID, HSEM_LOCK_DEFAULT_RETRY);
111+
105112
/* Initializes the CPU, AHB and APB busses clocks*/
106113
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48
107114
| RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_LSE;
@@ -149,6 +156,7 @@ WEAK void SystemClock_Config(void)
149156
/* Select HSI as system clock source after Wake Up from Stop mode*/
150157
LL_RCC_SetClkAfterWakeFromStop(LL_RCC_STOP_WAKEUPCLOCK_HSI);
151158

159+
hsem_unlock(CFG_HW_RCC_SEMID);
152160
}
153161

154162
#ifdef __cplusplus

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