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Commit76f92ac

Browse files
Toritos01fpistm
authored andcommitted
variant(F4): add generic STM32F412Zx support
Signed-off-by: Brandon Diaz <bld68@cornell.edu>
1 parent565f3ec commit76f92ac

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4 files changed

+264
-2
lines changed

4 files changed

+264
-2
lines changed

‎README.md

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Original file line numberDiff line numberDiff line change
@@ -344,6 +344,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
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|:green_heart:| STM32F411RC<br>STM32F411RE| Generic Board|*1.9.0*||
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|:green_heart:| STM32F412CE<br>STM32F412CG| Generic Board|*1.9.0*||
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|:green_heart:| STM32F412RE<br>STM32F412RG| Generic Board|*1.9.0*||
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|:yellow_heart:| STM32F412ZE<br>STM32F412ZG| Generic Board|**2.6.0**||
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|:green_heart:| STM32F413CG<br>STM32F413CH| Generic Board|*1.9.0*||
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|:green_heart:| STM32F413RG<br>STM32F413RH| Generic Board|*1.9.0*||
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|:green_heart:| STM32F413ZG<br>STM32F413ZH| Generic Board|*2.0.0*||

‎boards.txt

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Original file line numberDiff line numberDiff line change
@@ -4113,6 +4113,38 @@ GenF4.menu.pnum.GENERIC_F412RGYXP.build.board=GENERIC_F412RGYXP
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GenF4.menu.pnum.GENERIC_F412RGYXP.build.product_line=STM32F412Rx
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GenF4.menu.pnum.GENERIC_F412RGYXP.build.variant=STM32F4xx/F412R(E-G)(T-Y)x(P)
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# Generic F412ZEJx
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GenF4.menu.pnum.GENERIC_F412ZEJX=Generic F412ZEJx
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GenF4.menu.pnum.GENERIC_F412ZEJX.upload.maximum_size=524288
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GenF4.menu.pnum.GENERIC_F412ZEJX.upload.maximum_data_size=262144
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GenF4.menu.pnum.GENERIC_F412ZEJX.build.board=GENERIC_F412ZEJX
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GenF4.menu.pnum.GENERIC_F412ZEJX.build.product_line=STM32F412Zx
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GenF4.menu.pnum.GENERIC_F412ZEJX.build.variant=STM32F4xx/F412Z(E-G)(J-T)
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# Generic F412ZGJx
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GenF4.menu.pnum.GENERIC_F412ZGJX=Generic F412ZGJx
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GenF4.menu.pnum.GENERIC_F412ZGJX.upload.maximum_size=1048576
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GenF4.menu.pnum.GENERIC_F412ZGJX.upload.maximum_data_size=262144
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GenF4.menu.pnum.GENERIC_F412ZGJX.build.board=GENERIC_F412ZGJX
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GenF4.menu.pnum.GENERIC_F412ZGJX.build.product_line=STM32F412Zx
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GenF4.menu.pnum.GENERIC_F412ZGJX.build.variant=STM32F4xx/F412Z(E-G)(J-T)
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# Generic F412ZETx
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GenF4.menu.pnum.GENERIC_F412ZETX=Generic F412ZETx
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GenF4.menu.pnum.GENERIC_F412ZETX.upload.maximum_size=524288
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GenF4.menu.pnum.GENERIC_F412ZETX.upload.maximum_data_size=262144
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GenF4.menu.pnum.GENERIC_F412ZETX.build.board=GENERIC_F412ZETX
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GenF4.menu.pnum.GENERIC_F412ZETX.build.product_line=STM32F412Zx
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GenF4.menu.pnum.GENERIC_F412ZETX.build.variant=STM32F4xx/F412Z(E-G)(J-T)
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# Generic F412ZGTx
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GenF4.menu.pnum.GENERIC_F412ZGTX=Generic F412ZGTx
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GenF4.menu.pnum.GENERIC_F412ZGTX.upload.maximum_size=1048576
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GenF4.menu.pnum.GENERIC_F412ZGTX.upload.maximum_data_size=262144
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GenF4.menu.pnum.GENERIC_F412ZGTX.build.board=GENERIC_F412ZGTX
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GenF4.menu.pnum.GENERIC_F412ZGTX.build.product_line=STM32F412Zx
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GenF4.menu.pnum.GENERIC_F412ZGTX.build.variant=STM32F4xx/F412Z(E-G)(J-T)
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# Generic F413CGUx
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GenF4.menu.pnum.GENERIC_F413CGUX=Generic F413CGUx
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GenF4.menu.pnum.GENERIC_F413CGUX.upload.maximum_size=1048576

‎variants/STM32F4xx/F412Z(E-G)(J-T)/generic_clock.c

Lines changed: 46 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -21,8 +21,52 @@
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*/
2222
WEAKvoidSystemClock_Config(void)
2323
{
24-
/* SystemClock_Config can be generated by STM32CubeMX */
25-
#warning "SystemClock_Config() is empty. Default clock at reset is used."
24+
RCC_OscInitTypeDefRCC_OscInitStruct= {};
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RCC_ClkInitTypeDefRCC_ClkInitStruct= {};
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RCC_PeriphCLKInitTypeDefPeriphClkInitStruct= {};
27+
28+
/** Configure the main internal regulator output voltage
29+
*/
30+
__HAL_RCC_PWR_CLK_ENABLE();
31+
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
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33+
/** Initializes the RCC Oscillators according to the specified parameters
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* in the RCC_OscInitTypeDef structure.
35+
*/
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RCC_OscInitStruct.OscillatorType=RCC_OSCILLATORTYPE_HSI;
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RCC_OscInitStruct.HSIState=RCC_HSI_ON;
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RCC_OscInitStruct.HSICalibrationValue=RCC_HSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.PLL.PLLState=RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource=RCC_PLLSOURCE_HSI;
41+
RCC_OscInitStruct.PLL.PLLM=8;
42+
RCC_OscInitStruct.PLL.PLLN=96;
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RCC_OscInitStruct.PLL.PLLP=RCC_PLLP_DIV2;
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RCC_OscInitStruct.PLL.PLLQ=4;
45+
RCC_OscInitStruct.PLL.PLLR=2;
46+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct)!=HAL_OK) {
47+
Error_Handler();
48+
}
49+
50+
/** Initializes the CPU, AHB and APB buses clocks
51+
*/
52+
RCC_ClkInitStruct.ClockType=RCC_CLOCKTYPE_HCLK |RCC_CLOCKTYPE_SYSCLK
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|RCC_CLOCKTYPE_PCLK1 |RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider=RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider=RCC_HCLK_DIV2;
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RCC_ClkInitStruct.APB2CLKDivider=RCC_HCLK_DIV1;
58+
59+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct,FLASH_LATENCY_3)!=HAL_OK) {
60+
Error_Handler();
61+
}
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/** Initializes the peripherals clock
64+
*/
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PeriphClkInitStruct.PeriphClockSelection=RCC_PERIPHCLK_CLK48;
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PeriphClkInitStruct.Clk48ClockSelection=RCC_CLK48CLKSOURCE_PLLQ;
67+
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct)!=HAL_OK) {
68+
Error_Handler();
69+
}
2670
}
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#endif/* ARDUINO_GENERIC_* */
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/*
2+
******************************************************************************
3+
**
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** @file : LinkerScript.ld
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**
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** @author : Auto-generated by STM32CubeIDE
7+
**
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** @brief : Linker script for STM32F412ZGTx Device from STM32F4 series
9+
** 1024Kbytes FLASH
10+
** 256Kbytes RAM
11+
**
12+
** Set heap size, stack size and stack location according
13+
** to application requirements.
14+
**
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** Set memory bank area and size if external memory is used
16+
**
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** Target : STMicroelectronics STM32
18+
**
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** Distribution: The file is distributed as is, without any warranty
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** of any kind.
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**
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******************************************************************************
23+
** @attention
24+
**
25+
** Copyright (c) 2023 STMicroelectronics.
26+
** All rights reserved.
27+
**
28+
** This software is licensed under terms that can be found in the LICENSE file
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** in the root directory of this software component.
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** If no LICENSE file comes with this software, it is provided AS-IS.
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**
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******************************************************************************
33+
*/
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/* Entry Point */
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ENTRY(Reset_Handler)
37+
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/* Highest address of the user mode stack */
39+
_estack =ORIGIN(RAM) +LENGTH(RAM); /* end of "RAM" Ram type memory */
40+
41+
_Min_Heap_Size = 0x200; /* required amount of heap */
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_Min_Stack_Size = 0x400; /* required amount of stack */
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/* Memories definition */
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MEMORY
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{
47+
RAM (xrw) :ORIGIN = 0x20000000,LENGTH = LD_MAX_DATA_SIZE
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FLASH (rx) :ORIGIN = 0x8000000 + LD_FLASH_OFFSET,LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
49+
}
50+
51+
/* Sections */
52+
SECTIONS
53+
{
54+
/* The startup code into "FLASH" Rom type memory */
55+
.isr_vector :
56+
{
57+
. =ALIGN(4);
58+
KEEP(*(.isr_vector)) /* Startup code */
59+
. =ALIGN(4);
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} >FLASH
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/* The program code and other data into "FLASH" Rom type memory */
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.text :
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{
65+
. =ALIGN(4);
66+
*(.text) /* .text sections (code) */
67+
*(.text*) /* .text* sections (code) */
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*(.glue_7) /* glue arm to thumb code */
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*(.glue_7t) /* glue thumb to arm code */
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*(.eh_frame)
71+
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KEEP (*(.init))
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KEEP (*(.fini))
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. =ALIGN(4);
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_etext = .; /* define a global symbols at end of code */
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} >FLASH
78+
79+
/* Constant data into "FLASH" Rom type memory */
80+
.rodata :
81+
{
82+
. =ALIGN(4);
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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. =ALIGN(4);
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} >FLASH
87+
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.ARM.extab : {
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. =ALIGN(4);
90+
*(.ARM.extab* .gnu.linkonce.armextab.*)
91+
. =ALIGN(4);
92+
} >FLASH
93+
94+
.ARM : {
95+
. =ALIGN(4);
96+
__exidx_start = .;
97+
*(.ARM.exidx*)
98+
__exidx_end = .;
99+
. =ALIGN(4);
100+
} >FLASH
101+
102+
.preinit_array :
103+
{
104+
. =ALIGN(4);
105+
PROVIDE_HIDDEN (__preinit_array_start = .);
106+
KEEP (*(.preinit_array*))
107+
PROVIDE_HIDDEN (__preinit_array_end = .);
108+
. =ALIGN(4);
109+
} >FLASH
110+
111+
.init_array :
112+
{
113+
. =ALIGN(4);
114+
PROVIDE_HIDDEN (__init_array_start = .);
115+
KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array*))
117+
PROVIDE_HIDDEN (__init_array_end = .);
118+
. =ALIGN(4);
119+
} >FLASH
120+
121+
.fini_array :
122+
{
123+
. =ALIGN(4);
124+
PROVIDE_HIDDEN (__fini_array_start = .);
125+
KEEP (*(SORT(.fini_array.*)))
126+
KEEP (*(.fini_array*))
127+
PROVIDE_HIDDEN (__fini_array_end = .);
128+
. =ALIGN(4);
129+
} >FLASH
130+
131+
/* Used by the startup to initialize data */
132+
_sidata =LOADADDR(.data);
133+
134+
/* Initialized data sections into "RAM" Ram type memory */
135+
.data :
136+
{
137+
. =ALIGN(4);
138+
_sdata = .; /* create a global symbol at data start */
139+
*(.data) /* .data sections */
140+
*(.data*) /* .data* sections */
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*(.RamFunc) /* .RamFunc sections */
142+
*(.RamFunc*) /* .RamFunc* sections */
143+
144+
. =ALIGN(4);
145+
_edata = .; /* define a global symbol at data end */
146+
147+
} >RAM AT> FLASH
148+
149+
/* Uninitialized data section into "RAM" Ram type memory */
150+
. =ALIGN(4);
151+
.bss :
152+
{
153+
/* This is used by the startup in order to initialize the .bss section */
154+
_sbss = .; /* define a global symbol at bss start */
155+
__bss_start__ = _sbss;
156+
*(.bss)
157+
*(.bss*)
158+
*(COMMON)
159+
160+
. =ALIGN(4);
161+
_ebss = .; /* define a global symbol at bss end */
162+
__bss_end__ = _ebss;
163+
} >RAM
164+
165+
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
166+
._user_heap_stack :
167+
{
168+
. =ALIGN(8);
169+
PROVIDE ( end = . );
170+
PROVIDE ( _end = . );
171+
. = . + _Min_Heap_Size;
172+
. = . + _Min_Stack_Size;
173+
. =ALIGN(8);
174+
} >RAM
175+
176+
/* Remove information from the compiler libraries */
177+
/DISCARD/ :
178+
{
179+
libc.a ( * )
180+
libm.a ( * )
181+
libgcc.a ( * )
182+
}
183+
184+
.ARM.attributes 0 : { *(.ARM.attributes) }
185+
}

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