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Commit6d57b93

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[L5] new system cortex M33 Device Peripheral Access Layer
Signed-off-by: Francois Ramu <francois.ramu@st.com>
1 parent2c963dd commit6d57b93

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3 files changed

+293
-7
lines changed

3 files changed

+293
-7
lines changed

‎system/STM32L5xx/stm32l5xx_hal_conf.h

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Original file line numberDiff line numberDiff line change
@@ -5,12 +5,12 @@
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/* STM32L5xx specific HAL configuration options. */
77
#if__has_include("hal_conf_custom.h")
8-
#include"hal_conf_custom.h"
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#include"hal_conf_custom.h"
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#else
10-
#if__has_include("hal_conf_extra.h")
11-
#include"hal_conf_extra.h"
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#endif
13-
#include"stm32l5xx_hal_conf_default.h"
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#if__has_include("hal_conf_extra.h")
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#include"hal_conf_extra.h"
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#endif
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#include"stm32l5xx_hal_conf_default.h"
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#endif
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#endif/* __STM32L5xx_HAL_CONF_H */

‎system/STM32L5xx/stm32l5xx_hal_conf_default.h

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@@ -129,7 +129,7 @@ extern "C" {
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* @brief Internal Low Speed oscillator (LSI) value.
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*/
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#if !defined (LSI_VALUE)
132-
#defineLSE_VALUE32768UL/*!< Value of the External oscillator in Hz*/
132+
#defineLSI_VALUE32000UL/*!< Value of the External oscillator in Hz*/
133133
#endif/* LSI_VALUE *//*!< Value of the Internal Low Speed oscillator in Hz
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The real value may vary depending on the variations
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in voltage and temperature.*/
@@ -174,7 +174,7 @@ in voltage and temperature.*/
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#defineVDD_VALUE 3300UL/*!< Value of VDD in mv */
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#endif
176176
#if !defined (TICK_INT_PRIORITY)
177-
#defineTICK_INT_PRIORITY((1UL<<__NVIC_PRIO_BITS) - 1UL)/*!< tick interrupt priority (lowest by default) */
177+
#defineTICK_INT_PRIORITY (0x00UL)/*!< tick interrupt priority */
178178
#endif
179179
#if !defined (USE_RTOS)
180180
#defineUSE_RTOS 0U

‎system/STM32L5xx/system_stm32l5xx.c

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@@ -0,0 +1,286 @@
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/**
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******************************************************************************
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* @file system_stm32l5xx_ns.c
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* @author MCD Application Team
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* @brief CMSIS Cortex-M33 Device Peripheral Access Layer System Source File
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* to be used in non-secure application when the system implements
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* the TrustZone-M security.
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*
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* This file provides two functions and one global variable to be called from
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* user application:
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* - SystemInit(): This function is called at non-secure startup before
12+
* branch to non-secure main program.
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* This call is made inside the "startup_stm32l5xx.s" file.
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*
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* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
16+
* by the user application to setup the SysTick
17+
* timer or configure other parameters.
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*
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* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
20+
* be called whenever the core clock is changed
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* during program execution.
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*
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* After each device reset the MSI (4 MHz) is used as system clock source.
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* Then SystemInit() function is called, in "startup_stm32l5xx.s" file, to
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* configure the system clock before to branch to main secure program.
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* Later, when non-secure SystemInit() function is called, in "startup_stm32l5xx.s"
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* file, the system clock may have been updated from reset value by the main
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* secure program.
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*
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******************************************************************************
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* @attention
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*
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* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under Apache License, Version 2.0,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/Apache-2.0
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*
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******************************************************************************
42+
*/
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44+
/** @addtogroup CMSIS
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* @{
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*/
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/** @addtogroup STM32L5xx_System
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* @{
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*/
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/** @addtogroup STM32L5xx_System_Private_Includes
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* @{
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*/
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#include"stm32l5xx.h"
57+
58+
/**
59+
* @}
60+
*/
61+
62+
/** @addtogroup STM32L5xx_System_Private_TypesDefinitions
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* @{
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*/
65+
66+
/**
67+
* @}
68+
*/
69+
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/** @addtogroup STM32L5xx_System_Private_Defines
71+
* @{
72+
*/
73+
74+
/* Note: Following vector table addresses must be defined in line with linker
75+
configuration. */
76+
/*!< Uncomment the following line if you need to relocate the vector table
77+
anywhere in Flash or Sram, else the vector table is kept at the automatic
78+
remap of boot address selected */
79+
/* #define USER_VECT_TAB_ADDRESS */
80+
81+
#if defined(USER_VECT_TAB_ADDRESS)
82+
/*!< Uncomment the following line if you need to relocate your vector Table
83+
in Sram else user remap will be done in Flash. */
84+
/* #define VECT_TAB_SRAM */
85+
86+
#if defined(VECT_TAB_SRAM)
87+
#defineVECT_TAB_BASE_ADDRESS SRAM1_BASE_NS/*!< Vector Table base address field.
88+
This value must be a multiple of 0x200. */
89+
#defineVECT_TAB_OFFSET 0x00018000U/*!< Vector Table base offset field.
90+
This value must be a multiple of 0x200. */
91+
#else
92+
#defineVECT_TAB_BASE_ADDRESS FLASH_BASE_NS/*!< Vector Table base address field.
93+
This value must be a multiple of 0x200. */
94+
#defineVECT_TAB_OFFSET 0x00040000U/*!< Vector Table base offset field.
95+
This value must be a multiple of 0x200. */
96+
#endif/* VECT_TAB_SRAM */
97+
#endif/* USER_VECT_TAB_ADDRESS */
98+
99+
/******************************************************************************/
100+
/**
101+
* @}
102+
*/
103+
104+
/** @addtogroup STM32L5xx_System_Private_Macros
105+
* @{
106+
*/
107+
108+
/**
109+
* @}
110+
*/
111+
112+
/** @addtogroup STM32L5xx_System_Private_Variables
113+
* @{
114+
*/
115+
/* The SystemCoreClock variable is updated in three ways:
116+
1) by calling CMSIS function SystemCoreClockUpdate()
117+
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
118+
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
119+
Note: If you use this function to configure the system clock; then there
120+
is no need to call the 2 first functions listed above, since SystemCoreClock
121+
variable is updated automatically.
122+
*/
123+
uint32_tSystemCoreClock=4000000U;
124+
125+
constuint8_tAHBPrescTable[16]= {0U,0U,0U,0U,0U,0U,0U,0U,1U,2U,3U,4U,6U,7U,8U,9U};
126+
constuint8_tAPBPrescTable[8]= {0U,0U,0U,0U,1U,2U,3U,4U};
127+
constuint32_tMSIRangeTable[16]= {100000U,200000U,400000U,800000U,1000000U,2000000U, \
128+
4000000U,8000000U,16000000U,24000000U,32000000U,48000000U, \
129+
0U,0U,0U,0U};/* MISRAC-2012: 0U for unexpected value */
130+
/**
131+
* @}
132+
*/
133+
134+
/** @addtogroup STM32L5xx_System_Private_FunctionPrototypes
135+
* @{
136+
*/
137+
138+
/**
139+
* @}
140+
*/
141+
142+
/** @addtogroup STM32L5xx_System_Private_Functions
143+
* @{
144+
*/
145+
146+
/**
147+
* @brief Setup the microcontroller system.
148+
* @retval None
149+
*/
150+
151+
voidSystemInit(void)
152+
{
153+
/* Configure the Vector Table location -------------------------------------*/
154+
#if defined(USER_VECT_TAB_ADDRESS)
155+
SCB->VTOR=VECT_TAB_BASE_ADDRESS |VECT_TAB_OFFSET;
156+
#endif
157+
158+
/* FPU settings ------------------------------------------------------------*/
159+
#if (__FPU_PRESENT==1)&& (__FPU_USED==1)
160+
SCB->CPACR |= ((3UL <<20U)|(3UL <<22U));/* set CP10 and CP11 Full Access */
161+
#endif
162+
}
163+
164+
/**
165+
* @brief Update SystemCoreClock variable according to Clock Register Values.
166+
* The SystemCoreClock variable contains the core clock (HCLK), it can
167+
* be used by the user application to setup the SysTick timer or configure
168+
* other parameters.
169+
*
170+
* @note Each time the core clock (HCLK) changes, this function must be called
171+
* to update SystemCoreClock variable value. Otherwise, any configuration
172+
* based on this variable will be incorrect.
173+
*
174+
* @note - The system frequency computed by this function is not the real
175+
* frequency in the chip. It is calculated based on the predefined
176+
* constant and the selected clock source:
177+
*
178+
* - If SYSCLK source is MSI, SystemCoreClock will contain the MSI_VALUE(*)
179+
*
180+
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
181+
*
182+
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
183+
*
184+
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
185+
* or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL factors.
186+
*
187+
* (*) MSI_VALUE is a constant defined in stm32l5xx_hal.h file (default value
188+
* 4 MHz) but the real value may vary depending on the variations
189+
* in voltage and temperature.
190+
*
191+
* (**) HSI_VALUE is a constant defined in stm32l5xx_hal.h file (default value
192+
* 16 MHz) but the real value may vary depending on the variations
193+
* in voltage and temperature.
194+
*
195+
* (***) HSE_VALUE is a constant defined in stm32l5xx_hal.h file (default value
196+
* 8 MHz), user has to ensure that HSE_VALUE is same as the real
197+
* frequency of the crystal used. Otherwise, this function may
198+
* have wrong result.
199+
*
200+
* - The result of this function could be not correct when using fractional
201+
* value for HSE crystal.
202+
*
203+
* @retval None
204+
*/
205+
voidSystemCoreClockUpdate(void)
206+
{
207+
uint32_ttmp,msirange,pllvco,pllsource,pllm,pllr;
208+
209+
/* Get MSI Range frequency--------------------------------------------------*/
210+
if((RCC->CR&RCC_CR_MSIRGSEL)==0U)
211+
{/* MSISRANGE from RCC_CSR applies */
212+
msirange= (RCC->CSR&RCC_CSR_MSISRANGE) >>8U;
213+
}
214+
else
215+
{/* MSIRANGE from RCC_CR applies */
216+
msirange= (RCC->CR&RCC_CR_MSIRANGE) >>4U;
217+
}
218+
/*MSI frequency range in HZ*/
219+
msirange=MSIRangeTable[msirange];
220+
221+
/* Get SYSCLK source -------------------------------------------------------*/
222+
switch (RCC->CFGR&RCC_CFGR_SWS)
223+
{
224+
case0x00:/* MSI used as system clock source */
225+
SystemCoreClock=msirange;
226+
break;
227+
228+
case0x04:/* HSI used as system clock source */
229+
SystemCoreClock=HSI_VALUE;
230+
break;
231+
232+
case0x08:/* HSE used as system clock source */
233+
SystemCoreClock=HSE_VALUE;
234+
break;
235+
236+
case0x0C:/* PLL used as system clock source */
237+
/* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN
238+
SYSCLK = PLL_VCO / PLLR
239+
*/
240+
pllsource= (RCC->PLLCFGR&RCC_PLLCFGR_PLLSRC);
241+
pllm= ((RCC->PLLCFGR&RCC_PLLCFGR_PLLM) >>4U)+1U ;
242+
243+
switch (pllsource)
244+
{
245+
case0x02:/* HSI used as PLL clock source */
246+
pllvco= (HSI_VALUE /pllm);
247+
break;
248+
249+
case0x03:/* HSE used as PLL clock source */
250+
pllvco= (HSE_VALUE /pllm);
251+
break;
252+
253+
default:/* MSI used as PLL clock source */
254+
pllvco= (msirange /pllm);
255+
break;
256+
}
257+
pllvco=pllvco* ((RCC->PLLCFGR&RCC_PLLCFGR_PLLN) >>8U);
258+
pllr= (((RCC->PLLCFGR&RCC_PLLCFGR_PLLR) >>25U)+1U)*2U;
259+
SystemCoreClock=pllvco/pllr;
260+
break;
261+
262+
default:
263+
SystemCoreClock=msirange;
264+
break;
265+
}
266+
/* Compute HCLK clock frequency --------------------------------------------*/
267+
/* Get HCLK prescaler */
268+
tmp=AHBPrescTable[((RCC->CFGR&RCC_CFGR_HPRE) >>4U)];
269+
/* HCLK clock frequency */
270+
SystemCoreClock >>=tmp;
271+
}
272+
273+
274+
/**
275+
* @}
276+
*/
277+
278+
/**
279+
* @}
280+
*/
281+
282+
/**
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* @}
284+
*/
285+
286+
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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