Movatterモバイル変換

[0]ホーム
URL:

Skip to content

Navigation Menu

Sign in
Appearance settings

Search code, repositories, users, issues, pull requests...

Provide feedback

We read every piece of feedback, and take your input very seriously.

Saved searches

Use saved searches to filter your results more quickly

 Sign up
Appearance settings

Commit4165032

Browse files
committed
system(U5): update STM32U5xx CMSIS Drivers to v1.3.1
Included in STM32CubeU5 FW v1.4.0Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
1 parente2b913a commit4165032

File tree

7 files changed

+38
-24
lines changed

7 files changed

+38
-24
lines changed

‎system/Drivers/CMSIS/Device/ST/STM32U5xx/Include/Templates/partition_stm32u595xx.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22
******************************************************************************
33
* @file partition_stm32u595xx.h
44
* @author MCD Application Team
5-
* @brief CMSISSTM32U599xx Device Initial Setup for Secure / Non-Secure Zones
5+
* @brief CMSISSTM32U595xx Device Initial Setup for Secure / Non-Secure Zones
66
* for ARMCM33 based on CMSIS CORE partition_ARMCM33.h Template.
77
*
88
* This file contains:

‎system/Drivers/CMSIS/Device/ST/STM32U5xx/Include/Templates/partition_stm32u5f7xx.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
11
/**
22
******************************************************************************
3-
* @filepartition_stm32u5f9xx.h
3+
* @filepartition_stm32u5f7xx.h
44
* @author MCD Application Team
5-
* @brief CMSISSTM32U5F9xx Device Initial Setup for Secure / Non-Secure Zones
5+
* @brief CMSISSTM32U5F7xx Device Initial Setup for Secure / Non-Secure Zones
66
* for ARMCM33 based on CMSIS CORE partition_ARMCM33.h Template.
77
*
88
* This file contains:

‎system/Drivers/CMSIS/Device/ST/STM32U5xx/Include/stm32u5f7xx.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -26361,11 +26361,11 @@ typedef struct
2636126361
*/
2636226362

2636326363
/******************************* ADC Instances ********************************/
26364-
#define IS_ADC_ALL_INSTANCE(INSTANCE) (((INSTANCE) == ADC1_NS)|| \
26365-
((INSTANCE) == ADC1_S) || \
26364+
#define IS_ADC_ALL_INSTANCE(INSTANCE) (((INSTANCE) == ADC1_NS)|| \
26365+
((INSTANCE) == ADC1_S)|| \
2636626366
((INSTANCE) == ADC2_NS) || \
2636726367
((INSTANCE) == ADC2_S) || \
26368-
((INSTANCE) == ADC4_NS)|| \
26368+
((INSTANCE) == ADC4_NS)|| \
2636926369
((INSTANCE) == ADC4_S))
2637026370

2637126371
#define IS_ADC_MULTIMODE_MASTER_INSTANCE(INSTANCE) (((INSTANCE) == ADC1_NS) || \

‎system/Drivers/CMSIS/Device/ST/STM32U5xx/Include/stm32u5g7xx.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -27335,11 +27335,11 @@ typedef struct
2733527335
*/
2733627336

2733727337
/******************************* ADC Instances ********************************/
27338-
#define IS_ADC_ALL_INSTANCE(INSTANCE) (((INSTANCE) == ADC1_NS)|| \
27339-
((INSTANCE) == ADC1_S) || \
27338+
#define IS_ADC_ALL_INSTANCE(INSTANCE) (((INSTANCE) == ADC1_NS)|| \
27339+
((INSTANCE) == ADC1_S)|| \
2734027340
((INSTANCE) == ADC2_NS) || \
2734127341
((INSTANCE) == ADC2_S) || \
27342-
((INSTANCE) == ADC4_NS)|| \
27342+
((INSTANCE) == ADC4_NS)|| \
2734327343
((INSTANCE) == ADC4_S))
2734427344

2734527345
#define IS_ADC_MULTIMODE_MASTER_INSTANCE(INSTANCE) (((INSTANCE) == ADC1_NS) || \

‎system/Drivers/CMSIS/Device/ST/STM32U5xx/Include/stm32u5xx.h

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -66,14 +66,14 @@
6666
/* #define STM32U585xx *//*!< STM32U585CIU6 STM32U585CIT6 STM32U585RIT6 STM32U585VIT6 STM32U585AII6 STM32U585QII6 STM32U585ZIT6 STM32U585OIY6Q STM32U585VIT6Q STM32U585QEI6Q STM32U585RIT6Q STM32U585AII6Q STM32U585CIU6Q STM32U585CIT6Q STM32U585ZET6Q Devices */
6767
/* #define STM32U595xx *//*!< STM32U595AJH6 STM32U595ZJT6 STM32U595QJI6 STM32U595VJT6 STM32U595RJT6 STM32U595AJH6Q STM32U595ZJY6QTR STM32U595ZJT6Q STM32U595QJI6Q STM32U595VJT6Q STM32U595RJT6Q STM32U595AIH6 STM32U595ZIT6 STM32U595QII6 STM32U595VIT6 STM32U595RIT6 STM32U595AIH6Q STM32U595ZIY6QTR STM32U595ZIT6Q STM32U595QII6Q STM32U595VIT6Q STM32U595RIT6Q Devices */
6868
/* #define STM32U599xx *//*!< STM32U599VJT6 STM32U599NJH6Q STM32U599BJY6QTR STM32U599ZJY6QTR STM32U599ZJT6Q STM32U599VJT6Q STM32U599NIH6Q STM32U599ZIY6QTR STM32U599ZIT6Q STM32U599VIT6Q Devices */
69-
/* #define STM32U5A5xx *//*!< STM32U5A5AJH6 STM32U5A5ZJT6 STM32U5A5QJI6 STM32U5A5VJT6 STM32U5A5RJT6 STM32U5A5AJH6Q STM32U5A5ZJY6QTR STM32U5A5ZJT6Q STM32U5A5QJI6Q STM32U5A5VJT6Q STM32U5A5RJT6Q Devices */
69+
/* #define STM32U5A5xx *//*!< STM32U5A5AJH6 STM32U5A5ZJT6 STM32U5A5QJI6 STM32U5A5VJT6 STM32U5A5RJT6 STM32U5A5AJH6Q STM32U5A5ZJY6QTR STM32U5A5ZJT6Q STM32U5A5QJI6Q STM32U5A5VJT6Q STM32U5A5RJT6QSTM32U5A5QII3QDevices */
7070
/* #define STM32U5A9xx *//*!< STM32U5A9NJH6Q STM32U5A9BJY6QTR STM32U5A9ZJY6QTR STM32U5A9ZJT6Q STM32U5A9VJT6Q Devices */
71-
/* #define STM32U5F7xx *//*!< STM32U5F7VJT6Q STM32U5F7VJT6DevicesSTM32U5F7VIT6Q STM32U5F7VIT6 Devices */
71+
/* #define STM32U5F7xx *//*!< STM32U5F7VJT6Q STM32U5F7VJT6 STM32U5F7VIT6Q STM32U5F7VIT6 Devices */
7272
/* #define STM32U5G7xx *//*!< STM32U5G7VJT6Q STM32U5G7VJT6 Devices */
73-
/* #define STM32U5F9xx *//*!< STM32U5F9NJH6Q STM32U5F9BJY6QTR STM32U5F9ZJJ6QTR STM32U5F9ZJT6Q STM32U5F9VJT6Q Devices */
73+
/* #define STM32U5F9xx *//*!< STM32U5F9NJH6Q STM32U5F9BJY6QTR STM32U5F9ZJJ6QTR STM32U5F9ZJT6Q STM32U5F9VJT6QSTM32U5F9ZIJ6QTR STM32U5F9ZIT6Q STM32U5F9VIT6QDevices */
7474
/* #define STM32U5G9xx *//*!< STM32U5G9NJH6Q STM32U5G9BJY6QTR STM32U5G9ZJJ6QTR STM32U5G9ZJT6Q STM32U5G9VJT6Q Devices */
75-
/* #define STM32U535xx *//*!< STM32U535CET6 STM32U535CEU6 STM32U535RET6 STM32U535REI6 STM32U535VET6 STM32U535VEI6 STM32U535CET6Q STM32U535CEU6Q STM32U535RET6Q STM32U535REI6Q STM32U535VET6Q STM32U535VEI6Q STM32U535NEY6Q STM32U535JEY6QDevice */
76-
/* #define STM32U545xx *//*!< STM32U545CET6 STM32U545CEU6 STM32U545RET6 STM32U545REI6 STM32U545VET6 STM32U545VEI6 STM32U545CET6Q STM32U545CEU6Q STM32U545RET6Q STM32U545REI6Q STM32U545VET6Q STM32U545VEI6Q STM32U545NEY6Q STM32U545JEY6QDevice */
75+
/* #define STM32U535xx *//*!< STM32U535CET6 STM32U535CEU6 STM32U535RET6 STM32U535REI6 STM32U535VET6 STM32U535VEI6 STM32U535CET6Q STM32U535CEU6Q STM32U535RET6Q STM32U535REI6Q STM32U535VET6Q STM32U535VEI6Q STM32U535NEY6Q STM32U535JEY6QDevices */
76+
/* #define STM32U545xx *//*!< STM32U545CET6 STM32U545CEU6 STM32U545RET6 STM32U545REI6 STM32U545VET6 STM32U545VEI6 STM32U545CET6Q STM32U545CEU6Q STM32U545RET6Q STM32U545REI6Q STM32U545VET6Q STM32U545VEI6Q STM32U545NEY6Q STM32U545JEY6QDevices */
7777
#endif
7878

7979
/* Tip: To avoid modifying this file each time you need to switch between these
@@ -89,11 +89,11 @@
8989
#endif/* USE_HAL_DRIVER */
9090

9191
/**
92-
* @brief CMSIS Device version number 1.3.0
92+
* @brief CMSIS Device version number 1.3.1
9393
*/
9494
#define__STM32U5_CMSIS_VERSION_MAIN (0x01U)/*!< [31:24] main version */
9595
#define__STM32U5_CMSIS_VERSION_SUB1 (0x03U)/*!< [23:16] sub1 version */
96-
#define__STM32U5_CMSIS_VERSION_SUB2 (0x00U)/*!< [15:8] sub2 version */
96+
#define__STM32U5_CMSIS_VERSION_SUB2 (0x01U)/*!< [15:8] sub2 version */
9797
#define__STM32U5_CMSIS_VERSION_RC (0x00U)/*!< [7:0] release candidate */
9898
#define__STM32U5_CMSIS_VERSION ((__STM32U5_CMSIS_VERSION_MAIN << 24U)\
9999
|(__STM32U5_CMSIS_VERSION_SUB1 << 16U)\

‎system/Drivers/CMSIS/Device/ST/STM32U5xx/Release_Notes.html

Lines changed: 21 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -30,19 +30,33 @@ <h1 id="release-notes-for-stm32u5xx-cmsis">Release Notes for <mark> STM32U5xx C
3030
<divclass="col-sm-12 col-lg-8">
3131
<h1id="update-history"><strong>Update History</strong></h1>
3232
<divclass="collapse">
33-
<inputtype="checkbox"id="collapse-section5"checkedaria-hidden="true"><labelfor="collapse-section5"checkedaria-hidden="true"><strong>V1.3.0 /09-June-2023</strong></label>
33+
<inputtype="checkbox"id="collapse-section6"checkedaria-hidden="true"><labelfor="collapse-section6"checkedaria-hidden="true"><strong>V1.3.1 /20-October-2023</strong></label>
3434
<div>
3535
<h2id="main-changes">Main Changes</h2>
3636
<p><strong>CMSIS Device</strong> Official Release version of bits and registers definition aligned with RM0456 (STM32U5 reference manual)</p>
3737
<ul>
38+
<li>Update STM32U5A5xx devices list with STM32U5A5QII3Q under “stm32u5xx.h” file</li>
39+
</ul>
40+
<h2id="backward-compatibility">Backward Compatibility</h2>
41+
<ul>
42+
<li>N/A</li>
43+
</ul>
44+
</div>
45+
</div>
46+
<divclass="collapse">
47+
<inputtype="checkbox"id="collapse-section5"aria-hidden="true"><labelfor="collapse-section5"checkedaria-hidden="true"><strong>V1.3.0 / 09-June-2023</strong></label>
48+
<div>
49+
<h2id="main-changes-1">Main Changes</h2>
50+
<p><strong>CMSIS Device</strong> Official Release version of bits and registers definition aligned with RM0456 (STM32U5 reference manual)</p>
51+
<ul>
3852
<li><strong>Support of new STM32U5F9xx, STM32U5G9xx, STM32U5F7xx and STM32U5G7xx devices</strong>:
3953
<ul>
4054
<li>Add “stm32u5f9xx.h”, “stm32u5g9xx.h”, “stm32u5f7xx.h” and “stm32u5g7xx.h” files</li>
4155
<li>Add startup files “startup_stm32u5f9xx.s”, “startup_stm32u5g9xx.s”, “startup_stm32u5f7xx.s” and “startup_stm32u5g7xx.s” for EWARM, STM32CubeIDE and MDK-ARM toolchains</li>
4256
<li>Add linker files for EWARM and STM32CubeIDE toolchains of STM32U5F9xx/STM32U5G9xx/STM32U5F7xx/STM32U5G7xx devices</li>
4357
</ul></li>
4458
</ul>
45-
<h2id="backward-compatibility">Backward Compatibility</h2>
59+
<h2id="backward-compatibility-1">Backward Compatibility</h2>
4660
<ul>
4761
<li>N/A</li>
4862
</ul>
@@ -51,7 +65,7 @@ <h2 id="backward-compatibility">Backward Compatibility</h2>
5165
<divclass="collapse">
5266
<inputtype="checkbox"id="collapse-section4"aria-hidden="true"><labelfor="collapse-section4"checkedaria-hidden="true"><strong>V1.2.0 / 08-June-2023</strong></label>
5367
<div>
54-
<h2id="main-changes-1">Main Changes</h2>
68+
<h2id="main-changes-2">Main Changes</h2>
5569
<p><strong>CMSIS Device</strong> Official Release version of bits and registers definition aligned with RM0456 (STM32U5 reference manual)</p>
5670
<ul>
5771
<li><strong>Support of stm32u535xx and stm32u545xx devices</strong>:
@@ -104,7 +118,7 @@ <h2 id="main-changes-1">Main Changes</h2>
104118
<li>Rename ADC4_PW_VREFSECSMP to ADC4_PWRR_VREFSECSMP</li>
105119
</ul></li>
106120
</ul>
107-
<h2id="backward-compatibility-1">Backward Compatibility</h2>
121+
<h2id="backward-compatibility-2">Backward Compatibility</h2>
108122
<ul>
109123
<li>N/A</li>
110124
</ul>
@@ -113,7 +127,7 @@ <h2 id="backward-compatibility-1">Backward Compatibility</h2>
113127
<divclass="collapse">
114128
<inputtype="checkbox"id="collapse-section3"aria-hidden="true"><labelfor="collapse-section3"checkedaria-hidden="true"><strong>V1.1.0 / 16-February-2022</strong></label>
115129
<div>
116-
<h2id="main-changes-2">Main Changes</h2>
130+
<h2id="main-changes-3">Main Changes</h2>
117131
<ul>
118132
<li><strong>CMSIS Device</strong> Maintenance Release version of bits and registers definition aligned with RM0456 (STM32U5 reference manual)
119133
<ul>
@@ -143,7 +157,7 @@ <h2 id="main-changes-2">Main Changes</h2>
143157
<divclass="collapse">
144158
<inputtype="checkbox"id="collapse-section2"aria-hidden="true"><labelfor="collapse-section2"checkedaria-hidden="true"><strong>V1.0.1 / 01-October-2021</strong></label>
145159
<div>
146-
<h2id="main-changes-3">Main Changes</h2>
160+
<h2id="main-changes-4">Main Changes</h2>
147161
<ul>
148162
<li>Rename OTG_FS_BASE_NS to USB_OTG_FS_BASE_NS define</li>
149163
<li>Rename OTG_FS_BASE_S to USB_OTG_FS_BASE_S define</li>
@@ -155,7 +169,7 @@ <h2 id="main-changes-3">Main Changes</h2>
155169
<divclass="collapse">
156170
<inputtype="checkbox"id="collapse-section1"aria-hidden="true"><labelfor="collapse-section1"checkedaria-hidden="true"><strong>V1.0.0 / 28-June-2021</strong></label>
157171
<div>
158-
<h2id="main-changes-4">Main Changes</h2>
172+
<h2id="main-changes-5">Main Changes</h2>
159173
<ul>
160174
<li>First official release version of bits and registers definition aligned with RM0456 (STM32U5 reference manual)</li>
161175
</ul>

‎system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@
1616
* STM32L4: 1.7.3
1717
* STM32L5: 1.0.5
1818
* STM32MP1: 1.6.0
19-
* STM32U5: 1.3.0
19+
* STM32U5: 1.3.1
2020
* STM32WB: 1.12.0
2121
* STM32WL: 1.2.0
2222

0 commit comments

Comments
 (0)
[8]ページ先頭
©2009-2025 Movatter.jp