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Commit60e21a0

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wildea01Marc Zyngier
authored and
Marc Zyngier
committed
arm64: KVM: Take S1 walks into account when determining S2 write faults
The WnR bit in the HSR/ESR_EL2 indicates whether a data abort wasgenerated by a read or a write instruction. For stage 2 data abortsgenerated by a stage 1 translation table walk (i.e. the actual pagetable access faults at EL2), the WnR bit therefore reports whether theinstruction generating the walk was a load or a store, *not* whether thepage table walker was reading or writing the entry.For page tables marked as read-only at stage 2 (e.g. due to KSM mergingthem with the tables from another guest), this could result in livelock,where a page table walk generated by a load instruction attempts toset the access flag in the stage 1 descriptor, but fails to triggerCoW in the host since only a read fault is reported.This patch modifies the arm64 kvm_vcpu_dabt_iswrite function totake into account stage 2 faults in stage 1 walks. Since DBM cannot bedisabled at EL2 for CPUs that implement it, we assume that these faultsare always causes by writes, avoiding the livelock situation at theexpense of occasional, spurious CoWs.We could, in theory, do a bit better by checking the guest TCRconfiguration and inspecting the page table to see why the PTE faulted.However, I doubt this is measurable in practice, and the threat oflivelock is real.Cc: <stable@vger.kernel.org>Cc: Julien Grall <julien.grall@arm.com>Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>Signed-off-by: Will Deacon <will.deacon@arm.com>
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‎arch/arm64/include/asm/kvm_emulate.h‎

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -178,11 +178,6 @@ static inline bool kvm_vcpu_dabt_isvalid(const struct kvm_vcpu *vcpu)
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return !!(kvm_vcpu_get_hsr(vcpu)&ESR_ELx_ISV);
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}
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staticinlineboolkvm_vcpu_dabt_iswrite(conststructkvm_vcpu*vcpu)
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{
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return !!(kvm_vcpu_get_hsr(vcpu)&ESR_ELx_WNR);
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}
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staticinlineboolkvm_vcpu_dabt_issext(conststructkvm_vcpu*vcpu)
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{
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return !!(kvm_vcpu_get_hsr(vcpu)&ESR_ELx_SSE);
@@ -203,6 +198,12 @@ static inline bool kvm_vcpu_dabt_iss1tw(const struct kvm_vcpu *vcpu)
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return !!(kvm_vcpu_get_hsr(vcpu)&ESR_ELx_S1PTW);
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}
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staticinlineboolkvm_vcpu_dabt_iswrite(conststructkvm_vcpu*vcpu)
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{
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return !!(kvm_vcpu_get_hsr(vcpu)&ESR_ELx_WNR)||
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kvm_vcpu_dabt_iss1tw(vcpu);/* AF/DBM update */
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}
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staticinlineboolkvm_vcpu_dabt_is_cm(conststructkvm_vcpu*vcpu)
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{
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return !!(kvm_vcpu_get_hsr(vcpu)&ESR_ELx_CM);

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