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Commit552ae76

Browse files
author
Marc Zyngier
committed
arm64: Detect the ARMv8.4 TTL feature
In order to reduce the cost of TLB invalidation, the ARMv8.4 TTLfeature allows TLBs to be issued with a level allowing for quickerinvalidation.Let's detect the feature for now. Further patches will implementits actual usage.Reviewed-by : Suzuki K Polose <suzuki.poulose@arm.com>Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>Signed-off-by: Marc Zyngier <maz@kernel.org>
1 parent9ebcfad commit552ae76

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3 files changed

+14
-1
lines changed

3 files changed

+14
-1
lines changed

‎arch/arm64/include/asm/cpucaps.h‎

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@@ -62,7 +62,8 @@
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#defineARM64_HAS_GENERIC_AUTH52
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#defineARM64_HAS_32BIT_EL153
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#defineARM64_BTI54
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#defineARM64_HAS_ARMv8_4_TTL55
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#defineARM64_NCAPS55
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#defineARM64_NCAPS56
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#endif/* __ASM_CPUCAPS_H */

‎arch/arm64/include/asm/sysreg.h‎

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Original file line numberDiff line numberDiff line change
@@ -746,6 +746,7 @@
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/* id_aa64mmfr2 */
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#defineID_AA64MMFR2_E0PD_SHIFT60
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#defineID_AA64MMFR2_TTL_SHIFT48
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#defineID_AA64MMFR2_FWB_SHIFT40
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#defineID_AA64MMFR2_AT_SHIFT32
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#defineID_AA64MMFR2_LVA_SHIFT16

‎arch/arm64/kernel/cpufeature.c‎

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@@ -323,6 +323,7 @@ static const struct arm64_ftr_bits ftr_id_aa64mmfr1[] = {
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staticconststructarm64_ftr_bitsftr_id_aa64mmfr2[]= {
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ARM64_FTR_BITS(FTR_HIDDEN,FTR_NONSTRICT,FTR_LOWER_SAFE,ID_AA64MMFR2_E0PD_SHIFT,4,0),
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ARM64_FTR_BITS(FTR_HIDDEN,FTR_STRICT,FTR_LOWER_SAFE,ID_AA64MMFR2_TTL_SHIFT,4,0),
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ARM64_FTR_BITS(FTR_HIDDEN,FTR_STRICT,FTR_LOWER_SAFE,ID_AA64MMFR2_FWB_SHIFT,4,0),
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ARM64_FTR_BITS(FTR_VISIBLE,FTR_STRICT,FTR_LOWER_SAFE,ID_AA64MMFR2_AT_SHIFT,4,0),
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ARM64_FTR_BITS(FTR_HIDDEN,FTR_STRICT,FTR_LOWER_SAFE,ID_AA64MMFR2_LVA_SHIFT,4,0),
@@ -1882,6 +1883,16 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
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.matches=has_cpuid_feature,
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.cpu_enable=cpu_has_fwb,
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},
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{
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.desc="ARMv8.4 Translation Table Level",
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.type=ARM64_CPUCAP_SYSTEM_FEATURE,
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.capability=ARM64_HAS_ARMv8_4_TTL,
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.sys_reg=SYS_ID_AA64MMFR2_EL1,
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.sign=FTR_UNSIGNED,
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.field_pos=ID_AA64MMFR2_TTL_SHIFT,
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.min_field_value=1,
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.matches=has_cpuid_feature,
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},
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#ifdefCONFIG_ARM64_HW_AFDBM
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{
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/*

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