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Commit24633d9

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vaibhavk2Ingo Molnar
authored and
Ingo Molnar
committed
perf/x86/intel/uncore: Add BW counters for GT, IA and IO breakdown
Linux only has support to read total DDR reads and writes. Here weadd support to enable bandwidth breakdown-GT, IA and IO. Breakdownof BW is important to debug and optimize memory access. This can alsobe used for telemetry and improving the system software.The offsets forGT, IA and IO are added and these free running counters can be accessedvia MMIO space.The BW breakdown can be measured using the following cmd: perf stat -e uncore_imc/gt_requests/,uncore_imc/ia_requests/,uncore_imc/io_requests/ 30.57 MiB uncore_imc/gt_requests/ 1346.13 MiB uncore_imc/ia_requests/ 190.97 MiB uncore_imc/io_requests/ 5.984572733 seconds time elapsed BW/s = <gt,ia,io>_requests/time elapsedSigned-off-by: Vaibhav Shankar <vaibhav.shankar@intel.com>Signed-off-by: Ingo Molnar <mingo@kernel.org>Link:https://lore.kernel.org/r/20200814022234.23605-1-vaibhav.shankar@intel.com
1 parent50f6c7d commit24633d9

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1 file changed

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‎arch/x86/events/intel/uncore_snb.c‎

Lines changed: 49 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -390,6 +390,18 @@ static struct uncore_event_desc snb_uncore_imc_events[] = {
390390
INTEL_UNCORE_EVENT_DESC(data_writes.scale,"6.103515625e-5"),
391391
INTEL_UNCORE_EVENT_DESC(data_writes.unit,"MiB"),
392392

393+
INTEL_UNCORE_EVENT_DESC(gt_requests,"event=0x03"),
394+
INTEL_UNCORE_EVENT_DESC(gt_requests.scale,"6.103515625e-5"),
395+
INTEL_UNCORE_EVENT_DESC(gt_requests.unit,"MiB"),
396+
397+
INTEL_UNCORE_EVENT_DESC(ia_requests,"event=0x04"),
398+
INTEL_UNCORE_EVENT_DESC(ia_requests.scale,"6.103515625e-5"),
399+
INTEL_UNCORE_EVENT_DESC(ia_requests.unit,"MiB"),
400+
401+
INTEL_UNCORE_EVENT_DESC(io_requests,"event=0x05"),
402+
INTEL_UNCORE_EVENT_DESC(io_requests.scale,"6.103515625e-5"),
403+
INTEL_UNCORE_EVENT_DESC(io_requests.unit,"MiB"),
404+
393405
{/* end: all zeroes */ },
394406
};
395407

@@ -405,13 +417,35 @@ static struct uncore_event_desc snb_uncore_imc_events[] = {
405417
#defineSNB_UNCORE_PCI_IMC_DATA_WRITES_BASE0x5054
406418
#defineSNB_UNCORE_PCI_IMC_CTR_BASESNB_UNCORE_PCI_IMC_DATA_READS_BASE
407419

420+
/* BW break down- legacy counters */
421+
#defineSNB_UNCORE_PCI_IMC_GT_REQUESTS0x3
422+
#defineSNB_UNCORE_PCI_IMC_GT_REQUESTS_BASE0x5040
423+
#defineSNB_UNCORE_PCI_IMC_IA_REQUESTS0x4
424+
#defineSNB_UNCORE_PCI_IMC_IA_REQUESTS_BASE0x5044
425+
#defineSNB_UNCORE_PCI_IMC_IO_REQUESTS0x5
426+
#defineSNB_UNCORE_PCI_IMC_IO_REQUESTS_BASE0x5048
427+
408428
enumperf_snb_uncore_imc_freerunning_types {
409-
SNB_PCI_UNCORE_IMC_DATA=0,
429+
SNB_PCI_UNCORE_IMC_DATA_READS=0,
430+
SNB_PCI_UNCORE_IMC_DATA_WRITES,
431+
SNB_PCI_UNCORE_IMC_GT_REQUESTS,
432+
SNB_PCI_UNCORE_IMC_IA_REQUESTS,
433+
SNB_PCI_UNCORE_IMC_IO_REQUESTS,
434+
410435
SNB_PCI_UNCORE_IMC_FREERUNNING_TYPE_MAX,
411436
};
412437

413438
staticstructfreerunning_counterssnb_uncore_imc_freerunning[]= {
414-
[SNB_PCI_UNCORE_IMC_DATA]= {SNB_UNCORE_PCI_IMC_DATA_READS_BASE,0x4,0x0,2,32 },
439+
[SNB_PCI_UNCORE_IMC_DATA_READS]= {SNB_UNCORE_PCI_IMC_DATA_READS_BASE,
440+
0x0,0x0,1,32 },
441+
[SNB_PCI_UNCORE_IMC_DATA_READS]= {SNB_UNCORE_PCI_IMC_DATA_WRITES_BASE,
442+
0x0,0x0,1,32 },
443+
[SNB_PCI_UNCORE_IMC_GT_REQUESTS]= {SNB_UNCORE_PCI_IMC_GT_REQUESTS_BASE,
444+
0x0,0x0,1,32 },
445+
[SNB_PCI_UNCORE_IMC_IA_REQUESTS]= {SNB_UNCORE_PCI_IMC_IA_REQUESTS_BASE,
446+
0x0,0x0,1,32 },
447+
[SNB_PCI_UNCORE_IMC_IO_REQUESTS]= {SNB_UNCORE_PCI_IMC_IO_REQUESTS_BASE,
448+
0x0,0x0,1,32 },
415449
};
416450

417451
staticstructattribute*snb_uncore_imc_formats_attr[]= {
@@ -525,6 +559,18 @@ static int snb_uncore_imc_event_init(struct perf_event *event)
525559
base=SNB_UNCORE_PCI_IMC_DATA_WRITES_BASE;
526560
idx=UNCORE_PMC_IDX_FREERUNNING;
527561
break;
562+
caseSNB_UNCORE_PCI_IMC_GT_REQUESTS:
563+
base=SNB_UNCORE_PCI_IMC_GT_REQUESTS_BASE;
564+
idx=UNCORE_PMC_IDX_FREERUNNING;
565+
break;
566+
caseSNB_UNCORE_PCI_IMC_IA_REQUESTS:
567+
base=SNB_UNCORE_PCI_IMC_IA_REQUESTS_BASE;
568+
idx=UNCORE_PMC_IDX_FREERUNNING;
569+
break;
570+
caseSNB_UNCORE_PCI_IMC_IO_REQUESTS:
571+
base=SNB_UNCORE_PCI_IMC_IO_REQUESTS_BASE;
572+
idx=UNCORE_PMC_IDX_FREERUNNING;
573+
break;
528574
default:
529575
return-EINVAL;
530576
}
@@ -598,7 +644,7 @@ static struct intel_uncore_ops snb_uncore_imc_ops = {
598644

599645
staticstructintel_uncore_typesnb_uncore_imc= {
600646
.name="imc",
601-
.num_counters=2,
647+
.num_counters=5,
602648
.num_boxes=1,
603649
.num_freerunning_types=SNB_PCI_UNCORE_IMC_FREERUNNING_TYPE_MAX,
604650
.mmio_map_size=SNB_UNCORE_PCI_IMC_MAP_SIZE,

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