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Commite5603a2

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Mark x86's memory barrier inline assembly as clobbering the cpu flags.
x86's memory barrier assembly was marked as clobbering "memory" butnot "cc" even though 'addl' sets various flags. As it turns out gcc onx86 implicitly assumes "cc" on every inline assembler statement, soit's not a bug. But as that's poorly documented and might get copiedto architectures or compilers where that's not the case, it seemsbetter to be precise.Discussion: 20140919100016.GH4277@alap3.anarazel.deTo keep the code common, backpatch to 9.2 where explicit memorybarriers were introduced.
1 parentafaefa1 commite5603a2

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‎src/include/storage/barrier.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -75,7 +75,7 @@ extern slock_t dummy_spinlock;
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* "lock; addl" has worked for longer than "mfence".
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*/
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#definepg_memory_barrier()\
78-
__asm__ __volatile__ ("lock; addl $0,0(%%esp)" : : : "memory")
78+
__asm__ __volatile__ ("lock; addl $0,0(%%esp)" : : : "memory", "cc")
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#definepg_read_barrier()pg_compiler_barrier()
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#definepg_write_barrier()pg_compiler_barrier()
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#elif defined(__x86_64__)/* 64 bit x86 */
@@ -89,7 +89,7 @@ extern slock_t dummy_spinlock;
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* do those things, a compiler barrier should be enough.
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*/
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#definepg_memory_barrier()\
92-
__asm__ __volatile__ ("lock; addl $0,0(%%rsp)" : : : "memory")
92+
__asm__ __volatile__ ("lock; addl $0,0(%%rsp)" : : : "memory", "cc")
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#definepg_read_barrier()pg_compiler_barrier()
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#definepg_write_barrier()pg_compiler_barrier()
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#elif defined(__ia64__)|| defined(__ia64)

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