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Commitf044d71

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Use ARMv8 CRC instructions where available.
ARMv8 introduced special CPU instructions for calculating CRC-32C. Usethem, when available, for speed.Like with the similar Intel CRC instructions, several factors affectwhether the instructions can be used. The compiler intrinsics for them mustbe supported by the compiler, and the instructions must be supported by thetarget architecture. If the compilation target architecture does notsupport the instructions, but adding "-march=armv8-a+crc" makes themavailable, then we compile the code with a runtime check to determine ifthe host we're running on supports them or not.For the runtime check, use glibc getauxval() function. Unfortunately,that's not very portable, but I couldn't find any more portable way to doit. If getauxval() is not available, the CRC instructions will still beused if the target architecture supports them without any additionalcompiler flags, but the runtime check will not be available.Original patch by Yuqi Gu, heavily modified by me. Reviewed by AndresFreund, Thomas Munro.Discussion:https://www.postgresql.org/message-id/HE1PR0801MB1323D171938EABC04FFE7FA9E3110%40HE1PR0801MB1323.eurprd08.prod.outlook.com
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11 files changed

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‎config/c-compiler.m4

Lines changed: 34 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -667,3 +667,37 @@ if test x"$Ac_cachevar" = x"yes"; then
667667
fi
668668
undefine([Ac_cachevar])dnl
669669
])# PGAC_SSE42_CRC32_INTRINSICS
670+
671+
672+
# PGAC_ARMV8_CRC32C_INTRINSICS
673+
# -----------------------
674+
# Check if the compiler supports the CRC32C instructions using the __crc32cb,
675+
# __crc32ch, __crc32cw, and __crc32cd intrinsic functions. These instructions
676+
# were first introduced in ARMv8 in the optional CRC Extension, and became
677+
# mandatory in ARMv8.1.
678+
#
679+
# An optional compiler flag can be passed as argument (e.g.
680+
# -march=armv8-a+crc). If the intrinsics are supported, sets
681+
# pgac_armv8_crc32c_intrinsics, and CFLAGS_ARMV8_CRC32C.
682+
AC_DEFUN([PGAC_ARMV8_CRC32C_INTRINSICS],
683+
[define([Ac_cachevar],[AS_TR_SH([pgac_cv_armv8_crc32c_intrinsics_$1])])dnl
684+
AC_CACHE_CHECK([for __crc32cb, __crc32ch, __crc32cw, and __crc32cd with CFLAGS=$1],[Ac_cachevar],
685+
[pgac_save_CFLAGS=$CFLAGS
686+
CFLAGS="$pgac_save_CFLAGS$1"
687+
AC_LINK_IFELSE([AC_LANG_PROGRAM([#include <arm_acle.h>],
688+
[unsigned int crc = 0;
689+
crc = __crc32cb(crc, 0);
690+
crc = __crc32ch(crc, 0);
691+
crc = __crc32cw(crc, 0);
692+
crc = __crc32cd(crc, 0);
693+
/* return computed value, to prevent the above being optimized away */
694+
return crc == 0;])],
695+
[Ac_cachevar=yes],
696+
[Ac_cachevar=no])
697+
CFLAGS="$pgac_save_CFLAGS"])
698+
if test x"$Ac_cachevar" = x"yes"; then
699+
CFLAGS_ARMV8_CRC32C="$1"
700+
pgac_armv8_crc32c_intrinsics=yes
701+
fi
702+
undefine([Ac_cachevar])dnl
703+
])# PGAC_ARMV8_CRC32C_INTRINSICS

‎configure

Lines changed: 180 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -646,6 +646,7 @@ MSGMERGE
646646
MSGFMT_FLAGS
647647
MSGFMT
648648
PG_CRC32C_OBJS
649+
CFLAGS_ARMV8_CRC32C
649650
CFLAGS_SSE42
650651
have_win32_dbghelp
651652
HAVE_IPV6
@@ -17254,28 +17255,175 @@ if ac_fn_c_try_compile "$LINENO"; then :
1725417255
fi
1725517256
rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
1725617257

17258+
# Check for ARMv8 CRC Extension intrinsics to do CRC calculations.
17259+
#
17260+
# First check if __crc32c* intrinsics can be used with the default compiler
17261+
# flags. If not, check if adding -march=armv8-a+crc flag helps.
17262+
# CFLAGS_ARMV8_CRC32C is set if the extra flag is required.
17263+
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for __crc32cb, __crc32ch, __crc32cw, and __crc32cd with CFLAGS=" >&5
17264+
$as_echo_n "checking for __crc32cb, __crc32ch, __crc32cw, and __crc32cd with CFLAGS=... " >&6; }
17265+
if ${pgac_cv_armv8_crc32c_intrinsics_+:} false; then :
17266+
$as_echo_n "(cached) " >&6
17267+
else
17268+
pgac_save_CFLAGS=$CFLAGS
17269+
CFLAGS="$pgac_save_CFLAGS "
17270+
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
17271+
/* end confdefs.h. */
17272+
#include <arm_acle.h>
17273+
int
17274+
main ()
17275+
{
17276+
unsigned int crc = 0;
17277+
crc = __crc32cb(crc, 0);
17278+
crc = __crc32ch(crc, 0);
17279+
crc = __crc32cw(crc, 0);
17280+
crc = __crc32cd(crc, 0);
17281+
/* return computed value, to prevent the above being optimized away */
17282+
return crc == 0;
17283+
;
17284+
return 0;
17285+
}
17286+
_ACEOF
17287+
if ac_fn_c_try_link "$LINENO"; then :
17288+
pgac_cv_armv8_crc32c_intrinsics_=yes
17289+
else
17290+
pgac_cv_armv8_crc32c_intrinsics_=no
17291+
fi
17292+
rm -f core conftest.err conftest.$ac_objext \
17293+
conftest$ac_exeext conftest.$ac_ext
17294+
CFLAGS="$pgac_save_CFLAGS"
17295+
fi
17296+
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $pgac_cv_armv8_crc32c_intrinsics_" >&5
17297+
$as_echo "$pgac_cv_armv8_crc32c_intrinsics_" >&6; }
17298+
if test x"$pgac_cv_armv8_crc32c_intrinsics_" = x"yes"; then
17299+
CFLAGS_ARMV8_CRC32C=""
17300+
pgac_armv8_crc32c_intrinsics=yes
17301+
fi
17302+
17303+
if test x"$pgac_armv8_crc32c_intrinsics" != x"yes"; then
17304+
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for __crc32cb, __crc32ch, __crc32cw, and __crc32cd with CFLAGS=-march=armv8-a+crc" >&5
17305+
$as_echo_n "checking for __crc32cb, __crc32ch, __crc32cw, and __crc32cd with CFLAGS=-march=armv8-a+crc... " >&6; }
17306+
if ${pgac_cv_armv8_crc32c_intrinsics__march_armv8_apcrc+:} false; then :
17307+
$as_echo_n "(cached) " >&6
17308+
else
17309+
pgac_save_CFLAGS=$CFLAGS
17310+
CFLAGS="$pgac_save_CFLAGS -march=armv8-a+crc"
17311+
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
17312+
/* end confdefs.h. */
17313+
#include <arm_acle.h>
17314+
int
17315+
main ()
17316+
{
17317+
unsigned int crc = 0;
17318+
crc = __crc32cb(crc, 0);
17319+
crc = __crc32ch(crc, 0);
17320+
crc = __crc32cw(crc, 0);
17321+
crc = __crc32cd(crc, 0);
17322+
/* return computed value, to prevent the above being optimized away */
17323+
return crc == 0;
17324+
;
17325+
return 0;
17326+
}
17327+
_ACEOF
17328+
if ac_fn_c_try_link "$LINENO"; then :
17329+
pgac_cv_armv8_crc32c_intrinsics__march_armv8_apcrc=yes
17330+
else
17331+
pgac_cv_armv8_crc32c_intrinsics__march_armv8_apcrc=no
17332+
fi
17333+
rm -f core conftest.err conftest.$ac_objext \
17334+
conftest$ac_exeext conftest.$ac_ext
17335+
CFLAGS="$pgac_save_CFLAGS"
17336+
fi
17337+
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $pgac_cv_armv8_crc32c_intrinsics__march_armv8_apcrc" >&5
17338+
$as_echo "$pgac_cv_armv8_crc32c_intrinsics__march_armv8_apcrc" >&6; }
17339+
if test x"$pgac_cv_armv8_crc32c_intrinsics__march_armv8_apcrc" = x"yes"; then
17340+
CFLAGS_ARMV8_CRC32C="-march=armv8-a+crc"
17341+
pgac_armv8_crc32c_intrinsics=yes
17342+
fi
17343+
17344+
fi
17345+
17346+
17347+
# In order to detect at runtime, if the ARM CRC Extension is available,
17348+
# we will do "getauxval(AT_HWCAP) & HWCAP_CRC32". Check if we have
17349+
# everything we need for that.
17350+
for ac_func in getauxval
17351+
do :
17352+
ac_fn_c_check_func "$LINENO" "getauxval" "ac_cv_func_getauxval"
17353+
if test "x$ac_cv_func_getauxval" = xyes; then :
17354+
cat >>confdefs.h <<_ACEOF
17355+
#define HAVE_GETAUXVAL 1
17356+
_ACEOF
17357+
17358+
fi
17359+
done
17360+
17361+
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
17362+
/* end confdefs.h. */
17363+
17364+
#include <sys/auxv.h>
17365+
#include <asm/hwcap.h>
17366+
17367+
int
17368+
main ()
17369+
{
17370+
17371+
#ifndef AT_HWCAP
17372+
#error AT_HWCAP not defined
17373+
#endif
17374+
#ifndef HWCAP_CRC32
17375+
#error HWCAP_CRC32 not defined
17376+
#endif
17377+
17378+
;
17379+
return 0;
17380+
}
17381+
_ACEOF
17382+
if ac_fn_c_try_compile "$LINENO"; then :
17383+
HAVE_HWCAP_CRC32=1
17384+
fi
17385+
rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
17386+
1725717387
# Select CRC-32C implementation.
1725817388
#
17259-
# If we are targeting a processor that has SSE 4.2 instructions, we can use the
17260-
# special CRC instructions for calculating CRC-32C. If we're not targeting such
17261-
# a processor, but we can nevertheless produce code that uses the SSE
17262-
# intrinsics, perhaps with some extra CFLAGS, compile both implementations and
17263-
# select which one to use at runtime, depending on whether SSE 4.2 is supported
17264-
# by the processor we're running on.
17389+
# If we are targeting a processor that has Intel SSE 4.2 instructions, we can
17390+
# use the special CRC instructions for calculating CRC-32C. If we're not
17391+
# targeting such a processor, but we can nevertheless produce code that uses
17392+
# the SSE intrinsics, perhaps with some extra CFLAGS, compile both
17393+
# implementations and select which one to use at runtime, depending on whether
17394+
# SSE 4.2 is supported by the processor we're running on.
17395+
#
17396+
# Similarly, if we are targeting an ARM processor that has the CRC
17397+
# instructions that are part of the ARMv8 CRC Extension, use them. And if
17398+
# we're not targeting such a processor, but can nevertheless produce code that
17399+
# uses the CRC instructions, compile both, and select at runtime.
1726517400
#
1726617401
# You can override this logic by setting the appropriate USE_*_CRC32 flag to 1
1726717402
# in the template or configure command line.
17268-
if test x"$USE_SSE42_CRC32C" = x"" && test x"$USE_SSE42_CRC32C_WITH_RUNTIME_CHECK" = x"" && test x"$USE_SLICING_BY_8_CRC32C" = x""; then
17403+
if test x"$USE_SLICING_BY_8_CRC32C" = x"" && test x"$USE_SSE42_CRC32C" = x"" && test x"$USE_SSE42_CRC32C_WITH_RUNTIME_CHECK" = x"" && test x"$USE_ARMV8_CRC32C" = x"" && test x"$USE_ARMV8_CRC32C_WITH_RUNTIME_CHECK" = x""; then
17404+
# Use Intel SSE 4.2 if available.
1726917405
if test x"$pgac_sse42_crc32_intrinsics" = x"yes" && test x"$SSE4_2_TARGETED" = x"1" ; then
1727017406
USE_SSE42_CRC32C=1
1727117407
else
17272-
# the CPUID instruction is needed for the runtime check.
17408+
# Intel SSE 4.2, with runtime check? The CPUID instruction is needed for
17409+
# the runtime check.
1727317410
if test x"$pgac_sse42_crc32_intrinsics" = x"yes" && (test x"$pgac_cv__get_cpuid" = x"yes" || test x"$pgac_cv__cpuid" = x"yes"); then
1727417411
USE_SSE42_CRC32C_WITH_RUNTIME_CHECK=1
1727517412
else
17276-
# fall back to slicing-by-8 algorithm which doesn't require any special
17277-
# CPU support.
17278-
USE_SLICING_BY_8_CRC32C=1
17413+
# Use ARM CRC Extension if available.
17414+
if test x"$pgac_armv8_crc32c_intrinsics" = x"yes" && test x"$CFLAGS_ARMV8_CRC32C" = x""; then
17415+
USE_ARMV8_CRC32C=1
17416+
else
17417+
# ARM CRC Extension, with runtime check? The getauxval() function and
17418+
# HWCAP_CRC32 are needed for the runtime check.
17419+
if test x"$pgac_armv8_crc32c_intrinsics" = x"yes" && test x"$ac_cv_func_getauxval" = x"yes" && test x"$HAVE_HWCAP_CRC32" = x"1"; then
17420+
USE_ARMV8_CRC32C_WITH_RUNTIME_CHECK=1
17421+
else
17422+
# fall back to slicing-by-8 algorithm, which doesn't require any
17423+
# special CPU support.
17424+
USE_SLICING_BY_8_CRC32C=1
17425+
fi
17426+
fi
1727917427
fi
1728017428
fi
1728117429
fi
@@ -17295,16 +17443,34 @@ else
1729517443

1729617444
$as_echo "#define USE_SSE42_CRC32C_WITH_RUNTIME_CHECK 1" >>confdefs.h
1729717445

17298-
PG_CRC32C_OBJS="pg_crc32c_sse42.o pg_crc32c_sb8.opg_crc32c_choose.o"
17446+
PG_CRC32C_OBJS="pg_crc32c_sse42.o pg_crc32c_sb8.opg_crc32c_sse42_choose.o"
1729917447
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: SSE 4.2 with runtime check" >&5
1730017448
$as_echo "SSE 4.2 with runtime check" >&6; }
1730117449
else
17450+
if test x"$USE_ARMV8_CRC32C" = x"1"; then
17451+
17452+
$as_echo "#define USE_ARMV8_CRC32C 1" >>confdefs.h
17453+
17454+
PG_CRC32C_OBJS="pg_crc32c_armv8.o"
17455+
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: ARMv8 CRC instructions" >&5
17456+
$as_echo "ARMv8 CRC instructions" >&6; }
17457+
else
17458+
if test x"$USE_ARMV8_CRC32C_WITH_RUNTIME_CHECK" = x"1"; then
17459+
17460+
$as_echo "#define USE_ARMV8_CRC32C_WITH_RUNTIME_CHECK 1" >>confdefs.h
17461+
17462+
PG_CRC32C_OBJS="pg_crc32c_armv8.o pg_crc32c_sb8.o pg_crc32c_armv8_choose.o"
17463+
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: ARMv8 CRC instructions with runtime check" >&5
17464+
$as_echo "ARMv8 CRC instructions with runtime check" >&6; }
17465+
else
1730217466

1730317467
$as_echo "#define USE_SLICING_BY_8_CRC32C 1" >>confdefs.h
1730417468

17305-
PG_CRC32C_OBJS="pg_crc32c_sb8.o"
17306-
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: slicing-by-8" >&5
17469+
PG_CRC32C_OBJS="pg_crc32c_sb8.o"
17470+
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: slicing-by-8" >&5
1730717471
$as_echo "slicing-by-8" >&6; }
17472+
fi
17473+
fi
1730817474
fi
1730917475
fi
1731017476

‎configure.in

Lines changed: 72 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -2003,28 +2003,73 @@ AC_COMPILE_IFELSE([AC_LANG_PROGRAM([], [
20032003
#endif
20042004
])], [SSE4_2_TARGETED=1])
20052005

2006+
# Check for ARMv8 CRC Extension intrinsics to do CRC calculations.
2007+
#
2008+
# First check if __crc32c* intrinsics can be used with the default compiler
2009+
# flags. If not, check if adding -march=armv8-a+crc flag helps.
2010+
# CFLAGS_ARMV8_CRC32C is set if the extra flag is required.
2011+
PGAC_ARMV8_CRC32C_INTRINSICS([])
2012+
if test x"$pgac_armv8_crc32c_intrinsics" != x"yes"; then
2013+
PGAC_ARMV8_CRC32C_INTRINSICS([-march=armv8-a+crc])
2014+
fi
2015+
AC_SUBST(CFLAGS_ARMV8_CRC32C)
2016+
2017+
# In order to detect at runtime, if the ARM CRC Extension is available,
2018+
# we will do "getauxval(AT_HWCAP) & HWCAP_CRC32". Check if we have
2019+
# everything we need for that.
2020+
AC_CHECK_FUNCS([getauxval])
2021+
AC_COMPILE_IFELSE([AC_LANG_PROGRAM([
2022+
#include <sys/auxv.h>
2023+
#include <asm/hwcap.h>
2024+
], [
2025+
#ifndef AT_HWCAP
2026+
#error AT_HWCAP not defined
2027+
#endif
2028+
#ifndef HWCAP_CRC32
2029+
#error HWCAP_CRC32 not defined
2030+
#endif
2031+
])], [HAVE_HWCAP_CRC32=1])
2032+
20062033
# Select CRC-32C implementation.
20072034
#
2008-
# If we are targeting a processor that has SSE 4.2 instructions, we can use the
2009-
# special CRC instructions for calculating CRC-32C. If we're not targeting such
2010-
# a processor, but we can nevertheless produce code that uses the SSE
2011-
# intrinsics, perhaps with some extra CFLAGS, compile both implementations and
2012-
# select which one to use at runtime, depending on whether SSE 4.2 is supported
2013-
# by the processor we're running on.
2035+
# If we are targeting a processor that has Intel SSE 4.2 instructions, we can
2036+
# use the special CRC instructions for calculating CRC-32C. If we're not
2037+
# targeting such a processor, but we can nevertheless produce code that uses
2038+
# the SSE intrinsics, perhaps with some extra CFLAGS, compile both
2039+
# implementations and select which one to use at runtime, depending on whether
2040+
# SSE 4.2 is supported by the processor we're running on.
2041+
#
2042+
# Similarly, if we are targeting an ARM processor that has the CRC
2043+
# instructions that are part of the ARMv8 CRC Extension, use them. And if
2044+
# we're not targeting such a processor, but can nevertheless produce code that
2045+
# uses the CRC instructions, compile both, and select at runtime.
20142046
#
20152047
# You can override this logic by setting the appropriate USE_*_CRC32 flag to 1
20162048
# in the template or configure command line.
2017-
if test x"$USE_SSE42_CRC32C" = x"" && test x"$USE_SSE42_CRC32C_WITH_RUNTIME_CHECK" = x"" && test x"$USE_SLICING_BY_8_CRC32C" = x""; then
2049+
if test x"$USE_SLICING_BY_8_CRC32C" = x"" && test x"$USE_SSE42_CRC32C" = x"" && test x"$USE_SSE42_CRC32C_WITH_RUNTIME_CHECK" = x"" && test x"$USE_ARMV8_CRC32C" = x"" && test x"$USE_ARMV8_CRC32C_WITH_RUNTIME_CHECK" = x""; then
2050+
# Use Intel SSE 4.2 if available.
20182051
if test x"$pgac_sse42_crc32_intrinsics" = x"yes" && test x"$SSE4_2_TARGETED" = x"1" ; then
20192052
USE_SSE42_CRC32C=1
20202053
else
2021-
# the CPUID instruction is needed for the runtime check.
2054+
# Intel SSE 4.2, with runtime check? The CPUID instruction is needed for
2055+
# the runtime check.
20222056
if test x"$pgac_sse42_crc32_intrinsics" = x"yes" && (test x"$pgac_cv__get_cpuid" = x"yes" || test x"$pgac_cv__cpuid" = x"yes"); then
20232057
USE_SSE42_CRC32C_WITH_RUNTIME_CHECK=1
20242058
else
2025-
# fall back to slicing-by-8 algorithm which doesn't require any special
2026-
# CPU support.
2027-
USE_SLICING_BY_8_CRC32C=1
2059+
# Use ARM CRC Extension if available.
2060+
if test x"$pgac_armv8_crc32c_intrinsics" = x"yes" && test x"$CFLAGS_ARMV8_CRC32C" = x""; then
2061+
USE_ARMV8_CRC32C=1
2062+
else
2063+
# ARM CRC Extension, with runtime check? The getauxval() function and
2064+
# HWCAP_CRC32 are needed for the runtime check.
2065+
if test x"$pgac_armv8_crc32c_intrinsics" = x"yes" && test x"$ac_cv_func_getauxval" = x"yes" && test x"$HAVE_HWCAP_CRC32" = x"1"; then
2066+
USE_ARMV8_CRC32C_WITH_RUNTIME_CHECK=1
2067+
else
2068+
# fall back to slicing-by-8 algorithm, which doesn't require any
2069+
# special CPU support.
2070+
USE_SLICING_BY_8_CRC32C=1
2071+
fi
2072+
fi
20282073
fi
20292074
fi
20302075
fi
@@ -2038,12 +2083,24 @@ if test x"$USE_SSE42_CRC32C" = x"1"; then
20382083
else
20392084
if test x"$USE_SSE42_CRC32C_WITH_RUNTIME_CHECK" = x"1"; then
20402085
AC_DEFINE(USE_SSE42_CRC32C_WITH_RUNTIME_CHECK, 1, [Define to 1 to use Intel SSE 4.2 CRC instructions with a runtime check.])
2041-
PG_CRC32C_OBJS="pg_crc32c_sse42.o pg_crc32c_sb8.opg_crc32c_choose.o"
2086+
PG_CRC32C_OBJS="pg_crc32c_sse42.o pg_crc32c_sb8.opg_crc32c_sse42_choose.o"
20422087
AC_MSG_RESULT(SSE 4.2 with runtime check)
20432088
else
2044-
AC_DEFINE(USE_SLICING_BY_8_CRC32C, 1, [Define to 1 to use software CRC-32C implementation (slicing-by-8).])
2045-
PG_CRC32C_OBJS="pg_crc32c_sb8.o"
2046-
AC_MSG_RESULT(slicing-by-8)
2089+
if test x"$USE_ARMV8_CRC32C" = x"1"; then
2090+
AC_DEFINE(USE_ARMV8_CRC32C, 1, [Define to 1 to use ARMv8 CRC Extension.])
2091+
PG_CRC32C_OBJS="pg_crc32c_armv8.o"
2092+
AC_MSG_RESULT(ARMv8 CRC instructions)
2093+
else
2094+
if test x"$USE_ARMV8_CRC32C_WITH_RUNTIME_CHECK" = x"1"; then
2095+
AC_DEFINE(USE_ARMV8_CRC32C_WITH_RUNTIME_CHECK, 1, [Define to 1 to use ARMv8 CRC Extension with a runtime check.])
2096+
PG_CRC32C_OBJS="pg_crc32c_armv8.o pg_crc32c_sb8.o pg_crc32c_armv8_choose.o"
2097+
AC_MSG_RESULT(ARMv8 CRC instructions with runtime check)
2098+
else
2099+
AC_DEFINE(USE_SLICING_BY_8_CRC32C, 1, [Define to 1 to use software CRC-32C implementation (slicing-by-8).])
2100+
PG_CRC32C_OBJS="pg_crc32c_sb8.o"
2101+
AC_MSG_RESULT(slicing-by-8)
2102+
fi
2103+
fi
20472104
fi
20482105
fi
20492106
AC_SUBST(PG_CRC32C_OBJS)

‎src/Makefile.global.in

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -260,6 +260,7 @@ CXX = @CXX@
260260
CFLAGS = @CFLAGS@
261261
CFLAGS_VECTOR = @CFLAGS_VECTOR@
262262
CFLAGS_SSE42 = @CFLAGS_SSE42@
263+
CFLAGS_ARMV8_CRC32C = @CFLAGS_ARMV8_CRC32C@
263264
CXXFLAGS = @CXXFLAGS@
264265

265266
LLVM_CPPFLAGS = @LLVM_CPPFLAGS@

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