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Fix memory barrier support on icc on ia64, 2nd attempt.

Itanium doesn't have the mfence instruction - that's a 386 thing. Use the"mf" instruction instead.This reverts the previous commit to add "#include <emmintrinsic.h>"; theproblem was not with a missing #include.

1 parent6052bce commite5592c6Copy full SHA for e5592c6

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src/include/storage
- barrier.h

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`‎src/include/storage/barrier.h`

Lines changed: 5 additions & 1 deletion

Original file line number	Diff line number	Diff line change
`@@ -53,8 +53,12 @@ extern slock_t dummy_spinlock;`
`53`	`53`	`/*`
`54`	`54`	`* icc defines __GNUC__, but doesn't support gcc's inline asm syntax`
`55`	`55`	`*/`
`56`		`-#include<emmintrin.h>`
	`56`	`+#if defined(__ia64__)\|\| defined(__ia64)`
	`57`	`+#definepg_memory_barrier()__mf()`
	`58`	`+#elseifdefined(__i386__)\|\|defined(__x86_64__)`
`57`	`59`	`#definepg_memory_barrier()_mm_mfence()`
	`60`	`+#endif`
	`61`	`+`
`58`	`62`	`#definepg_compiler_barrier()__memory_barrier()`
`59`	`63`	`#elif defined(__GNUC__)`
`60`	`64`

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Commite5592c6

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`‎src/include/storage/barrier.h`

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