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Commitcef28fd

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Add __volatile__ to all __asm__ and make consistent indenting
1 parentd781002 commitcef28fd

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1 file changed

+69
-64
lines changed

1 file changed

+69
-64
lines changed

‎src/include/storage/s_lock.h‎

Lines changed: 69 additions & 64 deletions
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@
99
*
1010
*
1111
* IDENTIFICATION
12-
* $Header: /cvsroot/pgsql/src/include/storage/s_lock.h,v 1.79 2001/01/1902:58:59 momjian Exp $
12+
* $Header: /cvsroot/pgsql/src/include/storage/s_lock.h,v 1.80 2001/01/1903:58:35 momjian Exp $
1313
*
1414
*-------------------------------------------------------------------------
1515
*/
@@ -100,9 +100,9 @@ extern void s_lock_sleep(unsigned spins, int microsec,
100100
*/
101101

102102
/*
103-
* Standard__asm__ format:
103+
* Standard_asm format:
104104
*
105-
*__asm__(
105+
*__asm__ __volatile__(
106106
*"command;"
107107
*"command;"
108108
*"command;"
@@ -120,11 +120,11 @@ tas(volatile slock_t *lock)
120120
{
121121
registerslock_t_res=1;
122122

123-
__asm__(
124-
"lock;"
125-
"xchgb %0,%1;"
126-
:"=q"(_res),"=m"(*lock)
127-
:"0"(_res));
123+
__asm__ __volatile__(
124+
"lock;"
125+
"xchgb %0,%1;"
126+
:"=q"(_res),"=m"(*lock)
127+
:"0"(_res));
128128
return (int)_res;
129129
}
130130

@@ -139,11 +139,11 @@ tas(volatile slock_t *lock)
139139
{
140140
longintret;
141141

142-
__asm____volatile__(
143-
"xchg4 %0=%1,%2;"
144-
:"=r"(ret),"=m"(*lock)
145-
:"r"(1),"1"(*lock)
146-
:"memory");
142+
__asm____volatile__(
143+
"xchg4 %0=%1,%2;"
144+
:"=r"(ret),"=m"(*lock)
145+
:"r"(1),"1"(*lock)
146+
:"memory");
147147

148148
return (int)ret;
149149
}
@@ -159,10 +159,10 @@ tas(volatile slock_t *lock)
159159
{
160160
registerslock_t_res=1;
161161

162-
__asm__(
163-
"swpb %0, %0, [%3];"
164-
:"=r"(_res),"=m"(*lock)
165-
:"0"(_res),"r"(lock));
162+
__asm__ __volatile__(
163+
"swpb %0, %0, [%3];"
164+
:"=r"(_res),"=m"(*lock)
165+
:"0"(_res),"r"(lock));
166166
return (int)_res;
167167
}
168168

@@ -179,15 +179,15 @@ tas(volatile slock_t *lock)
179179
{
180180
int_res;
181181

182-
__asm____volatile(
183-
"la 1,1;"
184-
"l 2,%2;"
185-
"slr 0,0;"
186-
"cs 0,1,0(2);"
187-
"lr %1,0;"
188-
:"=m"(lock),"=d"(_res)
189-
:"m"(lock)
190-
:"0","1","2");
182+
__asm____volatile__(
183+
"la 1,1;"
184+
"l 2,%2;"
185+
"slr 0,0;"
186+
"cs 0,1,0(2);"
187+
"lr %1,0;"
188+
:"=m"(lock),"=d"(_res)
189+
:"m"(lock)
190+
:"0","1","2");
191191

192192
return (_res);
193193
}
@@ -203,10 +203,10 @@ tas(volatile slock_t *lock)
203203
{
204204
registerslock_t_res=1;
205205

206-
__asm__(
207-
"ldstub [%2], %0;"
208-
:"=r"(_res),"=m"(*lock)
209-
:"r"(lock));
206+
__asm__ __volatile__(
207+
"ldstub [%2], %0;"
208+
:"=r"(_res),"=m"(*lock)
209+
:"r"(lock));
210210
return (int)_res;
211211
}
212212

@@ -221,12 +221,12 @@ tas(volatile slock_t *lock)
221221
{
222222
registerintrv;
223223

224-
__asm____volatile__(
225-
"tas %1;"
226-
"sne %0;"
227-
:"=d"(rv),"=m"(*lock)
228-
:"1"(*lock)
229-
:"cc");
224+
__asm____volatile__(
225+
"tas %1;"
226+
"sne %0;"
227+
:"=d"(rv),"=m"(*lock)
228+
:"1"(*lock)
229+
:"cc");
230230

231231
returnrv;
232232
}
@@ -248,14 +248,14 @@ tas(volatile slock_t *lock)
248248
{
249249
register_res;
250250

251-
__asm__(
252-
"movl $1, r0;"
253-
"bbssi $0, (%1), 1f;"
254-
"clrl r0;"
255-
"1: movl r0, %0;"
256-
:"=r"(_res)
257-
:"r"(lock)
258-
:"r0");
251+
__asm__ __volatile__(
252+
"movl $1, r0;"
253+
"bbssi $0, (%1), 1f;"
254+
"clrl r0;"
255+
"1: movl r0, %0;"
256+
:"=r"(_res)
257+
:"r"(lock)
258+
:"r0");
259259
return (int)_res;
260260
}
261261

@@ -270,10 +270,10 @@ tas(volatile slock_t *lock)
270270
{
271271
register_res;
272272

273-
__asm__(
274-
"sbitb 0, %0;"
275-
"sfsd %1;"
276-
:"=m"(*lock),"=r"(_res));
273+
__asm__ __volatile__(
274+
"sbitb 0, %0;"
275+
"sfsd %1;"
276+
:"=m"(*lock),"=r"(_res));
277277
return (int)_res;
278278
}
279279

@@ -326,28 +326,33 @@ tas(volatile slock_t *s_lock)
326326
#if defined(__GNUC__)
327327

328328
#defineTAS(lock) tas(lock)
329-
#defineS_UNLOCK(lock)do { __asm__ volatile ("mb"); *(lock) = 0; } while (0)
329+
#defineS_UNLOCK(lock)\
330+
do \
331+
{\
332+
__asm__ __volatile__ ("mb"); \
333+
*(lock) = 0; \
334+
} while (0)
330335

331336
static __inline__int
332337
tas(volatileslock_t*lock)
333338
{
334339
registerslock_t_res;
335340

336-
__asm__volatile(
337-
"ldq $0, %0;"
338-
"bne $0, 2f;"
339-
"ldq_l %1, %0;"
340-
"bne %1, 2f;"
341-
"mov 1, $0;"
342-
"stq_c $0, %0;"
343-
"beq $0, 2f;"
344-
"mb;"
345-
"br 3f;"
346-
"2: mov 1, %1;"
347-
"3:"
348-
:"=m"(*lock),"=r"(_res)
349-
:
350-
:"0");
341+
__asm____volatile__(
342+
"ldq $0, %0;"
343+
"bne $0, 2f;"
344+
"ldq_l %1, %0;"
345+
"bne %1, 2f;"
346+
"mov 1, $0;"
347+
"stq_c $0, %0;"
348+
"beq $0, 2f;"
349+
"mb;"
350+
"br 3f;"
351+
"2: mov 1, %1;"
352+
"3:"
353+
:"=m"(*lock),"=r"(_res)
354+
:
355+
:"0");
351356

352357
return (int)_res;
353358
}

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