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Commitc32fcac

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Add RISC-V spinlock support in s_lock.h.
Like the ARM case, just use gcc's __sync_lock_test_and_set();that will compile into AMOSWAP.W.AQ which does what we need.At some point it might be worth doing some work on atomic opsfor RISC-V, but this should be enough for a creditable port.Back-patch to all supported branches, just in case somebodywants to try them on RISC-V.Marek SzubaDiscussion:https://postgr.es/m/dea97b6d-f55f-1f6d-9109-504aa7dfa421@gentoo.org
1 parent4279e5b commitc32fcac

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‎src/include/storage/s_lock.h

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@@ -314,6 +314,7 @@ tas(volatile slock_t *lock)
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#endif/* __INTEL_COMPILER */
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#endif/* __ia64__ || __ia64 */
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/*
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* On ARM and ARM64, we use __sync_lock_test_and_set(int *, int) if available.
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*
@@ -340,6 +341,29 @@ tas(volatile slock_t *lock)
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#endif/* __arm__ || __arm || __aarch64__ || __aarch64 */
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/*
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* RISC-V likewise uses __sync_lock_test_and_set(int *, int) if available.
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*/
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#if defined(__riscv)
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#ifdefHAVE_GCC__SYNC_INT32_TAS
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#defineHAS_TEST_AND_SET
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#defineTAS(lock) tas(lock)
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typedefintslock_t;
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static __inline__int
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tas(volatileslock_t*lock)
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{
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return__sync_lock_test_and_set(lock,1);
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}
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#defineS_UNLOCK(lock) __sync_lock_release(lock)
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#endif/* HAVE_GCC__SYNC_INT32_TAS */
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#endif/* __riscv */
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/* S/390 and S/390x Linux (32- and 64-bit zSeries) */
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#if defined(__s390__)|| defined(__s390x__)
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#defineHAS_TEST_AND_SET

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