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Commitbb65cb8

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Use __sync_lock_test_and_set() for spinlocks on ARM, if available.
Historically we've used the SWPB instruction for TAS() on ARM, but thisis deprecated and not available on ARMv6 and later. Instead, make useof a GCC builtin if available. We'll still fall back to SWPB if not,so as not to break existing ports using older GCC versions.Eventually we might want to try using __sync_lock_test_and_set() on someother architectures too, but for now that seems to present only risk andnot reward.Back-patch to all supported versions, since people might want to use anyof them on more recent ARM chips.Martin Pitt
1 parent1f996ad commitbb65cb8

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4 files changed

+102
-2
lines changed

4 files changed

+102
-2
lines changed

‎configure

Lines changed: 65 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -22108,6 +22108,71 @@ fi
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done
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{ $as_echo "$as_me:$LINENO: checking for builtin locking functions" >&5
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$as_echo_n "checking for builtin locking functions... " >&6; }
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if test "${pgac_cv_gcc_int_atomics+set}" = set; then
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$as_echo_n "(cached) " >&6
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else
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cat >conftest.$ac_ext <<_ACEOF
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/* confdefs.h. */
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_ACEOF
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cat confdefs.h >>conftest.$ac_ext
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cat >>conftest.$ac_ext <<_ACEOF
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/* end confdefs.h. */
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int
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main ()
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{
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int lock = 0;
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__sync_lock_test_and_set(&lock, 1);
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__sync_lock_release(&lock);
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;
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return 0;
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}
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_ACEOF
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rm -f conftest.$ac_objext conftest$ac_exeext
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if { (ac_try="$ac_link"
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case "(($ac_try" in
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*\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
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*) ac_try_echo=$ac_try;;
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esac
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eval ac_try_echo="\"\$as_me:$LINENO: $ac_try_echo\""
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$as_echo "$ac_try_echo") >&5
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(eval "$ac_link") 2>conftest.er1
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ac_status=$?
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grep -v '^ *+' conftest.er1 >conftest.err
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rm -f conftest.er1
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cat conftest.err >&5
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$as_echo "$as_me:$LINENO: \$? = $ac_status" >&5
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(exit $ac_status); } && {
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test -z "$ac_c_werror_flag" ||
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test ! -s conftest.err
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} && test -s conftest$ac_exeext && {
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test "$cross_compiling" = yes ||
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$as_test_x conftest$ac_exeext
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}; then
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pgac_cv_gcc_int_atomics="yes"
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else
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$as_echo "$as_me: failed program was:" >&5
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sed 's/^/| /' conftest.$ac_ext >&5
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pgac_cv_gcc_int_atomics="no"
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fi
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rm -rf conftest.dSYM
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rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \
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conftest$ac_exeext conftest.$ac_ext
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fi
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{ $as_echo "$as_me:$LINENO: result: $pgac_cv_gcc_int_atomics" >&5
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$as_echo "$pgac_cv_gcc_int_atomics" >&6; }
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if test x"$pgac_cv_gcc_int_atomics" = x"yes"; then
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cat >>confdefs.h <<\_ACEOF
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#define HAVE_GCC_INT_ATOMICS 1
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_ACEOF
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fi
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#
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# Pthreads

‎configure.in

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1403,6 +1403,17 @@ AC_CHECK_FUNCS(atexit, [],
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[AC_CHECK_FUNCS(on_exit, [],
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[AC_MSG_ERROR([neither atexit() nor on_exit() found])])])
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AC_CACHE_CHECK([for builtin locking functions], pgac_cv_gcc_int_atomics,
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[AC_TRY_LINK([],
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[int lock = 0;
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__sync_lock_test_and_set(&lock, 1);
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__sync_lock_release(&lock);],
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[pgac_cv_gcc_int_atomics="yes"],
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[pgac_cv_gcc_int_atomics="no"])])
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if test x"$pgac_cv_gcc_int_atomics" = x"yes"; then
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AC_DEFINE(HAVE_GCC_INT_ATOMICS, 1, [Define to 1 if you have __sync_lock_test_and_set(int *) and friends.])
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fi
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14061417

14071418
#
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# Pthreads

‎src/include/pg_config.h.in

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -173,6 +173,9 @@
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/* Define to 1 if your compiler understands __FUNCTION__. */
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#undef HAVE_FUNCNAME__FUNCTION
175175

176+
/* Define to 1 if you have __sync_lock_test_and_set(int *) and friends. */
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#undef HAVE_GCC_INT_ATOMICS
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176179
/* Define to 1 if you have the `getaddrinfo' function. */
177180
#undef HAVE_GETADDRINFO
178181

‎src/include/storage/s_lock.h

Lines changed: 23 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -252,13 +252,33 @@ tas(volatile slock_t *lock)
252252
#endif/* __ia64__ || __ia64 */
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254254

255+
/*
256+
* On ARM, we use __sync_lock_test_and_set(int *, int) if available, and if
257+
* not fall back on the SWPB instruction. SWPB does not work on ARMv6 or
258+
* later, so the compiler builtin is preferred if available. Note also that
259+
* the int-width variant of the builtin works on more chips than other widths.
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*/
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#if defined(__arm__)|| defined(__arm)
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#defineHAS_TEST_AND_SET
257263

258-
typedefunsignedcharslock_t;
259-
260264
#defineTAS(lock) tas(lock)
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266+
#ifdefHAVE_GCC_INT_ATOMICS
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typedefintslock_t;
269+
270+
static __inline__int
271+
tas(volatileslock_t*lock)
272+
{
273+
return__sync_lock_test_and_set(lock,1);
274+
}
275+
276+
#defineS_UNLOCK(lock) __sync_lock_release(lock)
277+
278+
#else/* !HAVE_GCC_INT_ATOMICS */
279+
280+
typedefunsignedcharslock_t;
281+
262282
static __inline__int
263283
tas(volatileslock_t*lock)
264284
{
@@ -272,6 +292,7 @@ tas(volatile slock_t *lock)
272292
return (int)_res;
273293
}
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295+
#endif/* HAVE_GCC_INT_ATOMICS */
275296
#endif/* __arm__ */
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