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Commitb03d196

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Use a non-locking initial test in TAS_SPIN on x86_64.
Testing done in 2011 by Tom Lane concluded that this is a win on Intel Xeonsand AMD Opterons, but it was not changed back then, because of an oldcomment in tas() that suggested that it's a huge loss on older Opterons.However, didn't have separate TAS() and TAS_SPIN() macros back then, so thecomment referred to doing a non-locked initial test even on the firstaccess, in uncontended case. I don't have access to older Opterons, but I'mpretty sure that doing an initial unlocked test is unlikely to be a losswhile spinning, even though it might be for the first access.We probably should do the same on 32-bit x86, but I'm afraid of changing itwithout any testing. Hence just add a note to the x86 implementationsuggesting that we probably should do the same there.
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‎src/include/storage/s_lock.h

Lines changed: 17 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -145,6 +145,12 @@ tas(volatile slock_t *lock)
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* Use a non-locking test before asserting the bus lock. Note that the
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* extra test appears to be a small loss on some x86 platforms and a small
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* win on others; it's by no means clear that we should keep it.
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*
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* When this was last tested, we didn't have separate TAS() and TAS_SPIN()
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* macros. Nowadays it probably would be better to do a non-locking test
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* in TAS_SPIN() but not in TAS(), like on x86_64, but no-one's done the
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* testing to verify that. Without some empirical evidence, better to
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* leave it alone.
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*/
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__asm__ __volatile__(
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"cmpb$0,%1\n"
@@ -200,16 +206,22 @@ typedef unsigned char slock_t;
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#defineTAS(lock) tas(lock)
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/*
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* On Intel EM64T, it's a win to use a non-locking test before the xchg proper,
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* but only when spinning.
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*
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* See also Implementing Scalable Atomic Locks for Multi-Core Intel(tm) EM64T
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* and IA32, by Michael Chynoweth and Mary R. Lee. As of this writing, it is
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* available at:
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* http://software.intel.com/en-us/articles/implementing-scalable-atomic-locks-for-multi-core-intel-em64t-and-ia32-architectures
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*/
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#defineTAS_SPIN(lock) (*(lock) ? 1 : TAS(lock))
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static __inline__int
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tas(volatileslock_t*lock)
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{
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registerslock_t_res=1;
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/*
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* On Opteron, using a non-locking test before the locking instruction
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* is a huge loss. On EM64T, it appears to be a wash or small loss,
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* so we needn't bother to try to distinguish the sub-architectures.
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*/
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__asm__ __volatile__(
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"lock\n"
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"xchgb%0,%1\n"

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