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Commita669df4

Browse files
ildusAlexander Korotkov
authored and
Alexander Korotkov
committed
Move atomics and base wait files
1 parenta1efb79 commita669df4

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19 files changed

+2713
-2
lines changed

19 files changed

+2713
-2
lines changed

‎src/backend/port/Makefile

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -21,7 +21,7 @@ subdir = src/backend/port
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top_builddir = ../../..
2222
include$(top_builddir)/src/Makefile.global
2323

24-
OBJS = dynloader.o pg_sema.o pg_shmem.o pg_latch.o$(TAS)
24+
OBJS = dynloader.o pg_sema.o pg_shmem.o pg_latch.oatomics.o$(TAS)
2525

2626
ifeq ($(PORTNAME), darwin)
2727
SUBDIRS += darwin

‎src/backend/port/atomics.c

Lines changed: 148 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,148 @@
1+
/*-------------------------------------------------------------------------
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*
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* atomics.c
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* Non-Inline parts of the atomics implementation
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*
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* Portions Copyright (c) 2013-2015, PostgreSQL Global Development Group
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*
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*
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* IDENTIFICATION
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* src/backend/port/atomics.c
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*
12+
*-------------------------------------------------------------------------
13+
*/
14+
#include"postgres.h"
15+
16+
#include"miscadmin.h"
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#include"port/atomics.h"
18+
#include"storage/spin.h"
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20+
#ifdefPG_HAVE_MEMORY_BARRIER_EMULATION
21+
#ifdefWIN32
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#error "barriers are required (and provided) on WIN32 platforms"
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#endif
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#include<sys/types.h>
25+
#include<signal.h>
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#endif
27+
28+
#ifdefPG_HAVE_MEMORY_BARRIER_EMULATION
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void
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pg_spinlock_barrier(void)
31+
{
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/*
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* NB: we have to be reentrant here, some barriers are placed in signal
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* handlers.
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*
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* We use kill(0) for the fallback barrier as we assume that kernels on
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* systems old enough to require fallback barrier support will include an
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* appropriate barrier while checking the existence of the postmaster
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* pid.
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*/
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(void)kill(PostmasterPid,0);
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}
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#endif
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#ifdefPG_HAVE_COMPILER_BARRIER_EMULATION
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void
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pg_extern_compiler_barrier(void)
48+
{
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/* do nothing */
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}
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#endif
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53+
54+
#ifdefPG_HAVE_ATOMIC_FLAG_SIMULATION
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void
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pg_atomic_init_flag_impl(volatilepg_atomic_flag*ptr)
58+
{
59+
StaticAssertStmt(sizeof(ptr->sema) >=sizeof(slock_t),
60+
"size mismatch of atomic_flag vs slock_t");
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62+
#ifndefHAVE_SPINLOCKS
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/*
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* NB: If we're using semaphore based TAS emulation, be careful to use a
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* separate set of semaphores. Otherwise we'd get in trouble if an atomic
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* var would be manipulated while spinlock is held.
68+
*/
69+
s_init_lock_sema((slock_t*)&ptr->sema, true);
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#else
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SpinLockInit((slock_t*)&ptr->sema);
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#endif
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}
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bool
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pg_atomic_test_set_flag_impl(volatilepg_atomic_flag*ptr)
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{
78+
returnTAS((slock_t*)&ptr->sema);
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}
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void
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pg_atomic_clear_flag_impl(volatilepg_atomic_flag*ptr)
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{
84+
S_UNLOCK((slock_t*)&ptr->sema);
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}
86+
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#endif/* PG_HAVE_ATOMIC_FLAG_SIMULATION */
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#ifdefPG_HAVE_ATOMIC_U32_SIMULATION
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void
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pg_atomic_init_u32_impl(volatilepg_atomic_uint32*ptr,uint32val_)
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{
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StaticAssertStmt(sizeof(ptr->sema) >=sizeof(slock_t),
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"size mismatch of atomic_flag vs slock_t");
95+
96+
/*
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* If we're using semaphore based atomic flags, be careful about nested
98+
* usage of atomics while a spinlock is held.
99+
*/
100+
#ifndefHAVE_SPINLOCKS
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s_init_lock_sema((slock_t*)&ptr->sema, true);
102+
#else
103+
SpinLockInit((slock_t*)&ptr->sema);
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#endif
105+
ptr->value=val_;
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}
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bool
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pg_atomic_compare_exchange_u32_impl(volatilepg_atomic_uint32*ptr,
110+
uint32*expected,uint32newval)
111+
{
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boolret;
113+
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/*
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* Do atomic op under a spinlock. It might look like we could just skip
116+
* the cmpxchg if the lock isn't available, but that'd just emulate a
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* 'weak' compare and swap. I.e. one that allows spurious failures. Since
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* several algorithms rely on a strong variant and that is efficiently
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* implementable on most major architectures let's emulate it here as
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* well.
121+
*/
122+
SpinLockAcquire((slock_t*)&ptr->sema);
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124+
/* perform compare/exchange logic */
125+
ret=ptr->value==*expected;
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*expected=ptr->value;
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if (ret)
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ptr->value=newval;
129+
130+
/* and release lock */
131+
SpinLockRelease((slock_t*)&ptr->sema);
132+
133+
returnret;
134+
}
135+
136+
uint32
137+
pg_atomic_fetch_add_u32_impl(volatilepg_atomic_uint32*ptr,int32add_)
138+
{
139+
uint32oldval;
140+
141+
SpinLockAcquire((slock_t*)&ptr->sema);
142+
oldval=ptr->value;
143+
ptr->value+=add_;
144+
SpinLockRelease((slock_t*)&ptr->sema);
145+
returnoldval;
146+
}
147+
148+
#endif/* PG_HAVE_ATOMIC_U32_SIMULATION */

‎src/backend/storage/lmgr/Makefile

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,8 @@ subdir = src/backend/storage/lmgr
1212
top_builddir = ../../../..
1313
include$(top_builddir)/src/Makefile.global
1414

15-
OBJS = lmgr.o lock.o proc.o deadlock.o lwlock.o spin.o s_lock.o predicate.o
15+
OBJS = lmgr.o lock.o proc.o deadlock.o lwlock.o spin.o s_lock.o\
16+
predicate.o wait.o
1617

1718
include$(top_srcdir)/src/backend/common.mk
1819

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