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Commit8ded656

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Remove configurability of PPC spinlock assembly code.
Assume that we can use LWARX hint flags and the LWSYNC instructionon any PPC machine. The check on the assembler's behavior was onlyneeded for Apple's old assembler, which is no longer of interestnow that we've de-supported all PPC-era versions of macOS (thanksto them not having clock_gettime()). Also, given an up-to-dateassembler these instructions work even on Apple's old hardware.It seems quite unlikely that anyone would be interested in runningcurrent Postgres on PPC hardware that's so old as to not havethese instructions.Hence, rip out associated configure test and manual configurationoptions, and just use the modernized instructions all the time.Also, update atomics/arch-ppc.h to use these instructions as well.(It was already using LWSYNC unconditionally in another place,providing further proof that nobody is using PG on hardware oldenough to have a problem with that.)Discussion:https://postgr.es/m/166622.1660323391@sss.pgh.pa.us
1 parentadee0df commit8ded656

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7 files changed

+26
-115
lines changed

7 files changed

+26
-115
lines changed

‎configure

Lines changed: 1 addition & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -15349,39 +15349,7 @@ $as_echo "#define HAVE_X86_64_POPCNTQ 1" >>confdefs.h
1534915349
fi
1535015350
;;
1535115351
ppc*|powerpc*)
15352-
# On PPC, check if assembler supports LWARX instruction's mutex hint bit
15353-
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether assembler supports lwarx hint bit" >&5
15354-
$as_echo_n "checking whether assembler supports lwarx hint bit... " >&6; }
15355-
if ${pgac_cv_have_ppc_mutex_hint+:} false; then :
15356-
$as_echo_n "(cached) " >&6
15357-
else
15358-
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
15359-
/* end confdefs.h. */
15360-
15361-
int
15362-
main ()
15363-
{
15364-
int a = 0; int *p = &a; int r;
15365-
__asm__ __volatile__ (" lwarx %0,0,%1,1\n" : "=&r"(r) : "r"(p));
15366-
;
15367-
return 0;
15368-
}
15369-
_ACEOF
15370-
if ac_fn_c_try_compile "$LINENO"; then :
15371-
pgac_cv_have_ppc_mutex_hint=yes
15372-
else
15373-
pgac_cv_have_ppc_mutex_hint=no
15374-
fi
15375-
rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
15376-
fi
15377-
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $pgac_cv_have_ppc_mutex_hint" >&5
15378-
$as_echo "$pgac_cv_have_ppc_mutex_hint" >&6; }
15379-
if test x"$pgac_cv_have_ppc_mutex_hint" = xyes ; then
15380-
15381-
$as_echo "#define HAVE_PPC_LWARX_MUTEX_HINT 1" >>confdefs.h
15382-
15383-
fi
15384-
# Check if compiler accepts "i"(x) when __builtin_constant_p(x).
15352+
# On PPC, check if compiler accepts "i"(x) when __builtin_constant_p(x).
1538515353
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether __builtin_constant_p(x) implies \"i\"(x) acceptance" >&5
1538615354
$as_echo_n "checking whether __builtin_constant_p(x) implies \"i\"(x) acceptance... " >&6; }
1538715355
if ${pgac_cv_have_i_constraint__builtin_constant_p+:} false; then :

‎configure.ac

Lines changed: 1 addition & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1678,18 +1678,7 @@ case $host_cpu in
16781678
fi
16791679
;;
16801680
ppc*|powerpc*)
1681-
# On PPC, check if assembler supports LWARX instruction's mutex hint bit
1682-
AC_CACHE_CHECK([whether assembler supports lwarx hint bit],
1683-
[pgac_cv_have_ppc_mutex_hint],
1684-
[AC_COMPILE_IFELSE([AC_LANG_PROGRAM([],
1685-
[int a = 0; int *p = &a; int r;
1686-
__asm__ __volatile__ (" lwarx %0,0,%1,1\n" : "=&r"(r) : "r"(p));])],
1687-
[pgac_cv_have_ppc_mutex_hint=yes],
1688-
[pgac_cv_have_ppc_mutex_hint=no])])
1689-
if test x"$pgac_cv_have_ppc_mutex_hint" = xyes ; then
1690-
AC_DEFINE(HAVE_PPC_LWARX_MUTEX_HINT,1,[Define to 1 if the assembler supports PPC's LWARX mutex hint bit.])
1691-
fi
1692-
# Check if compiler accepts "i"(x) when __builtin_constant_p(x).
1681+
# On PPC, check if compiler accepts "i"(x) when __builtin_constant_p(x).
16931682
AC_CACHE_CHECK([whether __builtin_constant_p(x) implies "i"(x) acceptance],
16941683
[pgac_cv_have_i_constraint__builtin_constant_p],
16951684
[AC_COMPILE_IFELSE([AC_LANG_PROGRAM(

‎src/include/pg_config.h.in

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -349,9 +349,6 @@
349349
/* Define to 1 if you have the `posix_fallocate' function. */
350350
#undef HAVE_POSIX_FALLOCATE
351351

352-
/* Define to 1 if the assembler supports PPC's LWARX mutex hint bit. */
353-
#undef HAVE_PPC_LWARX_MUTEX_HINT
354-
355352
/* Define to 1 if you have the `ppoll' function. */
356353
#undef HAVE_PPOLL
357354

‎src/include/pg_config_manual.h

Lines changed: 0 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -227,32 +227,6 @@
227227
*/
228228
#defineDEFAULT_EVENT_SOURCE "PostgreSQL"
229229

230-
/*
231-
* On PPC machines, decide whether to use the mutex hint bit in LWARX
232-
* instructions. Setting the hint bit will slightly improve spinlock
233-
* performance on POWER6 and later machines, but does nothing before that,
234-
* and will result in illegal-instruction failures on some pre-POWER4
235-
* machines. By default we use the hint bit when building for 64-bit PPC,
236-
* which should be safe in nearly all cases. You might want to override
237-
* this if you are building 32-bit code for a known-recent PPC machine.
238-
*/
239-
#ifdefHAVE_PPC_LWARX_MUTEX_HINT/* must have assembler support in any case */
240-
#if defined(__ppc64__)|| defined(__powerpc64__)
241-
#defineUSE_PPC_LWARX_MUTEX_HINT
242-
#endif
243-
#endif
244-
245-
/*
246-
* On PPC machines, decide whether to use LWSYNC instructions in place of
247-
* ISYNC and SYNC. This provides slightly better performance, but will
248-
* result in illegal-instruction failures on some pre-POWER4 machines.
249-
* By default we use LWSYNC when building for 64-bit PPC, which should be
250-
* safe in nearly all cases.
251-
*/
252-
#if defined(__ppc64__)|| defined(__powerpc64__)
253-
#defineUSE_PPC_LWSYNC
254-
#endif
255-
256230
/*
257231
* Assumed cache line size. This doesn't affect correctness, but can be used
258232
* for low-level optimizations. Currently, this is used to pad some data

‎src/include/port/atomics/arch-ppc.h

Lines changed: 20 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -90,12 +90,12 @@ pg_atomic_compare_exchange_u32_impl(volatile pg_atomic_uint32 *ptr,
9090
(int32)*expected >=PG_INT16_MIN)
9191
__asm__ __volatile__(
9292
"sync\n"
93-
"lwarx %0,0,%5\n"
93+
"lwarx %0,0,%5,1\n"
9494
"cmpwi %0,%3\n"
95-
"bne $+12\n"/* branch toisync */
95+
"bne $+12\n"/* branch tolwsync */
9696
"stwcx. %4,0,%5\n"
9797
"bne $-16\n"/* branch to lwarx */
98-
"isync\n"
98+
"lwsync\n"
9999
"mfcr %1 \n"
100100
:"=&r"(found),"=r"(condition_register),"+m"(ptr->value)
101101
:"i"(*expected),"r"(newval),"r"(&ptr->value)
@@ -104,12 +104,12 @@ pg_atomic_compare_exchange_u32_impl(volatile pg_atomic_uint32 *ptr,
104104
#endif
105105
__asm__ __volatile__(
106106
"sync\n"
107-
"lwarx %0,0,%5\n"
107+
"lwarx %0,0,%5,1\n"
108108
"cmpw %0,%3\n"
109-
"bne $+12\n"/* branch toisync */
109+
"bne $+12\n"/* branch tolwsync */
110110
"stwcx. %4,0,%5\n"
111111
"bne $-16\n"/* branch to lwarx */
112-
"isync\n"
112+
"lwsync\n"
113113
"mfcr %1 \n"
114114
:"=&r"(found),"=r"(condition_register),"+m"(ptr->value)
115115
:"r"(*expected),"r"(newval),"r"(&ptr->value)
@@ -138,23 +138,23 @@ pg_atomic_fetch_add_u32_impl(volatile pg_atomic_uint32 *ptr, int32 add_)
138138
add_ <=PG_INT16_MAX&&add_ >=PG_INT16_MIN)
139139
__asm__ __volatile__(
140140
"sync\n"
141-
"lwarx %1,0,%4\n"
141+
"lwarx %1,0,%4,1\n"
142142
"addi %0,%1,%3\n"
143143
"stwcx. %0,0,%4\n"
144144
"bne $-12\n"/* branch to lwarx */
145-
"isync\n"
145+
"lwsync\n"
146146
:"=&r"(_t),"=&b"(res),"+m"(ptr->value)
147147
:"i"(add_),"r"(&ptr->value)
148148
:"memory","cc");
149149
else
150150
#endif
151151
__asm__ __volatile__(
152152
"sync\n"
153-
"lwarx %1,0,%4\n"
153+
"lwarx %1,0,%4,1\n"
154154
"add %0,%1,%3\n"
155155
"stwcx. %0,0,%4\n"
156156
"bne $-12\n"/* branch to lwarx */
157-
"isync\n"
157+
"lwsync\n"
158158
:"=&r"(_t),"=&r"(res),"+m"(ptr->value)
159159
:"r"(add_),"r"(&ptr->value)
160160
:"memory","cc");
@@ -180,12 +180,12 @@ pg_atomic_compare_exchange_u64_impl(volatile pg_atomic_uint64 *ptr,
180180
(int64)*expected >=PG_INT16_MIN)
181181
__asm__ __volatile__(
182182
"sync\n"
183-
"ldarx %0,0,%5\n"
183+
"ldarx %0,0,%5,1\n"
184184
"cmpdi %0,%3\n"
185-
"bne $+12\n"/* branch toisync */
185+
"bne $+12\n"/* branch tolwsync */
186186
"stdcx. %4,0,%5\n"
187187
"bne $-16\n"/* branch to ldarx */
188-
"isync\n"
188+
"lwsync\n"
189189
"mfcr %1 \n"
190190
:"=&r"(found),"=r"(condition_register),"+m"(ptr->value)
191191
:"i"(*expected),"r"(newval),"r"(&ptr->value)
@@ -194,12 +194,12 @@ pg_atomic_compare_exchange_u64_impl(volatile pg_atomic_uint64 *ptr,
194194
#endif
195195
__asm__ __volatile__(
196196
"sync\n"
197-
"ldarx %0,0,%5\n"
197+
"ldarx %0,0,%5,1\n"
198198
"cmpd %0,%3\n"
199-
"bne $+12\n"/* branch toisync */
199+
"bne $+12\n"/* branch tolwsync */
200200
"stdcx. %4,0,%5\n"
201201
"bne $-16\n"/* branch to ldarx */
202-
"isync\n"
202+
"lwsync\n"
203203
"mfcr %1 \n"
204204
:"=&r"(found),"=r"(condition_register),"+m"(ptr->value)
205205
:"r"(*expected),"r"(newval),"r"(&ptr->value)
@@ -224,23 +224,23 @@ pg_atomic_fetch_add_u64_impl(volatile pg_atomic_uint64 *ptr, int64 add_)
224224
add_ <=PG_INT16_MAX&&add_ >=PG_INT16_MIN)
225225
__asm__ __volatile__(
226226
"sync\n"
227-
"ldarx %1,0,%4\n"
227+
"ldarx %1,0,%4,1\n"
228228
"addi %0,%1,%3\n"
229229
"stdcx. %0,0,%4\n"
230230
"bne $-12\n"/* branch to ldarx */
231-
"isync\n"
231+
"lwsync\n"
232232
:"=&r"(_t),"=&b"(res),"+m"(ptr->value)
233233
:"i"(add_),"r"(&ptr->value)
234234
:"memory","cc");
235235
else
236236
#endif
237237
__asm__ __volatile__(
238238
"sync\n"
239-
"ldarx %1,0,%4\n"
239+
"ldarx %1,0,%4,1\n"
240240
"add %0,%1,%3\n"
241241
"stdcx. %0,0,%4\n"
242242
"bne $-12\n"/* branch to ldarx */
243-
"isync\n"
243+
"lwsync\n"
244244
:"=&r"(_t),"=&r"(res),"+m"(ptr->value)
245245
:"r"(add_),"r"(&ptr->value)
246246
:"memory","cc");

‎src/include/storage/s_lock.h

Lines changed: 4 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -435,7 +435,8 @@ typedef unsigned int slock_t;
435435
*
436436
* NOTE: per the Enhanced PowerPC Architecture manual, v1.0 dated 7-May-2002,
437437
* an isync is a sufficient synchronization barrier after a lwarx/stwcx loop.
438-
* On newer machines, we can use lwsync instead for better performance.
438+
* But if the spinlock is in ordinary memory, we can use lwsync instead for
439+
* better performance.
439440
*
440441
* Ordinarily, we'd code the branches here using GNU-style local symbols, that
441442
* is "1f" referencing "1:" and so on. But some people run gcc on AIX with
@@ -450,23 +451,15 @@ tas(volatile slock_t *lock)
450451
int_res;
451452

452453
__asm__ __volatile__(
453-
#ifdefUSE_PPC_LWARX_MUTEX_HINT
454454
"lwarx %0,0,%3,1\n"
455-
#else
456-
"lwarx %0,0,%3\n"
457-
#endif
458455
"cmpwi %0,0\n"
459456
"bne $+16\n"/* branch to li %1,1 */
460457
"addi %0,%0,1\n"
461458
"stwcx. %0,0,%3\n"
462-
"beq $+12\n"/* branch to lwsync/isync */
459+
"beq $+12\n"/* branch to lwsync */
463460
"li %1,1\n"
464461
"b $+12\n"/* branch to end of asm sequence */
465-
#ifdefUSE_PPC_LWSYNC
466462
"lwsync\n"
467-
#else
468-
"isync\n"
469-
#endif
470463
"li %1,0\n"
471464

472465
:"=&b"(_t),"=r"(_res),"+m"(*lock)
@@ -477,23 +470,14 @@ tas(volatile slock_t *lock)
477470

478471
/*
479472
* PowerPC S_UNLOCK is almost standard but requires a "sync" instruction.
480-
*On newer machines, we can use lwsync instead for better performance.
473+
*But we can use lwsync instead for better performance.
481474
*/
482-
#ifdefUSE_PPC_LWSYNC
483475
#defineS_UNLOCK(lock)\
484476
do \
485477
{ \
486478
__asm__ __volatile__ ("lwsync \n" ::: "memory"); \
487479
*((volatile slock_t *) (lock)) = 0; \
488480
} while (0)
489-
#else
490-
#defineS_UNLOCK(lock)\
491-
do \
492-
{ \
493-
__asm__ __volatile__ ("sync \n" ::: "memory"); \
494-
*((volatile slock_t *) (lock)) = 0; \
495-
} while (0)
496-
#endif/* USE_PPC_LWSYNC */
497481

498482
#endif/* powerpc */
499483

‎src/tools/msvc/Solution.pm

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -313,7 +313,6 @@ sub GenerateFiles
313313
HAVE_PAM_PAM_APPL_H=>undef,
314314
HAVE_POSIX_FADVISE=>undef,
315315
HAVE_POSIX_FALLOCATE=>undef,
316-
HAVE_PPC_LWARX_MUTEX_HINT=>undef,
317316
HAVE_PPOLL=>undef,
318317
HAVE_PS_STRINGS=>undef,
319318
HAVE_PTHREAD=>undef,

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