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Commit631beea

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Use LWSYNC in place of SYNC/ISYNC in PPC spinlocks, where possible.
This is allegedly a win, at least on some PPC implementations, accordingto the PPC ISA documents. However, as with LWARX hints, some PPCplatforms give an illegal-instruction failure. Use the same trick asbefore of assuming that PPC64 platforms will accept it; we might need torefine that based on experience, but there are other projects doinglikewise according to google.I did not add an assembler compatibility test because LWSYNC has beenaround much longer than hint bits, and it seems unlikely that anytoolchains currently in use don't recognize it.
1 parent8496c6c commit631beea

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2 files changed

+29
-1
lines changed

2 files changed

+29
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lines changed

‎src/include/pg_config_manual.h

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@@ -188,6 +188,17 @@
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#endif
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#endif
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/*
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* On PPC machines, decide whether to use LWSYNC instructions in place of
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* ISYNC and SYNC. This provides slightly better performance, but will
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* result in illegal-instruction failures on some pre-POWER4 machines.
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* By default we use LWSYNC when building for 64-bit PPC, which should be
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* safe in nearly all cases.
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*/
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#if defined(__ppc64__)|| defined(__powerpc64__)
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#defineUSE_PPC_LWSYNC
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#endif
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/*
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*------------------------------------------------------------------------
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* The following symbols are for enabling debugging code, not for

‎src/include/storage/s_lock.h

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@@ -361,6 +361,7 @@ typedef unsigned int slock_t;
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/*
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* NOTE: per the Enhanced PowerPC Architecture manual, v1.0 dated 7-May-2002,
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* an isync is a sufficient synchronization barrier after a lwarx/stwcx loop.
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* On newer machines, we can use lwsync instead for better performance.
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*/
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static __inline__int
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tas(volatileslock_t*lock)
@@ -382,7 +383,11 @@ tas(volatile slock_t *lock)
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"1:li %1,1\n"
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"b3f\n"
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"2:\n"
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#ifdefUSE_PPC_LWSYNC
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"lwsync\n"
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#else
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"isync\n"
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#endif
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"li %1,0\n"
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"3:\n"
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@@ -392,13 +397,25 @@ tas(volatile slock_t *lock)
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return_res;
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}
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/* PowerPC S_UNLOCK is almost standard but requires a "sync" instruction */
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/*
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* PowerPC S_UNLOCK is almost standard but requires a "sync" instruction.
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* On newer machines, we can use lwsync instead for better performance.
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*/
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#ifdefUSE_PPC_LWSYNC
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#defineS_UNLOCK(lock)\
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do \
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{ \
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__asm__ __volatile__ ("lwsync \n"); \
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*((volatile slock_t *) (lock)) = 0; \
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} while (0)
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#else
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#defineS_UNLOCK(lock)\
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do \
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{ \
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__asm__ __volatile__ ("sync \n"); \
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*((volatile slock_t *) (lock)) = 0; \
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} while (0)
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#endif/* USE_PPC_LWSYNC */
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#endif/* powerpc */
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