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Commit52bf698

Browse files
robertmhaasAlexander Korotkov
authored and
Alexander Korotkov
committed
Make all built-in lwlock tranche IDs fixed.
This makes the values more stable, which seems like a good thing foranybody who needs to look at at them.Alexander Korotkov and Amit Kapila
1 parentccdc288 commit52bf698

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10 files changed

+24
-11
lines changed

10 files changed

+24
-11
lines changed

‎src/backend/access/transam/clog.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -457,7 +457,7 @@ CLOGShmemInit(void)
457457
{
458458
ClogCtl->PagePrecedes=CLOGPagePrecedes;
459459
SimpleLruInit(ClogCtl,"clog",CLOGShmemBuffers(),CLOG_LSNS_PER_PAGE,
460-
CLogControlLock,"pg_clog");
460+
CLogControlLock,"pg_clog",LWTRANCHE_CLOG_BUFFERS);
461461
}
462462

463463
/*

‎src/backend/access/transam/commit_ts.c‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -485,7 +485,8 @@ CommitTsShmemInit(void)
485485

486486
CommitTsCtl->PagePrecedes=CommitTsPagePrecedes;
487487
SimpleLruInit(CommitTsCtl,"commit_timestamp",CommitTsShmemBuffers(),0,
488-
CommitTsControlLock,"pg_commit_ts");
488+
CommitTsControlLock,"pg_commit_ts",
489+
LWTRANCHE_COMMITTS_BUFFERS);
489490

490491
commitTsShared=ShmemInitStruct("CommitTs shared",
491492
sizeof(CommitTimestampShared),

‎src/backend/access/transam/multixact.c‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1839,10 +1839,12 @@ MultiXactShmemInit(void)
18391839

18401840
SimpleLruInit(MultiXactOffsetCtl,
18411841
"multixact_offset",NUM_MXACTOFFSET_BUFFERS,0,
1842-
MultiXactOffsetControlLock,"pg_multixact/offsets");
1842+
MultiXactOffsetControlLock,"pg_multixact/offsets",
1843+
LWTRANCHE_MXACTOFFSET_BUFFERS);
18431844
SimpleLruInit(MultiXactMemberCtl,
18441845
"multixact_member",NUM_MXACTMEMBER_BUFFERS,0,
1845-
MultiXactMemberControlLock,"pg_multixact/members");
1846+
MultiXactMemberControlLock,"pg_multixact/members",
1847+
LWTRANCHE_MXACTMEMBER_BUFFERS);
18461848

18471849
/* Initialize our shared state struct */
18481850
MultiXactState=ShmemInitStruct("Shared MultiXact State",

‎src/backend/access/transam/slru.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -162,7 +162,7 @@ SimpleLruShmemSize(int nslots, int nlsns)
162162

163163
void
164164
SimpleLruInit(SlruCtlctl,constchar*name,intnslots,intnlsns,
165-
LWLock*ctllock,constchar*subdir)
165+
LWLock*ctllock,constchar*subdir,inttranche_id)
166166
{
167167
SlruSharedshared;
168168
boolfound;
@@ -215,7 +215,7 @@ SimpleLruInit(SlruCtl ctl, const char *name, int nslots, int nlsns,
215215

216216
Assert(strlen(name)+1<SLRU_MAX_NAME_LENGTH);
217217
strlcpy(shared->lwlock_tranche_name,name,SLRU_MAX_NAME_LENGTH);
218-
shared->lwlock_tranche_id=LWLockNewTrancheId();
218+
shared->lwlock_tranche_id=tranche_id;
219219
shared->lwlock_tranche.name=shared->lwlock_tranche_name;
220220
shared->lwlock_tranche.array_base=shared->buffer_locks;
221221
shared->lwlock_tranche.array_stride=sizeof(LWLockPadded);

‎src/backend/access/transam/subtrans.c‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -180,7 +180,8 @@ SUBTRANSShmemInit(void)
180180
{
181181
SubTransCtl->PagePrecedes=SubTransPagePrecedes;
182182
SimpleLruInit(SubTransCtl,"subtrans",NUM_SUBTRANS_BUFFERS,0,
183-
SubtransControlLock,"pg_subtrans");
183+
SubtransControlLock,"pg_subtrans",
184+
LWTRANCHE_SUBTRANS_BUFFERS);
184185
/* Override default assumption that writes should be fsync'd */
185186
SubTransCtl->do_fsync= false;
186187
}

‎src/backend/commands/async.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -478,7 +478,7 @@ AsyncShmemInit(void)
478478
*/
479479
AsyncCtl->PagePrecedes=asyncQueuePagePrecedes;
480480
SimpleLruInit(AsyncCtl,"async",NUM_ASYNC_BUFFERS,0,
481-
AsyncCtlLock,"pg_notify");
481+
AsyncCtlLock,"pg_notify",LWTRANCHE_ASYNC_BUFFERS);
482482
/* Override default assumption that writes should be fsync'd */
483483
AsyncCtl->do_fsync= false;
484484

‎src/backend/replication/logical/origin.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -473,7 +473,7 @@ ReplicationOriginShmemInit(void)
473473
{
474474
inti;
475475

476-
replication_states_ctl->tranche_id=LWLockNewTrancheId();
476+
replication_states_ctl->tranche_id=LWTRANCHE_REPLICATION_ORIGIN;
477477
replication_states_ctl->tranche.name="ReplicationOrigins";
478478
replication_states_ctl->tranche.array_base=
479479
&replication_states[0].lock;

‎src/backend/storage/lmgr/predicate.c‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -795,7 +795,8 @@ OldSerXidInit(void)
795795
*/
796796
OldSerXidSlruCtl->PagePrecedes=OldSerXidPagePrecedesLogically;
797797
SimpleLruInit(OldSerXidSlruCtl,"oldserxid",
798-
NUM_OLDSERXID_BUFFERS,0,OldSerXidLock,"pg_serial");
798+
NUM_OLDSERXID_BUFFERS,0,OldSerXidLock,"pg_serial",
799+
LWTRANCHE_OLDSERXID_BUFFERS);
799800
/* Override default assumption that writes should be fsync'd */
800801
OldSerXidSlruCtl->do_fsync= false;
801802

‎src/include/access/slru.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -144,7 +144,7 @@ typedef SlruCtlData *SlruCtl;
144144

145145
externSizeSimpleLruShmemSize(intnslots,intnlsns);
146146
externvoidSimpleLruInit(SlruCtlctl,constchar*name,intnslots,intnlsns,
147-
LWLock*ctllock,constchar*subdir);
147+
LWLock*ctllock,constchar*subdir,inttranche_id);
148148
externintSimpleLruZeroPage(SlruCtlctl,intpageno);
149149
externintSimpleLruReadPage(SlruCtlctl,intpageno,boolwrite_ok,
150150
TransactionIdxid);

‎src/include/storage/lwlock.h‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -206,9 +206,17 @@ extern void LWLockInitialize(LWLock *lock, int tranche_id);
206206
typedefenumBuiltinTrancheIds
207207
{
208208
LWTRANCHE_MAIN,
209+
LWTRANCHE_CLOG_BUFFERS,
210+
LWTRANCHE_COMMITTS_BUFFERS,
211+
LWTRANCHE_SUBTRANS_BUFFERS,
212+
LWTRANCHE_MXACTOFFSET_BUFFERS,
213+
LWTRANCHE_MXACTMEMBER_BUFFERS,
214+
LWTRANCHE_ASYNC_BUFFERS,
215+
LWTRANCHE_OLDSERXID_BUFFERS,
209216
LWTRANCHE_WAL_INSERT,
210217
LWTRANCHE_BUFFER_CONTENT,
211218
LWTRANCHE_BUFFER_IO_IN_PROGRESS,
219+
LWTRANCHE_REPLICATION_ORIGIN,
212220
LWTRANCHE_REPLICATION_SLOT_IO_IN_PROGRESS,
213221
LWTRANCHE_PROC,
214222
LWTRANCHE_FIRST_USER_DEFINED

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