Commit43c6662

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Minor modernization for README.barrier.

Itanium is very uncommon and being discontinued. ARM is everywhere.Prefer ARM as an example of an architecture with weak memory ordering.

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Original file line number	Diff line number	Diff line change
`@@ -38,7 +38,7 @@ Surprisingly, however, the second backend could also end up with foo = 0`
`38`	`38`	`and bar = 1. The compiler might swap the order of the two stores performed`
`39`	`39`	`by the first backend, or the two loads performed by the second backend.`
`40`	`40`	`Even if it doesn't, on a machine with weak memory ordering (such as PowerPC`
`41`		`-orItanium) the CPU might choose to execute either the loads or the stores`
	`41`	`+orARM) the CPU might choose to execute either the loads or the stores`
`42`	`42`	`out of order. This surprising result can lead to bugs.`
`43`	`43`
`44`	`44`	`A common pattern where this actually does result in a bug is when adding items`

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