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Commit03bf971

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Remove uses of register due to incompatibility with C++17 and up
The use in regexec.c could remain, since we only try to keep headers C++clean. But there really doesn't seem to be a good reason to use register inthat spot.Discussion:https://postgr.es/m/20220308185902.ibdqmasoaunzjrfc@alap3.anarazel.de
1 parenteef6394 commit03bf971

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4 files changed

+10
-12
lines changed

4 files changed

+10
-12
lines changed

‎.cirrus.yml

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -556,8 +556,6 @@ task:
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# - Use -fmax-errors, as particularly cpluspluscheck can be very verbose
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# - XXX have to disable ICU to avoid errors:
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# https://postgr.es/m/20220323002024.f2g6tivduzrktgfa%40alap3.anarazel.de
559-
# - XXX: the -Wno-register avoids verbose warnings:
560-
# https://postgr.es/m/20220308181837.aun3tdtdvao4vb7o%40alap3.anarazel.de
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###
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always:
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headers_headerscheck_script:|
@@ -569,7 +567,7 @@ task:
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make -s -j${BUILD_JOBS} clean
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time make -s headerscheck EXTRAFLAGS='-fmax-errors=10'
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headers_cpluspluscheck_script:|
572-
time make -s cpluspluscheck EXTRAFLAGS='-Wno-register -fmax-errors=10'
570+
time make -s cpluspluscheck EXTRAFLAGS='-fmax-errors=10'
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always:
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upload_caches:ccache

‎src/backend/regex/regexec.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -192,7 +192,7 @@ pg_regexec(regex_t *re,
192192
intflags)
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{
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structvarsvar;
195-
registerstructvars*v=&var;
195+
structvars*v=&var;
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intst;
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size_tn;
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size_ti;

‎src/include/port/atomics/arch-x86.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -140,7 +140,7 @@ pg_spin_delay_impl(void)
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staticinlinebool
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pg_atomic_test_set_flag_impl(volatilepg_atomic_flag*ptr)
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{
143-
registerchar_res=1;
143+
char_res=1;
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145145
__asm__ __volatile__(
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"lock\n"

‎src/include/storage/s_lock.h

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -142,7 +142,7 @@ typedef unsigned char slock_t;
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static __inline__int
143143
tas(volatileslock_t*lock)
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{
145-
registerslock_t_res=1;
145+
slock_t_res=1;
146146

147147
/*
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* Use a non-locking test before asserting the bus lock. Note that the
@@ -223,7 +223,7 @@ typedef unsigned char slock_t;
223223
static __inline__int
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tas(volatileslock_t*lock)
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{
226-
registerslock_t_res=1;
226+
slock_t_res=1;
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228228
__asm__ __volatile__(
229229
"lock\n"
@@ -356,7 +356,7 @@ typedef unsigned char slock_t;
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static __inline__int
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tas(volatileslock_t*lock)
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{
359-
registerslock_t_res;
359+
slock_t_res;
360360

361361
/*
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*See comment in src/backend/port/tas/sunstudio_sparc.s for why this
@@ -511,9 +511,9 @@ typedef unsigned int slock_t;
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static __inline__int
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tas(volatileslock_t*lock)
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{
514-
registervolatileslock_t*_l=lock;
515-
registerint_res;
516-
registerint_tmp;
514+
volatileslock_t*_l=lock;
515+
int_res;
516+
int_tmp;
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518518
__asm__ __volatile__(
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" .set push \n"
@@ -574,7 +574,7 @@ static __inline__ int
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tas(volatileslock_t*lock)
575575
{
576576
volatileint*lockword=TAS_ACTIVE_WORD(lock);
577-
registerintlockval;
577+
intlockval;
578578

579579
/*
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* The LDCWX instruction atomically clears the target word and

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