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Commitb5a22d8

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Fix s_lock.h PPC assembly code to be compatible with native AIX assembler.
On recent AIX it's necessary to configure gcc to use the native assembler(because the GNU assembler hasn't been updated to handle AIX 6+). Thiscaused PG builds to fail with assembler syntax errors, because we'd tryto compile s_lock.h's gcc asm fragment for PPC, and that assembly coderelied on GNU-style local labels. We can't substitute normal labelsbecause it would fail in any file containing more than one inlined use oftas(). Fortunately, that code is stable enough, and the PPC ISA is simpleenough, that it doesn't seem like too much of a maintenance burden to justhand-code the branch offsets, removing the need for any labels.Note that the AIX assembler only accepts "$" for the location counterpseudo-symbol. The usual GNU convention is "."; but it appears that allversions of gas for PPC also accept "$", so in theory this patch will notbreak any other PPC platforms.This has been reported by a few people, but Steve Underwood gets the creditfor being the first to pursue the problem far enough to understand why itwas failing. Thanks also to Noah Misch for additional testing.
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‎src/include/storage/s_lock.h

Lines changed: 10 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -410,6 +410,12 @@ typedef unsigned int slock_t;
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/*
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* NOTE: per the Enhanced PowerPC Architecture manual, v1.0 dated 7-May-2002,
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* an isync is a sufficient synchronization barrier after a lwarx/stwcx loop.
413+
*
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* Ordinarily, we'd code the branches here using GNU-style local symbols, that
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* is "1f" referencing "1:" and so on. But some people run gcc on AIX with
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* IBM's assembler as backend, and IBM's assembler doesn't do local symbols.
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* So hand-code the branch offsets; fortunately, all PPC instructions are
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* exactly 4 bytes each, so it's not too hard to count.
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*/
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static __inline__int
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tas(volatileslock_t*lock)
@@ -420,16 +426,14 @@ tas(volatile slock_t *lock)
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__asm__ __volatile__(
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"lwarx %0,0,%3\n"
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"cmpwi %0,0\n"
423-
"bne1f\n"
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"bne$+16\n"/* branch to li %1,1 */
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"addi %0,%0,1\n"
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"stwcx. %0,0,%3\n"
426-
"beq 2f \n"
427-
"1:li %1,1\n"
428-
"b3f\n"
429-
"2:\n"
432+
"beq $+12\n"/* branch to isync */
433+
"li %1,1\n"
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"b $+12\n"/* branch to end of asm sequence */
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"isync\n"
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"li %1,0\n"
432-
"3:\n"
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:"=&r"(_t),"=r"(_res),"+m"(*lock)
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:"r"(lock)

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