@kwagyeman@iabdalkader this should hopefully improve the speed of SD card on the N6. Are you able to test this PR to confirm that?

Code size report:

Reference:  tests/basics/string_fstring.py: Test fstring nested replacement fields. [ef567dc]Comparison: stm32/sdcard: Use high speed mode for SD transfers on H5/H7/N6. [merge of 6cc3215]  mpy-cross:    +0 +0.000%    bare-arm:    +0 +0.000% minimal x86:    +0 +0.000%    unix x64:    +0 +0.000% standard      stm32:    +0 +0.000% PYBV10     mimxrt:    +0 +0.000% TEENSY40        rp2:    +0 +0.000% RPI_PICO_W       samd:    +0 +0.000% ADAFRUIT_ITSYBITSY_M4_EXPRESS  qemu rv32:    +0 +0.000% VIRT_RV32

@dpgeorge - Can you test this on an H7/H5 first? I was getting the expected performance on them... but, 1/2 on the N6. Changing the clock div indeed increases the speed, but, then it should also double the H7/H5 which. So, not 100% sure this is the correct thing to do.

Can you test this on an H7/H5 first? I was getting the expected performance on them

That's because I patch all these dividers to 0 in our HALs, except for N6 which is not patched.

Ah! Okay, then this is likely fine. When I was debugging, changing the divider was what I did to increase the speed.

I tested this on a H5 board, and indeed it increases the read speed of SD card, from a maximum of about 12.5M/s to about 18.5M/s.

That's because I patch all these dividers to 0 in our HALs,

Do you mean you use a value of 2? Because that's what SDMMC_HSPEED_CLK_DIV is defined to (and probably 0 is an illegal value).

Do you mean you use a value of 2? Because that's what SDMMC_HSPEED_CLK_DIV is defined to (and probably 0 is an illegal value).

No, the N6 uses 0x4 with an SDMMC kernel clock of 200MHz, so it was running at 12.5MHz. A divider of 0x2 is sdmmc_ker_ck / 4 = 50MHz, so this change should be good.