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Port psoc6 (latest)#18550

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jaenrig-ifx wants to merge20 commits intomicropython:master
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fromInfineon:port-psoc6-pr4

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@jaenrig-ifx
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Hi@mattytrentini@dpgeorge,

We have kept working on further enabling the PSOC6 controller in MPY. This pull request deprecates#16705.

Here a list of the features enabled:
machine classes:

  • ADC
  • ADCBlock
  • I2C. Master and slave mode.
  • I2S
  • Pin
  • PWM
  • RTC
  • SDCard
  • SPI. Master and slave mode.
  • Timer
  • UART
  • WDT

Additional modules:

  • network.WLAN
  • Virtual File System (LFS2 and FAT format)

PSoC6 evaluation boards available:

  • CY8CPROTO-062-4343W

  • CY8CPROTO-063-BLE

  • CY8CKIT-062S2-AI

  • Tests running in a hardware in the loop setup under ci/cd are provided for (at least) the main API functionalities of the enabled classes.

Looking forward to discuss the next steps regarding this PR with our teams.

Signed-off-by: jaenrig-ifx <enriquezgarcia.external@infineon.com>
Signed-off-by: jaenrig-ifx <enriquezgarcia.external@infineon.com>
Signed-off-by: jaenrig-ifx <enriquezgarcia.external@infineon.com>
Signed-off-by: jaenrig-ifx <enriquezgarcia.external@infineon.com>
Signed-off-by: jaenrig-ifx <enriquezgarcia.external@infineon.com>
Signed-off-by: jaenrig-ifx <enriquezgarcia.external@infineon.com>
Signed-off-by: jaenrig-ifx <enriquezgarcia.external@infineon.com>
Signed-off-by: jaenrig-ifx <enriquezgarcia.external@infineon.com>
Signed-off-by: jaenrig-ifx <enriquezgarcia.external@infineon.com>
Signed-off-by: jaenrig-ifx <enriquezgarcia.external@infineon.com>
Signed-off-by: jaenrig-ifx <enriquezgarcia.external@infineon.com>
Signed-off-by: jaenrig-ifx <enriquezgarcia.external@infineon.com>
Signed-off-by: jaenrig-ifx <enriquezgarcia.external@infineon.com>
Signed-off-by: jaenrig-ifx <enriquezgarcia.external@infineon.com>
Signed-off-by: jaenrig-ifx <enriquezgarcia.external@infineon.com>
Signed-off-by: jaenrig-ifx <enriquezgarcia.external@infineon.com>
Signed-off-by: jaenrig-ifx <enriquezgarcia.external@infineon.com>
Signed-off-by: jaenrig-ifx <enriquezgarcia.external@infineon.com>
Signed-off-by: jaenrig-ifx <enriquezgarcia.external@infineon.com>
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github-actionsbot commentedDec 11, 2025•
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Code size report:

Reference:  all: Bump version to 1.27.0. [78ff170]Comparison: psoc6/README: Fixed board name typo. [merge of 6db391a]  mpy-cross:    +0 +0.000%    bare-arm:    +0 +0.000% minimal x86:    +0 +0.000%    unix x64:    +0 +0.000% standard      stm32:   +48 +0.012% PYBV10     mimxrt:   +44 +0.012% TEENSY40        rp2:   +56 +0.006% RPI_PICO_W       samd:   +48 +0.018% ADAFRUIT_ITSYBITSY_M4_EXPRESS  qemu rv32:    +0 +0.000% VIRT_RV32


Build the firmware:

make BOARD=CY8CKIT_062S2_AI

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CY8CKIT_062S2_AI does not match the directory boards/CY8CKIT-062S2-AI

compiles with make BOARD=CY8CKIT-062S2-AI

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100%. Fixed :) That was a typo.

@jkorte-dev
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I'm very impressed by the effort that went into the testing. Very exciting.

Signed-off-by: jaenrig-ifx <enriquezgarcia.external@infineon.com>
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codecovbot commentedDec 12, 2025•
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Codecov Report

✅ All modified and coverable lines are covered by tests.
✅ Project coverage is 98.38%. Comparing base (78ff170) to head (6db391a).
⚠️ Report is 3 commits behind head on master.

Additional details and impacted files
@@           Coverage Diff           @@##           master   #18550   +/-   ##=======================================  Coverage   98.38%   98.38%           =======================================  Files         171      171             Lines       22300    22300           =======================================  Hits        21939    21939             Misses        361      361

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@dpgeorgedpgeorge added the portsRelates to multiple ports, or a new/proposed port labelDec 16, 2025
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@jaenrig-ifx@jkorte-dev@dpgeorge
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