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py/emitinlinextensa: Refactor handling of selected 3-arg opcodes.#18546

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Summary

This PR refactors handling of opcodes with three arguments whose composition can be easily put in a table, so there's only one bit of code handling those opcodes rather than several small bits with overlapping functionalities.

Doing so yields a saving of about 90 bytes, although more bytes could have been saved by not having a custom error message indicating a valid opcode with an unexpected number of operands.

Testing

Besides the usual CI testing,inlineasm/xtensa tests were executed successfully on an ESP8266 board.

This commit refactors handling of opcodes with three arguments whosecomposition can be easily put in a table, so there's only one bit ofcode handling those opcodes rather than several small bits withoverlapping functionalities.Doing so yields a saving of about 90 bytes, although more bytes couldhave been recovered by not having a custom error message indicating avalid opcode with an unexpected number of operands.Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
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codecovbot commentedDec 10, 2025

Codecov Report

✅ All modified and coverable lines are covered by tests.
✅ Project coverage is 98.38%. Comparing base (78ff170) to head (a4bf965).

Additional details and impacted files
@@           Coverage Diff           @@##           master   #18546   +/-   ##=======================================  Coverage   98.38%   98.38%           =======================================  Files         171      171             Lines       22300    22300           =======================================  Hits        21939    21939             Misses        361      361

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Code size report:

Reference:  all: Bump version to 1.27.0. [78ff170]Comparison: py/emitinlinextensa: Refactor handling of selected 3-arg opcodes. [merge of a4bf965]  mpy-cross:  -128 -0.034%    bare-arm:    +0 +0.000% minimal x86:    +0 +0.000%    unix x64:    +0 +0.000% standard      stm32:    +0 +0.000% PYBV10     mimxrt:    +0 +0.000% TEENSY40        rp2:    +0 +0.000% RPI_PICO_W       samd:    +0 +0.000% ADAFRUIT_ITSYBITSY_M4_EXPRESS  qemu rv32:    +0 +0.000% VIRT_RV32

@dpgeorgedpgeorge added the py-coreRelates to py/ directory in source labelDec 10, 2025
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