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Commit9a47835

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rp2: Support for dynamic pins.
Support configuring wireless on arbitrary GPIO pins.
1 parent3a0028e commit9a47835

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4 files changed

+75
-0
lines changed

4 files changed

+75
-0
lines changed

‎ports/rp2/CMakeLists.txt

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Original file line numberDiff line numberDiff line change
@@ -193,6 +193,7 @@ set(MICROPY_SOURCE_QSTR
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${MICROPY_PORT_DIR}/rp2_pio.c
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${MICROPY_PORT_DIR}/rp2_dma.c
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${CMAKE_BINARY_DIR}/pins_${MICROPY_BOARD}.c
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${MICROPY_PORT_DIR}/rp2_network_cyw43.c
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)
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198199
set(PICO_SDK_COMPONENTS
@@ -403,6 +404,7 @@ if (MICROPY_PY_NETWORK_CYW43)
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list(APPEND MICROPY_SOURCE_PORT
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machine_pin_cyw43.c
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rp2_network_cyw43.c
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)
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target_link_libraries(${MICROPY_TARGET}

‎ports/rp2/mpconfigport.h

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Original file line numberDiff line numberDiff line change
@@ -223,6 +223,10 @@ extern const struct _mp_obj_type_t mp_network_cyw43_type;
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{ MP_ROM_QSTR(MP_QSTR_STAT_NO_AP_FOUND), MP_ROM_INT(CYW43_LINK_NONET) }, \
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{ MP_ROM_QSTR(MP_QSTR_STAT_CONNECT_FAIL), MP_ROM_INT(CYW43_LINK_FAIL) }, \
225225
{ MP_ROM_QSTR(MP_QSTR_STAT_GOT_IP), MP_ROM_INT(CYW43_LINK_UP) },
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227+
// Override network_cyw43_make_new
228+
#defineMICROPY_PY_NETWORK_CYW43_MAKE_NEW rp2_network_cyw43_make_new
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226230
#else
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#defineMICROPY_HW_NIC_CYW43
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#endif

‎ports/rp2/mpnetworkport.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -77,6 +77,10 @@ void cyw43_irq_init(void) {
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NVIC_SetPriority(PendSV_IRQn,IRQ_PRI_PENDSV);
7878
}
7979

80+
voidcyw43_irq_deinit(void) {
81+
gpio_remove_raw_irq_handler(CYW43_PIN_WL_HOST_WAKE,gpio_irq_handler);
82+
}
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8084
voidcyw43_post_poll_hook(void) {
8185
cyw43_has_pending=0;
8286
gpio_set_irq_enabled(CYW43_PIN_WL_HOST_WAKE,CYW43_IRQ_LEVEL, true);

‎ports/rp2/rp2_network_cyw43.c

Lines changed: 65 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,65 @@
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#include"py/runtime.h"
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#include"extmod/network_cyw43.h"
3+
#include"extmod/modnetwork.h"
4+
5+
voidcyw43_irq_deinit(void);
6+
voidcyw43_irq_init(void);
7+
8+
#ifCYW43_PIN_WL_DYNAMIC
9+
// Defined in cyw43_bus_pio_spi.c
10+
externintcyw43_set_pins_wl(uintpins[CYW43_PIN_INDEX_WL_COUNT]);
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#endif
12+
13+
#ifCYW43_PIO_CLOCK_DIV_DYNAMIC
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// Defined in cyw43_bus_pio_spi.c
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externvoidcyw43_set_pio_clock_divisor(uint16_tclock_div_int,uint8_tclock_div_frac);
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#endif
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mp_obj_trp2_network_cyw43_make_new(constmp_obj_type_t*type,size_tn_args,size_tn_kw,constmp_obj_t*all_args) {
19+
enum {ARG_interface,ARG_pin_on,ARG_pin_out,ARG_pin_in,ARG_pin_wake,ARG_pin_clock,ARG_pin_cs,ARG_div,ARG_div_frac };
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staticconstmp_arg_tallowed_args[]= {
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{MP_QSTR_interface,MP_ARG_INT, {.u_int=MOD_NETWORK_STA_IF} },
22+
#ifCYW43_PIN_WL_DYNAMIC
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{MP_QSTR_pin_on,MP_ARG_KW_ONLY |MP_ARG_OBJ, { .u_obj=MP_OBJ_NULL } },
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{MP_QSTR_pin_out,MP_ARG_KW_ONLY |MP_ARG_OBJ, { .u_obj=MP_OBJ_NULL } },
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{MP_QSTR_pin_in,MP_ARG_KW_ONLY |MP_ARG_OBJ, { .u_obj=MP_OBJ_NULL } },
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{MP_QSTR_pin_wake,MP_ARG_KW_ONLY |MP_ARG_OBJ, { .u_obj=MP_OBJ_NULL } },
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{MP_QSTR_pin_clock,MP_ARG_KW_ONLY |MP_ARG_OBJ, { .u_obj=MP_OBJ_NULL } },
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{MP_QSTR_pin_cs,MP_ARG_KW_ONLY |MP_ARG_OBJ, { .u_obj=MP_OBJ_NULL } },
29+
#endif
30+
#ifCYW43_PIO_CLOCK_DIV_DYNAMIC
31+
{MP_QSTR_div,MP_ARG_KW_ONLY |MP_ARG_INT, { .u_int=2 } },
32+
{MP_QSTR_div_frac,MP_ARG_KW_ONLY |MP_ARG_INT, { .u_int=0 } },
33+
#endif
34+
};
35+
mp_arg_val_targs[MP_ARRAY_SIZE(allowed_args)];
36+
mp_arg_parse_all_kw_array(n_args,n_kw,all_args,MP_ARRAY_SIZE(allowed_args),allowed_args,args);
37+
38+
// Set the pins
39+
#ifCYW43_PIN_WL_DYNAMIC
40+
uintpins[CYW43_PIN_INDEX_WL_COUNT]= {
41+
// REG_ON, OUT, IN, WAKE, CLOCK, CS
42+
args[ARG_pin_on].u_obj==MP_OBJ_NULL ?CYW43_DEFAULT_PIN_WL_REG_ON :mp_hal_get_pin_obj(args[ARG_pin_on].u_obj),
43+
args[ARG_pin_out].u_obj==MP_OBJ_NULL ?CYW43_DEFAULT_PIN_WL_DATA_OUT :mp_hal_get_pin_obj(args[ARG_pin_out].u_obj),
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args[ARG_pin_in].u_obj==MP_OBJ_NULL ?CYW43_DEFAULT_PIN_WL_DATA_IN :mp_hal_get_pin_obj(args[ARG_pin_in].u_obj),
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args[ARG_pin_wake].u_obj==MP_OBJ_NULL ?CYW43_DEFAULT_PIN_WL_HOST_WAKE :mp_hal_get_pin_obj(args[ARG_pin_wake].u_obj),
46+
args[ARG_pin_clock].u_obj==MP_OBJ_NULL ?CYW43_DEFAULT_PIN_WL_CLOCK :mp_hal_get_pin_obj(args[ARG_pin_clock].u_obj),
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args[ARG_pin_cs].u_obj==MP_OBJ_NULL ?CYW43_DEFAULT_PIN_WL_CS :mp_hal_get_pin_obj(args[ARG_pin_cs].u_obj),
48+
};
49+
// re-initialise cyw43
50+
cyw43_irq_deinit();
51+
cyw43_set_pins_wl(pins);
52+
cyw43_irq_init();
53+
#endif
54+
55+
#ifCYW43_PIO_CLOCK_DIV_DYNAMIC
56+
// set the pio clock divisor
57+
cyw43_set_pio_clock_divisor((uint16_t)args[ARG_div].u_int, (uint16_t)args[ARG_div_frac].u_int);
58+
#endif
59+
60+
if (n_args==0||mp_obj_get_int(all_args[ARG_interface])==MOD_NETWORK_STA_IF) {
61+
returnnetwork_cyw43_get_interface(MOD_NETWORK_STA_IF);
62+
}else {
63+
returnnetwork_cyw43_get_interface(MOD_NETWORK_AP_IF);
64+
}
65+
}

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