Commit47dd1fe

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rp2: Add riscv variant for pico2_w.

make BOARD=RPI_PICO2_W BOARD_VARIANT=RISCV -j8Signed-off-by: Peter Harper <peter.harper@raspberrypi.com>

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Original file line number	Diff line number	Diff line change
`@@ -407,7 +407,6 @@ if (MICROPY_PY_NETWORK_CYW43)`
`407`	`407`
`408`	`408`	`target_link_libraries(${MICROPY_TARGET}`
`409`	`409`	`cyw43_driver_picow`
`410`		`- cmsis_core`
`411`	`410`	`)`
`412`	`411`	`target_include_directories(${MICROPY_TARGET}PRIVATE`
`413`	`412`	`${MICROPY_DIR}/lib/cyw43-driver/`

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Original file line number	Diff line number	Diff line change
`@@ -0,0 +1 @@`
	`1`	`+set(PICO_PLATFORM"rp2350-riscv")`

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`@@ -44,13 +44,15 @@ static soft_timer_entry_t mp_network_soft_timer;`
`44`	`44`	`#include"lib/cyw43-driver/src/cyw43_stats.h"`
`45`	`45`	`#include"hardware/irq.h"`
`46`	`46`
	`47`	`+#if !defined(__riscv)`
`47`	`48`	`#ifPICO_RP2040`
`48`	`49`	`#include"RP2040.h"// cmsis, for NVIC_SetPriority and PendSV_IRQn`
`49`	`50`	`#elifPICO_RP2350`
`50`	`51`	`#include"RP2350.h"// cmsis, for NVIC_SetPriority and PendSV_IRQn`
`51`	`52`	`#else`
`52`	`53`	`#error Unknown processor`
`53`	`54`	`#endif`
	`55`	`+#endif`
`54`	`56`
`55`	`57`	`#defineCYW43_IRQ_LEVEL GPIO_IRQ_LEVEL_HIGH`
`56`	`58`	`#defineCYW43_SHARED_IRQ_HANDLER_PRIORITY PICO_SHARED_IRQ_HANDLER_HIGHEST_ORDER_PRIORITY`
`@@ -74,7 +76,9 @@ static void gpio_irq_handler(void) {`
`74`	`76`	`voidcyw43_irq_init(void) {`
`75`	`77`	`gpio_add_raw_irq_handler_with_order_priority(CYW43_PIN_WL_HOST_WAKE,gpio_irq_handler,CYW43_SHARED_IRQ_HANDLER_PRIORITY);`
`76`	`78`	`irq_set_enabled(IO_IRQ_BANK0, true);`
	`79`	`+#if !defined(__riscv)`
`77`	`80`	`NVIC_SetPriority(PendSV_IRQn,IRQ_PRI_PENDSV);`
	`81`	`+#endif`
`78`	`82`	`}`
`79`	`83`
`80`	`84`	`voidcyw43_post_poll_hook(void) {`

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